* [PATCH 0/7] add support for Theobroma Systems PX30-µQ7 (Ringneck) with Haikou devkit
@ 2022-09-22 12:12 Quentin Schulz
2022-09-22 12:12 ` [PATCH 1/7] rockchip: px30: fix CONFIG_IRAM_BASE Quentin Schulz
` (6 more replies)
0 siblings, 7 replies; 19+ messages in thread
From: Quentin Schulz @ 2022-09-22 12:12 UTC (permalink / raw)
Cc: foss+uboot, klaus.goger, sjg, philipp.tomsich, kever.yang, heiko,
u-boot, Quentin Schulz
From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm, MXM-230
connector) system-on-module from Theobroma Systems[1], featuring the
Rockchip PX30.
It provides the following feature set:
* up to 4GB DDR4
* up to 128GB on-module eMMC (with 8-bit 1.8V interface)
* SD card (on a baseboard) via edge connector
* Fast Ethernet with on-module TI DP83825I PHY
* MIPI-DSI/LVDS
* MIPI-CSI
* USB
- 1x USB 2.0 dual-role
- 3x USB 2.0 host
* on-module STM32 Cortex-M0 companion controller, implementing:
- low-power RTC functionality (ISL1208 emulation)
- fan controller (AMC6821 emulation)
- USB<->CAN bridge controller
* on-module Espressif ESP32 for Bluetooth + 2.4GHz WiFi
* on-module NXP SE05x Secure Element
[1] https://www.theobroma-systems.com/som-product/px30-%C2%B5q7/
This patch series depends on the following patch series:
https://lore.kernel.org/u-boot/20220915101247.796236-1-foss+uboot@0leil.net/
The non-U-Boot-specific Device Trees are from the following Linux kernel
patch series:
https://lore.kernel.org/lkml/20220922101211.3215888-3-foss+kernel@0leil.net/
The new SW input event code added in patch 6/7 is from the following patch from
the Linux kernel:
https://lore.kernel.org/lkml/20220922101211.3215888-2-foss+kernel@0leil.net/
We probably should wait on the kernel to merge it in one of the
maintainers branches before merging it into U-Boot?
Cheers,
Quentin
Quentin Schulz (7):
rockchip: px30: fix CONFIG_IRAM_BASE
rockchip: px30: list possible SPL boot devices
rockchip: px30: insert u-boot,spl-boot-device into U-Boot device tree
arm64: dts: rockchip: sync px30 with linux-next
include/dt-bindings: Sync linux-event-codes with Linux kernel
Input: add `SW_BOOT_ALT`
rockchip: add support for PX30 Ringneck SoM on Haikou Devkit
arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi | 95 +++++
arch/arm/dts/px30-ringneck-haikou.dts | 239 ++++++++++++
arch/arm/dts/px30-ringneck.dtsi | 347 ++++++++++++++++++
arch/arm/dts/px30.dtsi | 28 +-
arch/arm/mach-rockchip/px30/Kconfig | 25 ++
arch/arm/mach-rockchip/px30/px30.c | 56 +++
board/theobroma-systems/ringneck_px30/Kconfig | 18 +
.../ringneck_px30/MAINTAINERS | 9 +
.../theobroma-systems/ringneck_px30/Makefile | 7 +
board/theobroma-systems/ringneck_px30/README | 69 ++++
.../ringneck_px30/ringneck-px30.c | 175 +++++++++
configs/ringneck-px30_defconfig | 131 +++++++
doc/board/rockchip/rockchip.rst | 1 +
include/configs/px30_common.h | 3 +-
include/configs/ringneck_px30.h | 15 +
include/dt-bindings/input/linux-event-codes.h | 176 ++++++++-
16 files changed, 1385 insertions(+), 9 deletions(-)
create mode 100644 arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi
create mode 100644 arch/arm/dts/px30-ringneck-haikou.dts
create mode 100644 arch/arm/dts/px30-ringneck.dtsi
create mode 100644 board/theobroma-systems/ringneck_px30/Kconfig
create mode 100644 board/theobroma-systems/ringneck_px30/MAINTAINERS
create mode 100644 board/theobroma-systems/ringneck_px30/Makefile
create mode 100644 board/theobroma-systems/ringneck_px30/README
create mode 100644 board/theobroma-systems/ringneck_px30/ringneck-px30.c
create mode 100644 configs/ringneck-px30_defconfig
create mode 100644 include/configs/ringneck_px30.h
--
2.37.3
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/7] rockchip: px30: fix CONFIG_IRAM_BASE
2022-09-22 12:12 [PATCH 0/7] add support for Theobroma Systems PX30-µQ7 (Ringneck) with Haikou devkit Quentin Schulz
@ 2022-09-22 12:12 ` Quentin Schulz
2022-09-24 7:58 ` Kever Yang
2022-09-22 12:12 ` [PATCH 2/7] rockchip: px30: list possible SPL boot devices Quentin Schulz
` (5 subsequent siblings)
6 siblings, 1 reply; 19+ messages in thread
From: Quentin Schulz @ 2022-09-22 12:12 UTC (permalink / raw)
Cc: foss+uboot, klaus.goger, sjg, philipp.tomsich, kever.yang, heiko,
u-boot, Quentin Schulz
From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The IRAM on PX30 (or Int_MEM in datasheet) starts at 0xff0e0000 and not
0xff020000 as rightfully stated in the FIXME comment.
Let's fix it so that BROM_BOOTSOURCE_ID_ADDR points to the correct
address for PX30.
Fixes: 46281a76bee3 ("rockchip: add core px30 headers")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
---
include/configs/px30_common.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 49d1878ebd..c93bb053a5 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -10,8 +10,7 @@
#define CONFIG_SYS_NS16550_MEM32
-/* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */
-#define CONFIG_IRAM_BASE 0xff020000
+#define CONFIG_IRAM_BASE 0xff0e0000
#define GICD_BASE 0xff131000
#define GICC_BASE 0xff132000
--
2.37.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 2/7] rockchip: px30: list possible SPL boot devices
2022-09-22 12:12 [PATCH 0/7] add support for Theobroma Systems PX30-µQ7 (Ringneck) with Haikou devkit Quentin Schulz
2022-09-22 12:12 ` [PATCH 1/7] rockchip: px30: fix CONFIG_IRAM_BASE Quentin Schulz
@ 2022-09-22 12:12 ` Quentin Schulz
2022-09-24 7:58 ` Kever Yang
2022-09-22 12:12 ` [PATCH 3/7] rockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree Quentin Schulz
` (4 subsequent siblings)
6 siblings, 1 reply; 19+ messages in thread
From: Quentin Schulz @ 2022-09-22 12:12 UTC (permalink / raw)
Cc: foss+uboot, klaus.goger, sjg, philipp.tomsich, kever.yang, heiko,
u-boot, Quentin Schulz
From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
BOOTROM sets a bit in a CPU register so that the software can know from
where the first stage bootloader was booted. One use case for this is to
specify the default loading medium for U-Boot proper to match the one
used by the BOOTROM to load the SPL (same-as-spl in
u-boot,spl-boot-order).
Let's create the mapping between BOOTROM value and Device Tree node
names for MMC devices.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
---
arch/arm/mach-rockchip/px30/px30.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 0641e6af0f..481b50235e 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -8,6 +8,7 @@
#include <init.h>
#include <asm/armv8/mmu.h>
#include <asm/io.h>
+#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/grf_px30.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/arch-rockchip/uart.h>
@@ -15,6 +16,11 @@
#include <asm/arch-rockchip/cru_px30.h>
#include <dt-bindings/clock/px30-cru.h>
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+ [BROM_BOOTSOURCE_EMMC] = "/mmc@ff390000",
+ [BROM_BOOTSOURCE_SD] = "/mmc@ff370000",
+};
+
static struct mm_region px30_mem_map[] = {
{
.virt = 0x0UL,
--
2.37.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 3/7] rockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree
2022-09-22 12:12 [PATCH 0/7] add support for Theobroma Systems PX30-µQ7 (Ringneck) with Haikou devkit Quentin Schulz
2022-09-22 12:12 ` [PATCH 1/7] rockchip: px30: fix CONFIG_IRAM_BASE Quentin Schulz
2022-09-22 12:12 ` [PATCH 2/7] rockchip: px30: list possible SPL boot devices Quentin Schulz
@ 2022-09-22 12:12 ` Quentin Schulz
2022-09-24 7:59 ` [PATCH 3/7] rockchip: px30: insert u-boot,spl-boot-device " Kever Yang
2022-09-22 12:12 ` [PATCH 4/7] arm64: dts: rockchip: sync px30 with linux-next Quentin Schulz
` (3 subsequent siblings)
6 siblings, 1 reply; 19+ messages in thread
From: Quentin Schulz @ 2022-09-22 12:12 UTC (permalink / raw)
Cc: foss+uboot, klaus.goger, sjg, philipp.tomsich, kever.yang, heiko,
u-boot, Quentin Schulz
From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
It is possible to boot U-Boot proper from a different storage medium
than the one used by the BOOTROM to load the SPL. This information is
stored in the u-boot,spl-boot-device Device Tree property and is
accessible from U-Boot proper so that it has knowledge at runtime where
it was loaded from.
Let's add support for this feature for px30.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
---
arch/arm/mach-rockchip/px30/px30.c | 50 ++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 481b50235e..5f26128d01 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -6,6 +6,7 @@
#include <clk.h>
#include <dm.h>
#include <init.h>
+#include <spl.h>
#include <asm/armv8/mmu.h>
#include <asm/io.h>
#include <asm/arch-rockchip/bootrom.h>
@@ -427,3 +428,52 @@ void board_debug_uart_init(void)
#endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
}
#endif /* CONFIG_DEBUG_UART_BOARD_INIT */
+
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+const char *spl_decode_boot_device(u32 boot_device)
+{
+ int i;
+ static const struct {
+ u32 boot_device;
+ const char *ofpath;
+ } spl_boot_devices_tbl[] = {
+ { BOOT_DEVICE_MMC2, "/mmc@ff370000" },
+ { BOOT_DEVICE_MMC1, "/mmc@ff390000" },
+ };
+
+ for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
+ if (spl_boot_devices_tbl[i].boot_device == boot_device)
+ return spl_boot_devices_tbl[i].ofpath;
+
+ return NULL;
+}
+
+void spl_perform_fixups(struct spl_image_info *spl_image)
+{
+ void *blob = spl_image->fdt_addr;
+ const char *boot_ofpath;
+ int chosen;
+
+ /*
+ * Inject the ofpath of the device the full U-Boot (or Linux in
+ * Falcon-mode) was booted from into the FDT, if a FDT has been
+ * loaded at the same time.
+ */
+ if (!blob)
+ return;
+
+ boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
+ if (!boot_ofpath) {
+ pr_err("%s: could not map boot_device to ofpath\n", __func__);
+ return;
+ }
+
+ chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
+ if (chosen < 0) {
+ pr_err("%s: could not find/create '/chosen'\n", __func__);
+ return;
+ }
+ fdt_setprop_string(blob, chosen,
+ "u-boot,spl-boot-device", boot_ofpath);
+}
+#endif
--
2.37.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 4/7] arm64: dts: rockchip: sync px30 with linux-next
2022-09-22 12:12 [PATCH 0/7] add support for Theobroma Systems PX30-µQ7 (Ringneck) with Haikou devkit Quentin Schulz
` (2 preceding siblings ...)
2022-09-22 12:12 ` [PATCH 3/7] rockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree Quentin Schulz
@ 2022-09-22 12:12 ` Quentin Schulz
2022-09-24 7:59 ` Kever Yang
2022-09-22 12:12 ` [PATCH 5/7] include/dt-bindings: Sync linux-event-codes with Linux kernel Quentin Schulz
` (2 subsequent siblings)
6 siblings, 1 reply; 19+ messages in thread
From: Quentin Schulz @ 2022-09-22 12:12 UTC (permalink / raw)
Cc: foss+uboot, klaus.goger, sjg, philipp.tomsich, kever.yang, heiko,
u-boot, Quentin Schulz
From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Sync the px30 dtsi from linux-next tree, commit 483fed3b5dc8c ("Add
linux-next specific files for 20220921").
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
---
arch/arm/dts/px30.dtsi | 28 +++++++++++++++++++++++++---
1 file changed, 25 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 00f50b05d5..bfa3580429 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -365,6 +365,28 @@
status = "disabled";
};
+ i2s0_8ch: i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x0 0xff060000 0x0 0x1000>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_I2S0_TX>, <&cru SCLK_I2S0_RX>, <&cru HCLK_I2S0>;
+ clock-names = "mclk_tx", "mclk_rx", "hclk";
+ dmas = <&dmac 16>, <&dmac 17>;
+ dma-names = "tx", "rx";
+ rockchip,grf = <&grf>;
+ resets = <&cru SRST_I2S0_TX>, <&cru SRST_I2S0_RX>;
+ reset-names = "tx-m", "rx-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s0_8ch_sclktx &i2s0_8ch_sclkrx
+ &i2s0_8ch_lrcktx &i2s0_8ch_lrckrx
+ &i2s0_8ch_sdo0 &i2s0_8ch_sdi0
+ &i2s0_8ch_sdo1 &i2s0_8ch_sdi1
+ &i2s0_8ch_sdo2 &i2s0_8ch_sdi2
+ &i2s0_8ch_sdo3 &i2s0_8ch_sdi3>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
i2s1_2ch: i2s@ff070000 {
compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
reg = <0x0 0xff070000 0x0 0x1000>;
@@ -528,7 +550,7 @@
i2c0: i2c@ff180000 {
compatible = "rockchip,px30-i2c", "rockchip,rk3399-i2c";
reg = <0x0 0xff180000 0x0 0x1000>;
- clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
+ clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
@@ -711,7 +733,7 @@
clock-names = "pclk", "timer";
};
- dmac: dmac@ff240000 {
+ dmac: dma-controller@ff240000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0xff240000 0x0 0x4000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
@@ -1072,7 +1094,7 @@
};
dsi: dsi@ff450000 {
- compatible = "rockchip,px30-mipi-dsi";
+ compatible = "rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0x0 0xff450000 0x0 0x10000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_MIPI_DSI>;
--
2.37.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 5/7] include/dt-bindings: Sync linux-event-codes with Linux kernel
2022-09-22 12:12 [PATCH 0/7] add support for Theobroma Systems PX30-µQ7 (Ringneck) with Haikou devkit Quentin Schulz
` (3 preceding siblings ...)
2022-09-22 12:12 ` [PATCH 4/7] arm64: dts: rockchip: sync px30 with linux-next Quentin Schulz
@ 2022-09-22 12:12 ` Quentin Schulz
2022-09-24 7:59 ` Kever Yang
2022-09-22 12:12 ` [PATCH 6/7] Input: add `SW_BOOT_ALT` Quentin Schulz
2022-09-22 12:12 ` [PATCH 7/7] rockchip: add support for PX30 Ringneck SoM on Haikou Devkit Quentin Schulz
6 siblings, 1 reply; 19+ messages in thread
From: Quentin Schulz @ 2022-09-22 12:12 UTC (permalink / raw)
Cc: foss+uboot, klaus.goger, sjg, philipp.tomsich, kever.yang, heiko,
u-boot, Quentin Schulz
From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Sync include/dt-bindings/input/linux-event-codes.h with
include/uapi/linux/input-event-codes.h from Linux kernel v6.0-rc6.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
---
include/dt-bindings/input/linux-event-codes.h | 173 +++++++++++++++++-
1 file changed, 170 insertions(+), 3 deletions(-)
diff --git a/include/dt-bindings/input/linux-event-codes.h b/include/dt-bindings/input/linux-event-codes.h
index 331458c0e7..dff8e7f170 100644
--- a/include/dt-bindings/input/linux-event-codes.h
+++ b/include/dt-bindings/input/linux-event-codes.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Input event codes
*
@@ -277,7 +278,8 @@
#define KEY_PAUSECD 201
#define KEY_PROG3 202
#define KEY_PROG4 203
-#define KEY_DASHBOARD 204 /* AL Dashboard */
+#define KEY_ALL_APPLICATIONS 204 /* AC Desktop Show All Applications */
+#define KEY_DASHBOARD KEY_ALL_APPLICATIONS
#define KEY_SUSPEND 205
#define KEY_CLOSE 206 /* AC Close */
#define KEY_PLAY 207
@@ -406,6 +408,7 @@
#define BTN_TOOL_MOUSE 0x146
#define BTN_TOOL_LENS 0x147
#define BTN_TOOL_QUINTTAP 0x148 /* Five fingers on trackpad */
+#define BTN_STYLUS3 0x149
#define BTN_TOUCH 0x14a
#define BTN_STYLUS 0x14b
#define BTN_STYLUS2 0x14c
@@ -437,10 +440,12 @@
#define KEY_TITLE 0x171
#define KEY_SUBTITLE 0x172
#define KEY_ANGLE 0x173
-#define KEY_ZOOM 0x174
+#define KEY_FULL_SCREEN 0x174 /* AC View Toggle */
+#define KEY_ZOOM KEY_FULL_SCREEN
#define KEY_MODE 0x175
#define KEY_KEYBOARD 0x176
-#define KEY_SCREEN 0x177
+#define KEY_ASPECT_RATIO 0x177 /* HUTRR37: Aspect */
+#define KEY_SCREEN KEY_ASPECT_RATIO
#define KEY_PC 0x178 /* Media Select Computer */
#define KEY_TV 0x179 /* Media Select TV */
#define KEY_TV2 0x17a /* Media Select Cable */
@@ -511,6 +516,9 @@
#define KEY_10CHANNELSUP 0x1b8 /* 10 channels up (10+) */
#define KEY_10CHANNELSDOWN 0x1b9 /* 10 channels down (10-) */
#define KEY_IMAGES 0x1ba /* AL Image Browser */
+#define KEY_NOTIFICATION_CENTER 0x1bc /* Show/hide the notification center */
+#define KEY_PICKUP_PHONE 0x1bd /* Answer incoming call */
+#define KEY_HANGUP_PHONE 0x1be /* Decline incoming call */
#define KEY_DEL_EOL 0x1c0
#define KEY_DEL_EOS 0x1c1
@@ -538,6 +546,7 @@
#define KEY_FN_F 0x1e2
#define KEY_FN_S 0x1e3
#define KEY_FN_B 0x1e4
+#define KEY_FN_RIGHT_SHIFT 0x1e5
#define KEY_BRL_DOT1 0x1f1
#define KEY_BRL_DOT2 0x1f2
@@ -592,6 +601,7 @@
#define BTN_DPAD_RIGHT 0x223
#define KEY_ALS_TOGGLE 0x230 /* Ambient light sensor */
+#define KEY_ROTATE_LOCK_TOGGLE 0x231 /* Display rotation lock */
#define KEY_BUTTONCONFIG 0x240 /* AL Button Configuration */
#define KEY_TASKMANAGER 0x241 /* AL Task/Project Manager */
@@ -600,6 +610,10 @@
#define KEY_APPSELECT 0x244 /* AL Select Task/Application */
#define KEY_SCREENSAVER 0x245 /* AL Screen Saver */
#define KEY_VOICECOMMAND 0x246 /* Listening Voice Command */
+#define KEY_ASSISTANT 0x247 /* AL Context-aware desktop assistant */
+#define KEY_KBD_LAYOUT_NEXT 0x248 /* AC Next Keyboard Layout Select */
+#define KEY_EMOJI_PICKER 0x249 /* Show/hide emoji picker (HUTRR101) */
+#define KEY_DICTATE 0x24a /* Start or Stop Voice Dictation Session (HUTRR99) */
#define KEY_BRIGHTNESS_MIN 0x250 /* Set Brightness to Minimum */
#define KEY_BRIGHTNESS_MAX 0x251 /* Set Brightness to Maximum */
@@ -611,6 +625,139 @@
#define KEY_KBDINPUTASSIST_ACCEPT 0x264
#define KEY_KBDINPUTASSIST_CANCEL 0x265
+/* Diagonal movement keys */
+#define KEY_RIGHT_UP 0x266
+#define KEY_RIGHT_DOWN 0x267
+#define KEY_LEFT_UP 0x268
+#define KEY_LEFT_DOWN 0x269
+
+#define KEY_ROOT_MENU 0x26a /* Show Device's Root Menu */
+/* Show Top Menu of the Media (e.g. DVD) */
+#define KEY_MEDIA_TOP_MENU 0x26b
+#define KEY_NUMERIC_11 0x26c
+#define KEY_NUMERIC_12 0x26d
+/*
+ * Toggle Audio Description: refers to an audio service that helps blind and
+ * visually impaired consumers understand the action in a program. Note: in
+ * some countries this is referred to as "Video Description".
+ */
+#define KEY_AUDIO_DESC 0x26e
+#define KEY_3D_MODE 0x26f
+#define KEY_NEXT_FAVORITE 0x270
+#define KEY_STOP_RECORD 0x271
+#define KEY_PAUSE_RECORD 0x272
+#define KEY_VOD 0x273 /* Video on Demand */
+#define KEY_UNMUTE 0x274
+#define KEY_FASTREVERSE 0x275
+#define KEY_SLOWREVERSE 0x276
+/*
+ * Control a data application associated with the currently viewed channel,
+ * e.g. teletext or data broadcast application (MHEG, MHP, HbbTV, etc.)
+ */
+#define KEY_DATA 0x277
+#define KEY_ONSCREEN_KEYBOARD 0x278
+/* Electronic privacy screen control */
+#define KEY_PRIVACY_SCREEN_TOGGLE 0x279
+
+/* Select an area of screen to be copied */
+#define KEY_SELECTIVE_SCREENSHOT 0x27a
+
+/* Move the focus to the next or previous user controllable element within a UI container */
+#define KEY_NEXT_ELEMENT 0x27b
+#define KEY_PREVIOUS_ELEMENT 0x27c
+
+/* Toggle Autopilot engagement */
+#define KEY_AUTOPILOT_ENGAGE_TOGGLE 0x27d
+
+/* Shortcut Keys */
+#define KEY_MARK_WAYPOINT 0x27e
+#define KEY_SOS 0x27f
+#define KEY_NAV_CHART 0x280
+#define KEY_FISHING_CHART 0x281
+#define KEY_SINGLE_RANGE_RADAR 0x282
+#define KEY_DUAL_RANGE_RADAR 0x283
+#define KEY_RADAR_OVERLAY 0x284
+#define KEY_TRADITIONAL_SONAR 0x285
+#define KEY_CLEARVU_SONAR 0x286
+#define KEY_SIDEVU_SONAR 0x287
+#define KEY_NAV_INFO 0x288
+#define KEY_BRIGHTNESS_MENU 0x289
+
+/*
+ * Some keyboards have keys which do not have a defined meaning, these keys
+ * are intended to be programmed / bound to macros by the user. For most
+ * keyboards with these macro-keys the key-sequence to inject, or action to
+ * take, is all handled by software on the host side. So from the kernel's
+ * point of view these are just normal keys.
+ *
+ * The KEY_MACRO# codes below are intended for such keys, which may be labeled
+ * e.g. G1-G18, or S1 - S30. The KEY_MACRO# codes MUST NOT be used for keys
+ * where the marking on the key does indicate a defined meaning / purpose.
+ *
+ * The KEY_MACRO# codes MUST also NOT be used as fallback for when no existing
+ * KEY_FOO define matches the marking / purpose. In this case a new KEY_FOO
+ * define MUST be added.
+ */
+#define KEY_MACRO1 0x290
+#define KEY_MACRO2 0x291
+#define KEY_MACRO3 0x292
+#define KEY_MACRO4 0x293
+#define KEY_MACRO5 0x294
+#define KEY_MACRO6 0x295
+#define KEY_MACRO7 0x296
+#define KEY_MACRO8 0x297
+#define KEY_MACRO9 0x298
+#define KEY_MACRO10 0x299
+#define KEY_MACRO11 0x29a
+#define KEY_MACRO12 0x29b
+#define KEY_MACRO13 0x29c
+#define KEY_MACRO14 0x29d
+#define KEY_MACRO15 0x29e
+#define KEY_MACRO16 0x29f
+#define KEY_MACRO17 0x2a0
+#define KEY_MACRO18 0x2a1
+#define KEY_MACRO19 0x2a2
+#define KEY_MACRO20 0x2a3
+#define KEY_MACRO21 0x2a4
+#define KEY_MACRO22 0x2a5
+#define KEY_MACRO23 0x2a6
+#define KEY_MACRO24 0x2a7
+#define KEY_MACRO25 0x2a8
+#define KEY_MACRO26 0x2a9
+#define KEY_MACRO27 0x2aa
+#define KEY_MACRO28 0x2ab
+#define KEY_MACRO29 0x2ac
+#define KEY_MACRO30 0x2ad
+
+/*
+ * Some keyboards with the macro-keys described above have some extra keys
+ * for controlling the host-side software responsible for the macro handling:
+ * -A macro recording start/stop key. Note that not all keyboards which emit
+ * KEY_MACRO_RECORD_START will also emit KEY_MACRO_RECORD_STOP if
+ * KEY_MACRO_RECORD_STOP is not advertised, then KEY_MACRO_RECORD_START
+ * should be interpreted as a recording start/stop toggle;
+ * -Keys for switching between different macro (pre)sets, either a key for
+ * cycling through the configured presets or keys to directly select a preset.
+ */
+#define KEY_MACRO_RECORD_START 0x2b0
+#define KEY_MACRO_RECORD_STOP 0x2b1
+#define KEY_MACRO_PRESET_CYCLE 0x2b2
+#define KEY_MACRO_PRESET1 0x2b3
+#define KEY_MACRO_PRESET2 0x2b4
+#define KEY_MACRO_PRESET3 0x2b5
+
+/*
+ * Some keyboards have a buildin LCD panel where the contents are controlled
+ * by the host. Often these have a number of keys directly below the LCD
+ * intended for controlling a menu shown on the LCD. These keys often don't
+ * have any labeling so we just name them KEY_KBD_LCD_MENU#
+ */
+#define KEY_KBD_LCD_MENU1 0x2b8
+#define KEY_KBD_LCD_MENU2 0x2b9
+#define KEY_KBD_LCD_MENU3 0x2ba
+#define KEY_KBD_LCD_MENU4 0x2bb
+#define KEY_KBD_LCD_MENU5 0x2bc
+
#define BTN_TRIGGER_HAPPY 0x2c0
#define BTN_TRIGGER_HAPPY1 0x2c0
#define BTN_TRIGGER_HAPPY2 0x2c1
@@ -672,6 +819,16 @@
#define REL_DIAL 0x07
#define REL_WHEEL 0x08
#define REL_MISC 0x09
+/*
+ * 0x0a is reserved and should not be used in input drivers.
+ * It was used by HID as REL_MISC+1 and userspace needs to detect if
+ * the next REL_* event is correct or is just REL_MISC + n.
+ * We define here REL_RESERVED so userspace can rely on it and detect
+ * the situation described above.
+ */
+#define REL_RESERVED 0x0a
+#define REL_WHEEL_HI_RES 0x0b
+#define REL_HWHEEL_HI_RES 0x0c
#define REL_MAX 0x0f
#define REL_CNT (REL_MAX+1)
@@ -708,6 +865,15 @@
#define ABS_MISC 0x28
+/*
+ * 0x2e is reserved and should not be used in input drivers.
+ * It was used by HID as ABS_MISC+6 and userspace needs to detect if
+ * the next ABS_* event is correct or is just ABS_MISC + n.
+ * We define here ABS_RESERVED so userspace can rely on it and detect
+ * the situation described above.
+ */
+#define ABS_RESERVED 0x2e
+
#define ABS_MT_SLOT 0x2f /* MT slot being modified */
#define ABS_MT_TOUCH_MAJOR 0x30 /* Major axis of touching ellipse */
#define ABS_MT_TOUCH_MINOR 0x31 /* Minor axis (omit if circular) */
@@ -750,6 +916,7 @@
#define SW_LINEIN_INSERT 0x0d /* set = inserted */
#define SW_MUTE_DEVICE 0x0e /* set = device disabled */
#define SW_PEN_INSERTED 0x0f /* set = pen inserted */
+#define SW_MACHINE_COVER 0x10 /* set = cover closed */
#define SW_MAX 0x10
#define SW_CNT (SW_MAX+1)
--
2.37.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 6/7] Input: add `SW_BOOT_ALT`
2022-09-22 12:12 [PATCH 0/7] add support for Theobroma Systems PX30-µQ7 (Ringneck) with Haikou devkit Quentin Schulz
` (4 preceding siblings ...)
2022-09-22 12:12 ` [PATCH 5/7] include/dt-bindings: Sync linux-event-codes with Linux kernel Quentin Schulz
@ 2022-09-22 12:12 ` Quentin Schulz
2022-09-24 8:05 ` Kever Yang
2022-09-22 12:12 ` [PATCH 7/7] rockchip: add support for PX30 Ringneck SoM on Haikou Devkit Quentin Schulz
6 siblings, 1 reply; 19+ messages in thread
From: Quentin Schulz @ 2022-09-22 12:12 UTC (permalink / raw)
Cc: foss+uboot, klaus.goger, sjg, philipp.tomsich, kever.yang, heiko,
u-boot, Quentin Schulz
From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
This event code represents the firmware source to use at boot.
Value 0 means using "standard" firmware source, value 1 means using
"alternative" firmware source.
For example, some hardware has the ability to force the BOOTROM to load
the bootloader from a secondary firmware source (say SD card) instead of
trying with the standard first and then the secondary. This event allows
the userspace to know which firmware source was requested *in hardware*.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/lkml/20220922101211.3215888-2-foss+kernel@0leil.net/
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
---
include/dt-bindings/input/linux-event-codes.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/input/linux-event-codes.h b/include/dt-bindings/input/linux-event-codes.h
index dff8e7f170..8cd2b58c81 100644
--- a/include/dt-bindings/input/linux-event-codes.h
+++ b/include/dt-bindings/input/linux-event-codes.h
@@ -917,7 +917,8 @@
#define SW_MUTE_DEVICE 0x0e /* set = device disabled */
#define SW_PEN_INSERTED 0x0f /* set = pen inserted */
#define SW_MACHINE_COVER 0x10 /* set = cover closed */
-#define SW_MAX 0x10
+#define SW_BOOT_ALT 0x11 /* set = alternative boot firmware source */
+#define SW_MAX 0x11
#define SW_CNT (SW_MAX+1)
/*
--
2.37.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 7/7] rockchip: add support for PX30 Ringneck SoM on Haikou Devkit
2022-09-22 12:12 [PATCH 0/7] add support for Theobroma Systems PX30-µQ7 (Ringneck) with Haikou devkit Quentin Schulz
` (5 preceding siblings ...)
2022-09-22 12:12 ` [PATCH 6/7] Input: add `SW_BOOT_ALT` Quentin Schulz
@ 2022-09-22 12:12 ` Quentin Schulz
2022-09-24 8:02 ` Kever Yang
6 siblings, 1 reply; 19+ messages in thread
From: Quentin Schulz @ 2022-09-22 12:12 UTC (permalink / raw)
Cc: foss+uboot, klaus.goger, sjg, philipp.tomsich, kever.yang, heiko,
u-boot, Quentin Schulz
From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip
PX30 in a micro Qseven-compatible form-factor.
PX30-µQ7 features:
* CPU: quad-core Cortex-A35
* DRAM: 2GB dual-channel
* eMMC: onboard eMMC
* SD/MMC
* TI DP83825I 10/100Mbps PHY
* USB:
* USB2.0 dual role port
* 3x USB2.0 host via onboard USB2.0 hub
* Display: MIPI-DSI
* Camera: MIPI-CSI
* onboard 2.4GHz WiFi + Bluetooth module
* Companion Controller: onboard additional Cortex-M0 microcontroller
* RTC
* fan controller
* CAN
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
---
arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi | 95 +++++
arch/arm/dts/px30-ringneck-haikou.dts | 239 ++++++++++++
arch/arm/dts/px30-ringneck.dtsi | 347 ++++++++++++++++++
arch/arm/mach-rockchip/px30/Kconfig | 25 ++
board/theobroma-systems/ringneck_px30/Kconfig | 18 +
.../ringneck_px30/MAINTAINERS | 9 +
.../theobroma-systems/ringneck_px30/Makefile | 7 +
board/theobroma-systems/ringneck_px30/README | 69 ++++
.../ringneck_px30/ringneck-px30.c | 175 +++++++++
configs/ringneck-px30_defconfig | 131 +++++++
doc/board/rockchip/rockchip.rst | 1 +
include/configs/ringneck_px30.h | 15 +
12 files changed, 1131 insertions(+)
create mode 100644 arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi
create mode 100644 arch/arm/dts/px30-ringneck-haikou.dts
create mode 100644 arch/arm/dts/px30-ringneck.dtsi
create mode 100644 board/theobroma-systems/ringneck_px30/Kconfig
create mode 100644 board/theobroma-systems/ringneck_px30/MAINTAINERS
create mode 100644 board/theobroma-systems/ringneck_px30/Makefile
create mode 100644 board/theobroma-systems/ringneck_px30/README
create mode 100644 board/theobroma-systems/ringneck_px30/ringneck-px30.c
create mode 100644 configs/ringneck-px30_defconfig
create mode 100644 include/configs/ringneck_px30.h
diff --git a/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi
new file mode 100644
index 0000000000..fc07691e1f
--- /dev/null
+++ b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "px30-u-boot.dtsi"
+
+/ {
+ config {
+ u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
+ u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
+ u-boot,boot-led = "module_led";
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ u-boot,spl-boot-order = "same-as-spl", &emmc, &sdmmc;
+ };
+};
+
+&binman {
+ simple-bin {
+ blob {
+ offset = <((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512)>;
+ };
+ };
+};
+
+&emmc_clk {
+ u-boot,dm-pre-reloc;
+};
+
+&emmc_cmd {
+ u-boot,dm-pre-reloc;
+};
+
+&emmc_bus8 {
+ u-boot,dm-pre-reloc;
+};
+
+&gpio0 {
+ u-boot,dm-pre-reloc;
+};
+
+&gpio1 {
+ u-boot,dm-pre-reloc;
+};
+
+&gpio2 {
+ u-boot,dm-pre-reloc;
+
+ /*
+ * The Qseven BIOS_DISABLE signal on the PX30-µQ7 keeps the on-module
+ * eMMC powered-down initially (in fact it keeps the reset signal
+ * asserted). BIOS_DISABLE_OVERRIDE pin allows to re-enable eMMC after
+ * the SPL has been booted from SD Card.
+ */
+ bios_disable_override {
+ u-boot,dm-pre-reloc;
+ gpios = <RK_PB5 GPIO_ACTIVE_LOW>;
+ output-high;
+ line-name = "bios_disable_override";
+ gpio-hog;
+ };
+};
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&pcfg_pull_none_8ma {
+ u-boot,dm-pre-reloc;
+};
+
+&pcfg_pull_up_8ma {
+ u-boot,dm-pre-reloc;
+};
+
+&sdmmc_bus4 {
+ u-boot,dm-pre-reloc;
+};
+
+&sdmmc_clk {
+ u-boot,dm-pre-reloc;
+};
+
+&sdmmc_cmd {
+ u-boot,dm-pre-reloc;
+};
+
+&sdmmc_det {
+ u-boot,dm-pre-reloc;
+};
+
+&uart0 {
+ clock-frequency = <24000000>;
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/px30-ringneck-haikou.dts b/arch/arm/dts/px30-ringneck-haikou.dts
new file mode 100644
index 0000000000..6304d6f7ba
--- /dev/null
+++ b/arch/arm/dts/px30-ringneck-haikou.dts
@@ -0,0 +1,239 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Theobroma Systems Design und Consulting GmbH
+ */
+
+/dts-v1/;
+#include "px30-ringneck.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Theobroma Systems PX30-µQ7 SoM on Haikou devkit";
+ compatible = "tsd,px30-ringneck-haikou", "rockchip,px30";
+
+ aliases {
+ mmc2 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio_keys: haikou-keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-0 = <&haikou_keys_pin>;
+ pinctrl-names = "default";
+
+ BATLOWn {
+ label = "BATLOW#";
+ linux,code = <KEY_BATTERY>;
+ gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
+ };
+
+ BIOS_DISABLEn {
+ label = "BIOS_DISABLE#";
+ linux,code = <SW_BOOT_ALT>;
+ linux,input-type = <EV_SW>;
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
+ };
+
+ LID_BTNn {
+ label = "LID_BTN#";
+ linux,code = <SW_LID>;
+ linux,input-type = <EV_SW>;
+ gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;
+ };
+
+ SLP_BTNn {
+ label = "SLP_BTN#";
+ linux,code = <KEY_SLEEP>;
+ gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
+ };
+
+ WAKEn {
+ label = "WAKE#";
+ linux,code = <KEY_WAKEUP>;
+ gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ };
+ };
+
+ leds {
+ pinctrl-0 = <&module_led_pin>, <&sd_card_led_pin>;
+
+ sd_card_led: led-1 {
+ label = "sd_card_led";
+ gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc2";
+ };
+ };
+
+ i2s0-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "Haikou,I2S-codec";
+ simple-audio-card,mclk-fs = <512>;
+
+ simple-audio-card,codec {
+ clocks = <&sgtl5000_clk>;
+ sound-dai = <&sgtl5000>;
+ };
+
+ simple-audio-card,cpu {
+ bitclock-master;
+ frame-master;
+ sound-dai = <&i2s0_8ch>;
+ };
+ };
+
+ sgtl5000_clk: sgtl5000-oscillator {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
+ dc_12v: dc-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc3v3_baseboard: vcc3v3-baseboard {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_baseboard";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_baseboard: vcc5v0-baseboard {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_baseboard";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vdda_codec: vdda-codec {
+ compatible = "regulator-fixed";
+ regulator-name = "vdda_codec";
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_baseboard>;
+ };
+
+ vddd_codec: vddd-codec {
+ compatible = "regulator-fixed";
+ regulator-name = "vddd_codec";
+ regulator-boot-on;
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <1600000>;
+ vin-supply = <&vcc5v0_baseboard>;
+ };
+};
+
+&i2c2 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ sgtl5000: codec@a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&sgtl5000_clk>;
+ #sound-dai-cells = <0>;
+ VDDA-supply = <&vdda_codec>;
+ VDDIO-supply = <&vcc3v3_baseboard>;
+ VDDD-supply = <&vddd_codec>;
+ status = "okay";
+ };
+};
+
+&i2c3 {
+ status = "okay";
+
+ eeprom@50 {
+ reg = <0x50>;
+ compatible = "atmel,24c01";
+ pagesize = <8>;
+ size = <128>;
+ vcc-supply = <&vcc3v3_baseboard>;
+ };
+};
+
+&i2s0_8ch {
+ status = "okay";
+};
+
+&gmac {
+ status = "okay";
+};
+
+&pinctrl {
+ haikou {
+ haikou_keys_pin: haikou-keys-pin {
+ rockchip,pins =
+ /* WAKE# */
+ <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
+ /* SLP_BTN# */
+ <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ /* LID_BTN */
+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ /* BATLOW# */
+ <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ /* BIOS_DISABLE# */
+ <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ leds {
+ sd_card_led_pin: sd-card-led-pin {
+ rockchip,pins =
+ <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ vmmc-supply = <&vcc3v3_baseboard>;
+ status = "okay";
+};
+
+&spi1 {
+ status = "okay";
+};
+
+&u2phy_otg {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-0 = <&uart5_xfer>;
+ status = "okay";
+};
+
+&usb20_otg {
+ status = "okay";
+};
diff --git a/arch/arm/dts/px30-ringneck.dtsi b/arch/arm/dts/px30-ringneck.dtsi
new file mode 100644
index 0000000000..74a7f1182c
--- /dev/null
+++ b/arch/arm/dts/px30-ringneck.dtsi
@@ -0,0 +1,347 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Theobroma Systems Design und Consulting GmbH
+ */
+
+/dts-v1/;
+#include "px30.dtsi"
+
+/ {
+ aliases {
+ mmc0 = &emmc;
+ mmc1 = &sdio;
+ rtc0 = &rtc_twi;
+ rtc1 = &rk809;
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ pinctrl-0 = <&emmc_reset>;
+ pinctrl-names = "default";
+ reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&module_led_pin>;
+ status = "okay";
+
+ module_led: led-0 {
+ label = "module_led";
+ gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ vcc5v0_sys: vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ supports-emmc;
+ mmc-pwrseq = <&emmc_pwrseq>;
+ non-removable;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_emmc>;
+
+ status = "okay";
+};
+
+/* On-module TI DP83825I PHY but no connector, enable in carrierboard */
+&gmac {
+ snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 50000 50000>;
+ phy-supply = <&vcc_3v3>;
+ clock_in_out = "output";
+};
+
+&gpu {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&pmic_int>;
+ pinctrl-names = "default";
+ #clock-cells = <0>;
+ clock-output-names = "xin32k";
+ rockchip,system-power-controller;
+ wakeup-source;
+ status = "okay";
+
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc5-supply = <&vcc_3v3>;
+ vcc6-supply = <&vcc_3v3>;
+ vcc7-supply = <&vcc_3v3>;
+ vcc9-supply = <&vcc5v0_sys>;
+
+ regulators {
+ vdd_log: DCDC_REG1 {
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_3v0_1v8: vcc_emmc: DCDC_REG4 {
+ regulator-name = "vcc_3v0_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc_3v3: DCDC_REG5 {
+ regulator-name = "vcc_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_1v8: LDO_REG2 {
+ regulator-name = "vcc_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_1v0: LDO_REG3 {
+ regulator-name = "vcc_1v0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc_lcd: LDO_REG7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vcc_lcd";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc_1v8_lcd: LDO_REG8 {
+ regulator-name = "vcc_1v8_lcd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca_1v8: LDO_REG9 {
+ regulator-name = "vcca_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+
+ /* SE05x is limited to Fast Mode */
+ clock-frequency = <400000>;
+
+ fan: fan@18 {
+ compatible = "ti,amc6821";
+ reg = <0x18>;
+ #cooling-cells = <2>;
+ };
+
+ rtc_twi: rtc@6f {
+ compatible = "isil,isl1208";
+ reg = <0x6f>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2s0_8ch {
+ rockchip,trcm-sync-tx-only;
+
+ pinctrl-0 = <&i2s0_8ch_sclktx &i2s0_8ch_lrcktx
+ &i2s0_8ch_sdo0 &i2s0_8ch_sdi0>;
+};
+
+&io_domains {
+ vccio1-supply = <&vcc_3v3>;
+ vccio2-supply = <&vccio_sd>;
+ vccio3-supply = <&vcc_3v3>;
+ vccio4-supply = <&vcc_3v3>;
+ vccio5-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_emmc>;
+ vccio-oscgpi-supply = <&vcc_3v3>;
+
+ status = "okay";
+};
+
+&pinctrl {
+ emmc {
+ emmc_reset: emmc-reset {
+ rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ module_led_pin: module-led-pin {
+ rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int: pmic_int {
+ rockchip,pins =
+ <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+};
+
+&u2phy_host {
+ status = "okay";
+};
+
+/* Mule UCAN */
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig
index 28639c0041..0d9ce4e203 100644
--- a/arch/arm/mach-rockchip/px30/Kconfig
+++ b/arch/arm/mach-rockchip/px30/Kconfig
@@ -35,6 +35,30 @@ config TARGET_PX30_CORE
* PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.
+config TARGET_RINGNECK_PX30
+ bool "Theobroma Systems PX30-µQ7 (Ringneck)"
+ help
+ The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm,
+ MXM-230 connector) system-on-module from Theobroma Systems[1],
+ featuring the Rockchip PX30.
+
+ It provides the following feature set:
+ * up to 4GB DDR4
+ * up to 128GB on-module eMMC (with 8-bit 1.8V interface)
+ * SD card (on a baseboard) via edge connector
+ * Fast Ethernet with on-module TI DP83825I PHY
+ * MIPI-DSI/LVDS
+ * MIPI-CSI
+ * USB
+ - 1x USB 2.0 dual-role
+ - 3x USB 2.0 host
+ * on-module STM32 Cortex-M0 companion controller, implementing:
+ - low-power RTC functionality (ISL1208 emulation)
+ - fan controller (AMC6821 emulation)
+ - USB<->CAN bridge controller
+ * on-module Espressif ESP32 for Bluetooth + 2.4GHz WiFi
+ * on-module NXP SE05x Secure Element
+
config ROCKCHIP_BOOT_MODE_REG
default 0xff010200
@@ -71,5 +95,6 @@ config DEBUG_UART_CHANNEL
source "board/engicam/px30_core/Kconfig"
source "board/hardkernel/odroid_go2/Kconfig"
source "board/rockchip/evb_px30/Kconfig"
+source "board/theobroma-systems/ringneck_px30/Kconfig"
endif
diff --git a/board/theobroma-systems/ringneck_px30/Kconfig b/board/theobroma-systems/ringneck_px30/Kconfig
new file mode 100644
index 0000000000..1b1a0dd665
--- /dev/null
+++ b/board/theobroma-systems/ringneck_px30/Kconfig
@@ -0,0 +1,18 @@
+if TARGET_RINGNECK_PX30
+
+config SYS_BOARD
+ default "ringneck_px30"
+
+config SYS_VENDOR
+ default "theobroma-systems"
+
+config SYS_CONFIG_NAME
+ default "ringneck_px30"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+config ENV_SIZE
+ default 0x4000
+
+endif
diff --git a/board/theobroma-systems/ringneck_px30/MAINTAINERS b/board/theobroma-systems/ringneck_px30/MAINTAINERS
new file mode 100644
index 0000000000..34b7b39650
--- /dev/null
+++ b/board/theobroma-systems/ringneck_px30/MAINTAINERS
@@ -0,0 +1,9 @@
+RINGNECK-PX30
+M: Quentin Schulz <quentin.schulz@theobroma-systems.com>
+M: Klaus Goger <klaus.goger@theobroma-systems.com>
+S: Maintained
+F: board/theobroma-systems/ringneck_px30
+F: include/configs/ringneck_px30.h
+F: arch/arm/dts/px30-ringneck*
+F: configs/ringneck-px30_defconfig
+W: https://www.theobroma-systems.com/px30-%c2%b5q7#tech-spec
diff --git a/board/theobroma-systems/ringneck_px30/Makefile b/board/theobroma-systems/ringneck_px30/Makefile
new file mode 100644
index 0000000000..31ada1a694
--- /dev/null
+++ b/board/theobroma-systems/ringneck_px30/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2022 Theobroma Systems Design und Consulting GmbH
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += ringneck-px30.o
diff --git a/board/theobroma-systems/ringneck_px30/README b/board/theobroma-systems/ringneck_px30/README
new file mode 100644
index 0000000000..e8ee5c4c50
--- /dev/null
+++ b/board/theobroma-systems/ringneck_px30/README
@@ -0,0 +1,69 @@
+Introduction
+============
+
+The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm, MXM-230
+connector) system-on-module from Theobroma Systems[1], featuring the
+Rockchip PX30.
+
+It provides the following feature set:
+ * up to 4GB DDR4
+ * up to 128GB on-module eMMC (with 8-bit 1.8V interface)
+ * SD card (on a baseboard) via edge connector
+ * Fast Ethernet with on-module TI DP83825I PHY
+ * MIPI-DSI/LVDS
+ * MIPI-CSI
+ * USB
+ - 1x USB 2.0 dual-role
+ - 3x USB 2.0 host
+ * on-module STM32 Cortex-M0 companion controller, implementing:
+ - low-power RTC functionality (ISL1208 emulation)
+ - fan controller (AMC6821 emulation)
+ - USB<->CAN bridge controller
+ * on-module Espressif ESP32 for Bluetooth + 2.4GHz WiFi
+ * on-module NXP SE05x Secure Element
+
+Here is the step-by-step to boot to U-Boot on px30.
+
+Get the Source and build ATF binary
+===================================
+
+ > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+
+Compile the ATF
+===============
+
+ > cd trusted-firmware-a
+ > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=px30 bl31
+ > cp build/px30/release/bl31/bl31.elf ../u-boot/bl31.elf
+
+Compile the U-Boot
+==================
+
+ > cd ../u-boot
+ > make CROSS_COMPILE=aarch64-linux-gnu- ringneck-px30_defconfig all
+
+Flash the image
+===============
+
+Copy u-boot-rockchip.bin to offset 32k for SD/eMMC.
+
+SD-Card
+-------
+
+ > dd if=u-boot-rockchip.bin of=/dev/sdb seek=64
+
+eMMC
+----
+
+rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with
+help of the Rockchip loader binary.
+
+ > git clone https://github.com/rockchip-linux/rkdeveloptool
+ > cd rkdeveloptool
+ > autoreconf -i && ./configure && make
+ > git clone https://github.com/rockchip-linux/rkbin.git
+ > cd rkbin
+ > ./tools/boot_merger RKBOOT/PX30MINIALL.ini
+ > cd ..
+ > ./rkdeveloptool db rkbin/px30_loader_v1.16.131.bin
+ > ./rkdeveloptool wl 64 ../u-boot-rockchip.bin
diff --git a/board/theobroma-systems/ringneck_px30/ringneck-px30.c b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
new file mode 100644
index 0000000000..47d1a40ef7
--- /dev/null
+++ b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
@@ -0,0 +1,175 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2022 Theobroma Systems Design und Consulting GmbH
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <env.h>
+#include <env_internal.h>
+#include <init.h>
+#include <log.h>
+#include <misc.h>
+#include <spl.h>
+#include <syscon.h>
+#include <u-boot/crc.h>
+#include <usb.h>
+#include <dm/pinctrl.h>
+#include <dm/uclass-internal.h>
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <asm/arch-rockchip/periph.h>
+#include <asm/arch-rockchip/misc.h>
+#include <power/regulator.h>
+#include <u-boot/sha256.h>
+
+/*
+ * Swap mmc0 and mmc1 in boot_targets if booted from SD-Card.
+ *
+ * If bootsource is uSD-card we can assume that we want to use the
+ * SD-Card instead of the eMMC as first boot_target for distroboot.
+ * We only want to swap the defaults and not any custom environment a
+ * user has set. We exit early if a changed boot_targets environment
+ * is detected.
+ */
+static int setup_boottargets(void)
+{
+ const char *boot_device =
+ ofnode_read_chosen_string("u-boot,spl-boot-device");
+ char *env_default, *env;
+
+ if (!boot_device) {
+ debug("%s: /chosen/u-boot,spl-boot-device not set\n",
+ __func__);
+ return -1;
+ }
+ debug("%s: booted from %s\n", __func__, boot_device);
+
+ env_default = env_get_default("boot_targets");
+ env = env_get("boot_targets");
+ if (!env) {
+ debug("%s: boot_targets does not exist\n", __func__);
+ return -1;
+ }
+ debug("%s: boot_targets current: %s - default: %s\n",
+ __func__, env, env_default);
+
+ if (strcmp(env_default, env) != 0) {
+ debug("%s: boot_targets not default, don't change it\n",
+ __func__);
+ return 0;
+ }
+
+ /*
+ * Make the default boot medium between SD Card and eMMC, the one that
+ * was used to load U-Boot proper.
+ */
+ bool sd_booted = !strcmp(boot_device, "/mmc@ff370000");
+ char *mmc0, *mmc1;
+
+ debug("%s: booted from %s\n", __func__,
+ sd_booted ? "SD-Card" : "eMMC");
+ mmc0 = strstr(env, "mmc0");
+ mmc1 = strstr(env, "mmc1");
+
+ if (!mmc0 || !mmc1) {
+ debug("%s: only one mmc boot_target found\n", __func__);
+ return -1;
+ }
+
+ /*
+ * If mmc0 comes first in the boot order and U-Boot proper was
+ * loaded from mmc1, swap mmc0 and mmc1 in the list.
+ * If mmc1 comes first in the boot order and U-Boot proper was
+ * loaded from mmc0, swap mmc0 and mmc1 in the list.
+ */
+ if ((mmc0 < mmc1 && sd_booted) ||
+ (mmc0 > mmc1 && !sd_booted)) {
+ mmc0[3] = '1';
+ mmc1[3] = '0';
+ debug("%s: set boot_targets to: %s\n", __func__, env);
+ env_set("boot_targets", env);
+ }
+
+ return 0;
+}
+
+int mmc_get_env_dev(void)
+{
+ const char *boot_device =
+ ofnode_read_chosen_string("u-boot,spl-boot-device");
+
+ if (!boot_device) {
+ debug("%s: /chosen/u-boot,spl-boot-device not set\n",
+ __func__);
+ return CONFIG_SYS_MMC_ENV_DEV;
+ }
+
+ debug("%s: booted from %s\n", __func__, boot_device);
+
+ if (!strcmp(boot_device, "/mmc@ff370000"))
+ return 1;
+
+ if (!strcmp(boot_device, "/mmc@ff390000"))
+ return 0;
+
+ return CONFIG_SYS_MMC_ENV_DEV;
+}
+
+#if !IS_ENABLED(CONFIG_ENV_IS_NOWHERE)
+#error Please enable CONFIG_ENV_IS_NOWHERE
+#endif
+
+enum env_location arch_env_get_location(enum env_operation op, int prio)
+{
+ const char *boot_device =
+ ofnode_read_chosen_string("u-boot,spl-boot-device");
+
+ if (prio > 0)
+ return ENVL_UNKNOWN;
+
+ if (!boot_device) {
+ debug("%s: /chosen/u-boot,spl-boot-device not set\n",
+ __func__);
+ return ENVL_NOWHERE;
+ }
+
+ debug("%s: booted from %s\n", __func__, boot_device);
+
+ if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC) &&
+ (!strcmp(boot_device, "/mmc@ff370000") ||
+ !strcmp(boot_device, "/mmc@ff390000")))
+ return ENVL_MMC;
+
+ printf("%s: No environment available: booted from %s but U-Boot "
+ "config does not allow loading environment from it.",
+ __func__, boot_device);
+
+ return ENVL_NOWHERE;
+}
+
+int misc_init_r(void)
+{
+ const u32 cpuid_offset = 0x7;
+ const u32 cpuid_length = 0x10;
+ u8 cpuid[cpuid_length];
+ int ret;
+
+ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
+ if (ret)
+ return ret;
+
+ ret = rockchip_cpuid_set(cpuid, cpuid_length);
+ if (ret)
+ return ret;
+
+ ret = rockchip_setup_macaddr();
+ if (ret)
+ return ret;
+
+ setup_boottargets();
+
+ return 0;
+}
diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig
new file mode 100644
index 0000000000..ab5ef9a70b
--- /dev/null
+++ b/configs/ringneck-px30_defconfig
@@ -0,0 +1,131 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="px30-ringneck-haikou"
+CONFIG_SPL_TEXT_BASE=0x00000000
+CONFIG_ROCKCHIP_PX30=y
+CONFIG_TARGET_RINGNECK_PX30=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_DEBUG_UART_BASE=0xFF030000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_TPL_MAX_SIZE=0x20000
+CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/px30-ringneck-haikou.dtb"
+# CONFIG_CONSOLE_MUX is not set
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SPL_MAX_SIZE=0x20000
+CONFIG_SPL_PAD_TO=0x0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+CONFIG_SPL_BOOTROM_SUPPORT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK=0x400000
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_SPL_MALLOC=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
+CONFIG_SPL_ATF=y
+# CONFIG_TPL_FRAMEWORK is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_SLEEP is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_GPIO_HOG=y
+CONFIG_SPL_GPIO_HOG=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_OTP=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_TI_GENERIC=y
+CONFIG_PHY_GIGE=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_RAM_PX30_DDR4=y
+CONFIG_DM_RESET=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
+# CONFIG_SPECIFY_CONSOLE_INDEX is not set
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SOUND=y
+CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_LCD=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_LZO=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 4ca7b00b1f..92a5c27306 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -27,6 +27,7 @@ List of mainline supported Rockchip boards:
- Engicam PX30.Core C.TOUCH 2.0 10.1 (px30-core-ctouch2-of10-px30)
- Engicam PX30.Core EDIMM2.2 Starter Kit (px30-core-edimm2.2-px30)
- Firefly Core-PX30-JD4 (firefly-px30)
+ - Theobroma Systems PX30-µQ7 SoM - Ringneck (ringneck-px30)
* rk3036
- Rockchip Evb-RK3036 (evb-rk3036)
- Kylin (kylin_rk3036)
diff --git a/include/configs/ringneck_px30.h b/include/configs/ringneck_px30.h
new file mode 100644
index 0000000000..c63c935e9a
--- /dev/null
+++ b/include/configs/ringneck_px30.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Theobroma Systems Design und Consulting GmbH
+ */
+
+#ifndef __RINGNECK_PX30_H
+#define __RINGNECK_PX30_H
+
+#include <configs/px30_common.h>
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
+#endif
--
2.37.3
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 1/7] rockchip: px30: fix CONFIG_IRAM_BASE
2022-09-22 12:12 ` [PATCH 1/7] rockchip: px30: fix CONFIG_IRAM_BASE Quentin Schulz
@ 2022-09-24 7:58 ` Kever Yang
0 siblings, 0 replies; 19+ messages in thread
From: Kever Yang @ 2022-09-24 7:58 UTC (permalink / raw)
To: Quentin Schulz
Cc: klaus.goger, sjg, philipp.tomsich, heiko, u-boot, Quentin Schulz
On 2022/9/22 20:12, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
>
> The IRAM on PX30 (or Int_MEM in datasheet) starts at 0xff0e0000 and not
> 0xff020000 as rightfully stated in the FIXME comment.
>
> Let's fix it so that BROM_BOOTSOURCE_ID_ADDR points to the correct
> address for PX30.
>
> Fixes: 46281a76bee3 ("rockchip: add core px30 headers")
> Cc: Quentin Schulz <foss+uboot@0leil.net>
> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> include/configs/px30_common.h | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
> index 49d1878ebd..c93bb053a5 100644
> --- a/include/configs/px30_common.h
> +++ b/include/configs/px30_common.h
> @@ -10,8 +10,7 @@
>
> #define CONFIG_SYS_NS16550_MEM32
>
> -/* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */
> -#define CONFIG_IRAM_BASE 0xff020000
> +#define CONFIG_IRAM_BASE 0xff0e0000
>
> #define GICD_BASE 0xff131000
> #define GICC_BASE 0xff132000
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 2/7] rockchip: px30: list possible SPL boot devices
2022-09-22 12:12 ` [PATCH 2/7] rockchip: px30: list possible SPL boot devices Quentin Schulz
@ 2022-09-24 7:58 ` Kever Yang
0 siblings, 0 replies; 19+ messages in thread
From: Kever Yang @ 2022-09-24 7:58 UTC (permalink / raw)
To: Quentin Schulz
Cc: klaus.goger, sjg, philipp.tomsich, heiko, u-boot, Quentin Schulz
On 2022/9/22 20:12, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
>
> BOOTROM sets a bit in a CPU register so that the software can know from
> where the first stage bootloader was booted. One use case for this is to
> specify the default loading medium for U-Boot proper to match the one
> used by the BOOTROM to load the SPL (same-as-spl in
> u-boot,spl-boot-order).
>
> Let's create the mapping between BOOTROM value and Device Tree node
> names for MMC devices.
>
> Cc: Quentin Schulz <foss+uboot@0leil.net>
> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> arch/arm/mach-rockchip/px30/px30.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
> index 0641e6af0f..481b50235e 100644
> --- a/arch/arm/mach-rockchip/px30/px30.c
> +++ b/arch/arm/mach-rockchip/px30/px30.c
> @@ -8,6 +8,7 @@
> #include <init.h>
> #include <asm/armv8/mmu.h>
> #include <asm/io.h>
> +#include <asm/arch-rockchip/bootrom.h>
> #include <asm/arch-rockchip/grf_px30.h>
> #include <asm/arch-rockchip/hardware.h>
> #include <asm/arch-rockchip/uart.h>
> @@ -15,6 +16,11 @@
> #include <asm/arch-rockchip/cru_px30.h>
> #include <dt-bindings/clock/px30-cru.h>
>
> +const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
> + [BROM_BOOTSOURCE_EMMC] = "/mmc@ff390000",
> + [BROM_BOOTSOURCE_SD] = "/mmc@ff370000",
> +};
> +
> static struct mm_region px30_mem_map[] = {
> {
> .virt = 0x0UL,
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 3/7] rockchip: px30: insert u-boot,spl-boot-device into U-Boot device tree
2022-09-22 12:12 ` [PATCH 3/7] rockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree Quentin Schulz
@ 2022-09-24 7:59 ` Kever Yang
0 siblings, 0 replies; 19+ messages in thread
From: Kever Yang @ 2022-09-24 7:59 UTC (permalink / raw)
To: Quentin Schulz
Cc: klaus.goger, sjg, philipp.tomsich, heiko, u-boot, Quentin Schulz
On 2022/9/22 20:12, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
>
> It is possible to boot U-Boot proper from a different storage medium
> than the one used by the BOOTROM to load the SPL. This information is
> stored in the u-boot,spl-boot-device Device Tree property and is
> accessible from U-Boot proper so that it has knowledge at runtime where
> it was loaded from.
>
> Let's add support for this feature for px30.
>
> Cc: Quentin Schulz <foss+uboot@0leil.net>
> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> arch/arm/mach-rockchip/px30/px30.c | 50 ++++++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
> index 481b50235e..5f26128d01 100644
> --- a/arch/arm/mach-rockchip/px30/px30.c
> +++ b/arch/arm/mach-rockchip/px30/px30.c
> @@ -6,6 +6,7 @@
> #include <clk.h>
> #include <dm.h>
> #include <init.h>
> +#include <spl.h>
> #include <asm/armv8/mmu.h>
> #include <asm/io.h>
> #include <asm/arch-rockchip/bootrom.h>
> @@ -427,3 +428,52 @@ void board_debug_uart_init(void)
> #endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
> }
> #endif /* CONFIG_DEBUG_UART_BOARD_INIT */
> +
> +#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
> +const char *spl_decode_boot_device(u32 boot_device)
> +{
> + int i;
> + static const struct {
> + u32 boot_device;
> + const char *ofpath;
> + } spl_boot_devices_tbl[] = {
> + { BOOT_DEVICE_MMC2, "/mmc@ff370000" },
> + { BOOT_DEVICE_MMC1, "/mmc@ff390000" },
> + };
> +
> + for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
> + if (spl_boot_devices_tbl[i].boot_device == boot_device)
> + return spl_boot_devices_tbl[i].ofpath;
> +
> + return NULL;
> +}
> +
> +void spl_perform_fixups(struct spl_image_info *spl_image)
> +{
> + void *blob = spl_image->fdt_addr;
> + const char *boot_ofpath;
> + int chosen;
> +
> + /*
> + * Inject the ofpath of the device the full U-Boot (or Linux in
> + * Falcon-mode) was booted from into the FDT, if a FDT has been
> + * loaded at the same time.
> + */
> + if (!blob)
> + return;
> +
> + boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
> + if (!boot_ofpath) {
> + pr_err("%s: could not map boot_device to ofpath\n", __func__);
> + return;
> + }
> +
> + chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
> + if (chosen < 0) {
> + pr_err("%s: could not find/create '/chosen'\n", __func__);
> + return;
> + }
> + fdt_setprop_string(blob, chosen,
> + "u-boot,spl-boot-device", boot_ofpath);
> +}
> +#endif
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 4/7] arm64: dts: rockchip: sync px30 with linux-next
2022-09-22 12:12 ` [PATCH 4/7] arm64: dts: rockchip: sync px30 with linux-next Quentin Schulz
@ 2022-09-24 7:59 ` Kever Yang
0 siblings, 0 replies; 19+ messages in thread
From: Kever Yang @ 2022-09-24 7:59 UTC (permalink / raw)
To: Quentin Schulz
Cc: klaus.goger, sjg, philipp.tomsich, heiko, u-boot, Quentin Schulz
On 2022/9/22 20:12, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
>
> Sync the px30 dtsi from linux-next tree, commit 483fed3b5dc8c ("Add
> linux-next specific files for 20220921").
>
> Cc: Quentin Schulz <foss+uboot@0leil.net>
> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> arch/arm/dts/px30.dtsi | 28 +++++++++++++++++++++++++---
> 1 file changed, 25 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
> index 00f50b05d5..bfa3580429 100644
> --- a/arch/arm/dts/px30.dtsi
> +++ b/arch/arm/dts/px30.dtsi
> @@ -365,6 +365,28 @@
> status = "disabled";
> };
>
> + i2s0_8ch: i2s@ff060000 {
> + compatible = "rockchip,px30-i2s-tdm";
> + reg = <0x0 0xff060000 0x0 0x1000>;
> + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cru SCLK_I2S0_TX>, <&cru SCLK_I2S0_RX>, <&cru HCLK_I2S0>;
> + clock-names = "mclk_tx", "mclk_rx", "hclk";
> + dmas = <&dmac 16>, <&dmac 17>;
> + dma-names = "tx", "rx";
> + rockchip,grf = <&grf>;
> + resets = <&cru SRST_I2S0_TX>, <&cru SRST_I2S0_RX>;
> + reset-names = "tx-m", "rx-m";
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2s0_8ch_sclktx &i2s0_8ch_sclkrx
> + &i2s0_8ch_lrcktx &i2s0_8ch_lrckrx
> + &i2s0_8ch_sdo0 &i2s0_8ch_sdi0
> + &i2s0_8ch_sdo1 &i2s0_8ch_sdi1
> + &i2s0_8ch_sdo2 &i2s0_8ch_sdi2
> + &i2s0_8ch_sdo3 &i2s0_8ch_sdi3>;
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> i2s1_2ch: i2s@ff070000 {
> compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
> reg = <0x0 0xff070000 0x0 0x1000>;
> @@ -528,7 +550,7 @@
> i2c0: i2c@ff180000 {
> compatible = "rockchip,px30-i2c", "rockchip,rk3399-i2c";
> reg = <0x0 0xff180000 0x0 0x1000>;
> - clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
> + clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
> clock-names = "i2c", "pclk";
> interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> pinctrl-names = "default";
> @@ -711,7 +733,7 @@
> clock-names = "pclk", "timer";
> };
>
> - dmac: dmac@ff240000 {
> + dmac: dma-controller@ff240000 {
> compatible = "arm,pl330", "arm,primecell";
> reg = <0x0 0xff240000 0x0 0x4000>;
> interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> @@ -1072,7 +1094,7 @@
> };
>
> dsi: dsi@ff450000 {
> - compatible = "rockchip,px30-mipi-dsi";
> + compatible = "rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi";
> reg = <0x0 0xff450000 0x0 0x10000>;
> interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_MIPI_DSI>;
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 5/7] include/dt-bindings: Sync linux-event-codes with Linux kernel
2022-09-22 12:12 ` [PATCH 5/7] include/dt-bindings: Sync linux-event-codes with Linux kernel Quentin Schulz
@ 2022-09-24 7:59 ` Kever Yang
0 siblings, 0 replies; 19+ messages in thread
From: Kever Yang @ 2022-09-24 7:59 UTC (permalink / raw)
To: Quentin Schulz
Cc: klaus.goger, sjg, philipp.tomsich, heiko, u-boot, Quentin Schulz
On 2022/9/22 20:12, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
>
> Sync include/dt-bindings/input/linux-event-codes.h with
> include/uapi/linux/input-event-codes.h from Linux kernel v6.0-rc6.
>
> Cc: Quentin Schulz <foss+uboot@0leil.net>
> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> include/dt-bindings/input/linux-event-codes.h | 173 +++++++++++++++++-
> 1 file changed, 170 insertions(+), 3 deletions(-)
>
> diff --git a/include/dt-bindings/input/linux-event-codes.h b/include/dt-bindings/input/linux-event-codes.h
> index 331458c0e7..dff8e7f170 100644
> --- a/include/dt-bindings/input/linux-event-codes.h
> +++ b/include/dt-bindings/input/linux-event-codes.h
> @@ -1,3 +1,4 @@
> +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
> /*
> * Input event codes
> *
> @@ -277,7 +278,8 @@
> #define KEY_PAUSECD 201
> #define KEY_PROG3 202
> #define KEY_PROG4 203
> -#define KEY_DASHBOARD 204 /* AL Dashboard */
> +#define KEY_ALL_APPLICATIONS 204 /* AC Desktop Show All Applications */
> +#define KEY_DASHBOARD KEY_ALL_APPLICATIONS
> #define KEY_SUSPEND 205
> #define KEY_CLOSE 206 /* AC Close */
> #define KEY_PLAY 207
> @@ -406,6 +408,7 @@
> #define BTN_TOOL_MOUSE 0x146
> #define BTN_TOOL_LENS 0x147
> #define BTN_TOOL_QUINTTAP 0x148 /* Five fingers on trackpad */
> +#define BTN_STYLUS3 0x149
> #define BTN_TOUCH 0x14a
> #define BTN_STYLUS 0x14b
> #define BTN_STYLUS2 0x14c
> @@ -437,10 +440,12 @@
> #define KEY_TITLE 0x171
> #define KEY_SUBTITLE 0x172
> #define KEY_ANGLE 0x173
> -#define KEY_ZOOM 0x174
> +#define KEY_FULL_SCREEN 0x174 /* AC View Toggle */
> +#define KEY_ZOOM KEY_FULL_SCREEN
> #define KEY_MODE 0x175
> #define KEY_KEYBOARD 0x176
> -#define KEY_SCREEN 0x177
> +#define KEY_ASPECT_RATIO 0x177 /* HUTRR37: Aspect */
> +#define KEY_SCREEN KEY_ASPECT_RATIO
> #define KEY_PC 0x178 /* Media Select Computer */
> #define KEY_TV 0x179 /* Media Select TV */
> #define KEY_TV2 0x17a /* Media Select Cable */
> @@ -511,6 +516,9 @@
> #define KEY_10CHANNELSUP 0x1b8 /* 10 channels up (10+) */
> #define KEY_10CHANNELSDOWN 0x1b9 /* 10 channels down (10-) */
> #define KEY_IMAGES 0x1ba /* AL Image Browser */
> +#define KEY_NOTIFICATION_CENTER 0x1bc /* Show/hide the notification center */
> +#define KEY_PICKUP_PHONE 0x1bd /* Answer incoming call */
> +#define KEY_HANGUP_PHONE 0x1be /* Decline incoming call */
>
> #define KEY_DEL_EOL 0x1c0
> #define KEY_DEL_EOS 0x1c1
> @@ -538,6 +546,7 @@
> #define KEY_FN_F 0x1e2
> #define KEY_FN_S 0x1e3
> #define KEY_FN_B 0x1e4
> +#define KEY_FN_RIGHT_SHIFT 0x1e5
>
> #define KEY_BRL_DOT1 0x1f1
> #define KEY_BRL_DOT2 0x1f2
> @@ -592,6 +601,7 @@
> #define BTN_DPAD_RIGHT 0x223
>
> #define KEY_ALS_TOGGLE 0x230 /* Ambient light sensor */
> +#define KEY_ROTATE_LOCK_TOGGLE 0x231 /* Display rotation lock */
>
> #define KEY_BUTTONCONFIG 0x240 /* AL Button Configuration */
> #define KEY_TASKMANAGER 0x241 /* AL Task/Project Manager */
> @@ -600,6 +610,10 @@
> #define KEY_APPSELECT 0x244 /* AL Select Task/Application */
> #define KEY_SCREENSAVER 0x245 /* AL Screen Saver */
> #define KEY_VOICECOMMAND 0x246 /* Listening Voice Command */
> +#define KEY_ASSISTANT 0x247 /* AL Context-aware desktop assistant */
> +#define KEY_KBD_LAYOUT_NEXT 0x248 /* AC Next Keyboard Layout Select */
> +#define KEY_EMOJI_PICKER 0x249 /* Show/hide emoji picker (HUTRR101) */
> +#define KEY_DICTATE 0x24a /* Start or Stop Voice Dictation Session (HUTRR99) */
>
> #define KEY_BRIGHTNESS_MIN 0x250 /* Set Brightness to Minimum */
> #define KEY_BRIGHTNESS_MAX 0x251 /* Set Brightness to Maximum */
> @@ -611,6 +625,139 @@
> #define KEY_KBDINPUTASSIST_ACCEPT 0x264
> #define KEY_KBDINPUTASSIST_CANCEL 0x265
>
> +/* Diagonal movement keys */
> +#define KEY_RIGHT_UP 0x266
> +#define KEY_RIGHT_DOWN 0x267
> +#define KEY_LEFT_UP 0x268
> +#define KEY_LEFT_DOWN 0x269
> +
> +#define KEY_ROOT_MENU 0x26a /* Show Device's Root Menu */
> +/* Show Top Menu of the Media (e.g. DVD) */
> +#define KEY_MEDIA_TOP_MENU 0x26b
> +#define KEY_NUMERIC_11 0x26c
> +#define KEY_NUMERIC_12 0x26d
> +/*
> + * Toggle Audio Description: refers to an audio service that helps blind and
> + * visually impaired consumers understand the action in a program. Note: in
> + * some countries this is referred to as "Video Description".
> + */
> +#define KEY_AUDIO_DESC 0x26e
> +#define KEY_3D_MODE 0x26f
> +#define KEY_NEXT_FAVORITE 0x270
> +#define KEY_STOP_RECORD 0x271
> +#define KEY_PAUSE_RECORD 0x272
> +#define KEY_VOD 0x273 /* Video on Demand */
> +#define KEY_UNMUTE 0x274
> +#define KEY_FASTREVERSE 0x275
> +#define KEY_SLOWREVERSE 0x276
> +/*
> + * Control a data application associated with the currently viewed channel,
> + * e.g. teletext or data broadcast application (MHEG, MHP, HbbTV, etc.)
> + */
> +#define KEY_DATA 0x277
> +#define KEY_ONSCREEN_KEYBOARD 0x278
> +/* Electronic privacy screen control */
> +#define KEY_PRIVACY_SCREEN_TOGGLE 0x279
> +
> +/* Select an area of screen to be copied */
> +#define KEY_SELECTIVE_SCREENSHOT 0x27a
> +
> +/* Move the focus to the next or previous user controllable element within a UI container */
> +#define KEY_NEXT_ELEMENT 0x27b
> +#define KEY_PREVIOUS_ELEMENT 0x27c
> +
> +/* Toggle Autopilot engagement */
> +#define KEY_AUTOPILOT_ENGAGE_TOGGLE 0x27d
> +
> +/* Shortcut Keys */
> +#define KEY_MARK_WAYPOINT 0x27e
> +#define KEY_SOS 0x27f
> +#define KEY_NAV_CHART 0x280
> +#define KEY_FISHING_CHART 0x281
> +#define KEY_SINGLE_RANGE_RADAR 0x282
> +#define KEY_DUAL_RANGE_RADAR 0x283
> +#define KEY_RADAR_OVERLAY 0x284
> +#define KEY_TRADITIONAL_SONAR 0x285
> +#define KEY_CLEARVU_SONAR 0x286
> +#define KEY_SIDEVU_SONAR 0x287
> +#define KEY_NAV_INFO 0x288
> +#define KEY_BRIGHTNESS_MENU 0x289
> +
> +/*
> + * Some keyboards have keys which do not have a defined meaning, these keys
> + * are intended to be programmed / bound to macros by the user. For most
> + * keyboards with these macro-keys the key-sequence to inject, or action to
> + * take, is all handled by software on the host side. So from the kernel's
> + * point of view these are just normal keys.
> + *
> + * The KEY_MACRO# codes below are intended for such keys, which may be labeled
> + * e.g. G1-G18, or S1 - S30. The KEY_MACRO# codes MUST NOT be used for keys
> + * where the marking on the key does indicate a defined meaning / purpose.
> + *
> + * The KEY_MACRO# codes MUST also NOT be used as fallback for when no existing
> + * KEY_FOO define matches the marking / purpose. In this case a new KEY_FOO
> + * define MUST be added.
> + */
> +#define KEY_MACRO1 0x290
> +#define KEY_MACRO2 0x291
> +#define KEY_MACRO3 0x292
> +#define KEY_MACRO4 0x293
> +#define KEY_MACRO5 0x294
> +#define KEY_MACRO6 0x295
> +#define KEY_MACRO7 0x296
> +#define KEY_MACRO8 0x297
> +#define KEY_MACRO9 0x298
> +#define KEY_MACRO10 0x299
> +#define KEY_MACRO11 0x29a
> +#define KEY_MACRO12 0x29b
> +#define KEY_MACRO13 0x29c
> +#define KEY_MACRO14 0x29d
> +#define KEY_MACRO15 0x29e
> +#define KEY_MACRO16 0x29f
> +#define KEY_MACRO17 0x2a0
> +#define KEY_MACRO18 0x2a1
> +#define KEY_MACRO19 0x2a2
> +#define KEY_MACRO20 0x2a3
> +#define KEY_MACRO21 0x2a4
> +#define KEY_MACRO22 0x2a5
> +#define KEY_MACRO23 0x2a6
> +#define KEY_MACRO24 0x2a7
> +#define KEY_MACRO25 0x2a8
> +#define KEY_MACRO26 0x2a9
> +#define KEY_MACRO27 0x2aa
> +#define KEY_MACRO28 0x2ab
> +#define KEY_MACRO29 0x2ac
> +#define KEY_MACRO30 0x2ad
> +
> +/*
> + * Some keyboards with the macro-keys described above have some extra keys
> + * for controlling the host-side software responsible for the macro handling:
> + * -A macro recording start/stop key. Note that not all keyboards which emit
> + * KEY_MACRO_RECORD_START will also emit KEY_MACRO_RECORD_STOP if
> + * KEY_MACRO_RECORD_STOP is not advertised, then KEY_MACRO_RECORD_START
> + * should be interpreted as a recording start/stop toggle;
> + * -Keys for switching between different macro (pre)sets, either a key for
> + * cycling through the configured presets or keys to directly select a preset.
> + */
> +#define KEY_MACRO_RECORD_START 0x2b0
> +#define KEY_MACRO_RECORD_STOP 0x2b1
> +#define KEY_MACRO_PRESET_CYCLE 0x2b2
> +#define KEY_MACRO_PRESET1 0x2b3
> +#define KEY_MACRO_PRESET2 0x2b4
> +#define KEY_MACRO_PRESET3 0x2b5
> +
> +/*
> + * Some keyboards have a buildin LCD panel where the contents are controlled
> + * by the host. Often these have a number of keys directly below the LCD
> + * intended for controlling a menu shown on the LCD. These keys often don't
> + * have any labeling so we just name them KEY_KBD_LCD_MENU#
> + */
> +#define KEY_KBD_LCD_MENU1 0x2b8
> +#define KEY_KBD_LCD_MENU2 0x2b9
> +#define KEY_KBD_LCD_MENU3 0x2ba
> +#define KEY_KBD_LCD_MENU4 0x2bb
> +#define KEY_KBD_LCD_MENU5 0x2bc
> +
> #define BTN_TRIGGER_HAPPY 0x2c0
> #define BTN_TRIGGER_HAPPY1 0x2c0
> #define BTN_TRIGGER_HAPPY2 0x2c1
> @@ -672,6 +819,16 @@
> #define REL_DIAL 0x07
> #define REL_WHEEL 0x08
> #define REL_MISC 0x09
> +/*
> + * 0x0a is reserved and should not be used in input drivers.
> + * It was used by HID as REL_MISC+1 and userspace needs to detect if
> + * the next REL_* event is correct or is just REL_MISC + n.
> + * We define here REL_RESERVED so userspace can rely on it and detect
> + * the situation described above.
> + */
> +#define REL_RESERVED 0x0a
> +#define REL_WHEEL_HI_RES 0x0b
> +#define REL_HWHEEL_HI_RES 0x0c
> #define REL_MAX 0x0f
> #define REL_CNT (REL_MAX+1)
>
> @@ -708,6 +865,15 @@
>
> #define ABS_MISC 0x28
>
> +/*
> + * 0x2e is reserved and should not be used in input drivers.
> + * It was used by HID as ABS_MISC+6 and userspace needs to detect if
> + * the next ABS_* event is correct or is just ABS_MISC + n.
> + * We define here ABS_RESERVED so userspace can rely on it and detect
> + * the situation described above.
> + */
> +#define ABS_RESERVED 0x2e
> +
> #define ABS_MT_SLOT 0x2f /* MT slot being modified */
> #define ABS_MT_TOUCH_MAJOR 0x30 /* Major axis of touching ellipse */
> #define ABS_MT_TOUCH_MINOR 0x31 /* Minor axis (omit if circular) */
> @@ -750,6 +916,7 @@
> #define SW_LINEIN_INSERT 0x0d /* set = inserted */
> #define SW_MUTE_DEVICE 0x0e /* set = device disabled */
> #define SW_PEN_INSERTED 0x0f /* set = pen inserted */
> +#define SW_MACHINE_COVER 0x10 /* set = cover closed */
> #define SW_MAX 0x10
> #define SW_CNT (SW_MAX+1)
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 7/7] rockchip: add support for PX30 Ringneck SoM on Haikou Devkit
2022-09-22 12:12 ` [PATCH 7/7] rockchip: add support for PX30 Ringneck SoM on Haikou Devkit Quentin Schulz
@ 2022-09-24 8:02 ` Kever Yang
2022-09-26 9:50 ` Quentin Schulz
0 siblings, 1 reply; 19+ messages in thread
From: Kever Yang @ 2022-09-24 8:02 UTC (permalink / raw)
To: Quentin Schulz
Cc: klaus.goger, sjg, philipp.tomsich, heiko, u-boot, Quentin Schulz
Hi Quentin,
Does the dts already available on mainline kernel? If yes, please
provide the commit number.
Thanks,
- Kever
On 2022/9/22 20:12, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
>
> The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip
> PX30 in a micro Qseven-compatible form-factor.
>
> PX30-µQ7 features:
> * CPU: quad-core Cortex-A35
> * DRAM: 2GB dual-channel
> * eMMC: onboard eMMC
> * SD/MMC
> * TI DP83825I 10/100Mbps PHY
> * USB:
> * USB2.0 dual role port
> * 3x USB2.0 host via onboard USB2.0 hub
> * Display: MIPI-DSI
> * Camera: MIPI-CSI
> * onboard 2.4GHz WiFi + Bluetooth module
> * Companion Controller: onboard additional Cortex-M0 microcontroller
> * RTC
> * fan controller
> * CAN
>
> Cc: Quentin Schulz <foss+uboot@0leil.net>
> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
> ---
> arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi | 95 +++++
> arch/arm/dts/px30-ringneck-haikou.dts | 239 ++++++++++++
> arch/arm/dts/px30-ringneck.dtsi | 347 ++++++++++++++++++
> arch/arm/mach-rockchip/px30/Kconfig | 25 ++
> board/theobroma-systems/ringneck_px30/Kconfig | 18 +
> .../ringneck_px30/MAINTAINERS | 9 +
> .../theobroma-systems/ringneck_px30/Makefile | 7 +
> board/theobroma-systems/ringneck_px30/README | 69 ++++
> .../ringneck_px30/ringneck-px30.c | 175 +++++++++
> configs/ringneck-px30_defconfig | 131 +++++++
> doc/board/rockchip/rockchip.rst | 1 +
> include/configs/ringneck_px30.h | 15 +
> 12 files changed, 1131 insertions(+)
> create mode 100644 arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi
> create mode 100644 arch/arm/dts/px30-ringneck-haikou.dts
> create mode 100644 arch/arm/dts/px30-ringneck.dtsi
> create mode 100644 board/theobroma-systems/ringneck_px30/Kconfig
> create mode 100644 board/theobroma-systems/ringneck_px30/MAINTAINERS
> create mode 100644 board/theobroma-systems/ringneck_px30/Makefile
> create mode 100644 board/theobroma-systems/ringneck_px30/README
> create mode 100644 board/theobroma-systems/ringneck_px30/ringneck-px30.c
> create mode 100644 configs/ringneck-px30_defconfig
> create mode 100644 include/configs/ringneck_px30.h
>
> diff --git a/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi
> new file mode 100644
> index 0000000000..fc07691e1f
> --- /dev/null
> +++ b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi
> @@ -0,0 +1,95 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +
> +#include "px30-u-boot.dtsi"
> +
> +/ {
> + config {
> + u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
> + u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
> + u-boot,boot-led = "module_led";
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + u-boot,spl-boot-order = "same-as-spl", &emmc, &sdmmc;
> + };
> +};
> +
> +&binman {
> + simple-bin {
> + blob {
> + offset = <((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512)>;
> + };
> + };
> +};
> +
> +&emmc_clk {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&emmc_cmd {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&emmc_bus8 {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpio0 {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpio1 {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpio2 {
> + u-boot,dm-pre-reloc;
> +
> + /*
> + * The Qseven BIOS_DISABLE signal on the PX30-µQ7 keeps the on-module
> + * eMMC powered-down initially (in fact it keeps the reset signal
> + * asserted). BIOS_DISABLE_OVERRIDE pin allows to re-enable eMMC after
> + * the SPL has been booted from SD Card.
> + */
> + bios_disable_override {
> + u-boot,dm-pre-reloc;
> + gpios = <RK_PB5 GPIO_ACTIVE_LOW>;
> + output-high;
> + line-name = "bios_disable_override";
> + gpio-hog;
> + };
> +};
> +
> +&pinctrl {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&pcfg_pull_none_8ma {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&pcfg_pull_up_8ma {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&sdmmc_bus4 {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&sdmmc_clk {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&sdmmc_cmd {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&sdmmc_det {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&uart0 {
> + clock-frequency = <24000000>;
> + u-boot,dm-pre-reloc;
> +};
> diff --git a/arch/arm/dts/px30-ringneck-haikou.dts b/arch/arm/dts/px30-ringneck-haikou.dts
> new file mode 100644
> index 0000000000..6304d6f7ba
> --- /dev/null
> +++ b/arch/arm/dts/px30-ringneck-haikou.dts
> @@ -0,0 +1,239 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2022 Theobroma Systems Design und Consulting GmbH
> + */
> +
> +/dts-v1/;
> +#include "px30-ringneck.dtsi"
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> + model = "Theobroma Systems PX30-µQ7 SoM on Haikou devkit";
> + compatible = "tsd,px30-ringneck-haikou", "rockchip,px30";
> +
> + aliases {
> + mmc2 = &sdmmc;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + gpio_keys: haikou-keys {
> + compatible = "gpio-keys";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-0 = <&haikou_keys_pin>;
> + pinctrl-names = "default";
> +
> + BATLOWn {
> + label = "BATLOW#";
> + linux,code = <KEY_BATTERY>;
> + gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
> + };
> +
> + BIOS_DISABLEn {
> + label = "BIOS_DISABLE#";
> + linux,code = <SW_BOOT_ALT>;
> + linux,input-type = <EV_SW>;
> + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
> + };
> +
> + LID_BTNn {
> + label = "LID_BTN#";
> + linux,code = <SW_LID>;
> + linux,input-type = <EV_SW>;
> + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;
> + };
> +
> + SLP_BTNn {
> + label = "SLP_BTN#";
> + linux,code = <KEY_SLEEP>;
> + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
> + };
> +
> + WAKEn {
> + label = "WAKE#";
> + linux,code = <KEY_WAKEUP>;
> + gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
> + wakeup-source;
> + };
> + };
> +
> + leds {
> + pinctrl-0 = <&module_led_pin>, <&sd_card_led_pin>;
> +
> + sd_card_led: led-1 {
> + label = "sd_card_led";
> + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "mmc2";
> + };
> + };
> +
> + i2s0-sound {
> + compatible = "simple-audio-card";
> + simple-audio-card,format = "i2s";
> + simple-audio-card,name = "Haikou,I2S-codec";
> + simple-audio-card,mclk-fs = <512>;
> +
> + simple-audio-card,codec {
> + clocks = <&sgtl5000_clk>;
> + sound-dai = <&sgtl5000>;
> + };
> +
> + simple-audio-card,cpu {
> + bitclock-master;
> + frame-master;
> + sound-dai = <&i2s0_8ch>;
> + };
> + };
> +
> + sgtl5000_clk: sgtl5000-oscillator {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <24576000>;
> + };
> +
> + dc_12v: dc-12v {
> + compatible = "regulator-fixed";
> + regulator-name = "dc_12v";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + };
> +
> + vcc3v3_baseboard: vcc3v3-baseboard {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3_baseboard";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&dc_12v>;
> + };
> +
> + vcc5v0_baseboard: vcc5v0-baseboard {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_baseboard";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&dc_12v>;
> + };
> +
> + vdda_codec: vdda-codec {
> + compatible = "regulator-fixed";
> + regulator-name = "vdda_codec";
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc5v0_baseboard>;
> + };
> +
> + vddd_codec: vddd-codec {
> + compatible = "regulator-fixed";
> + regulator-name = "vddd_codec";
> + regulator-boot-on;
> + regulator-min-microvolt = <1600000>;
> + regulator-max-microvolt = <1600000>;
> + vin-supply = <&vcc5v0_baseboard>;
> + };
> +};
> +
> +&i2c2 {
> + status = "okay";
> + clock-frequency = <400000>;
> +
> + sgtl5000: codec@a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&sgtl5000_clk>;
> + #sound-dai-cells = <0>;
> + VDDA-supply = <&vdda_codec>;
> + VDDIO-supply = <&vcc3v3_baseboard>;
> + VDDD-supply = <&vddd_codec>;
> + status = "okay";
> + };
> +};
> +
> +&i2c3 {
> + status = "okay";
> +
> + eeprom@50 {
> + reg = <0x50>;
> + compatible = "atmel,24c01";
> + pagesize = <8>;
> + size = <128>;
> + vcc-supply = <&vcc3v3_baseboard>;
> + };
> +};
> +
> +&i2s0_8ch {
> + status = "okay";
> +};
> +
> +&gmac {
> + status = "okay";
> +};
> +
> +&pinctrl {
> + haikou {
> + haikou_keys_pin: haikou-keys-pin {
> + rockchip,pins =
> + /* WAKE# */
> + <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
> + /* SLP_BTN# */
> + <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
> + /* LID_BTN */
> + <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
> + /* BATLOW# */
> + <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
> + /* BIOS_DISABLE# */
> + <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + leds {
> + sd_card_led_pin: sd-card-led-pin {
> + rockchip,pins =
> + <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +};
> +
> +&pwm0 {
> + status = "okay";
> +};
> +
> +&sdmmc {
> + bus-width = <4>;
> + cap-mmc-highspeed;
> + cap-sd-highspeed;
> + cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>;
> + disable-wp;
> + vmmc-supply = <&vcc3v3_baseboard>;
> + status = "okay";
> +};
> +
> +&spi1 {
> + status = "okay";
> +};
> +
> +&u2phy_otg {
> + status = "okay";
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> +&uart5 {
> + pinctrl-0 = <&uart5_xfer>;
> + status = "okay";
> +};
> +
> +&usb20_otg {
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/px30-ringneck.dtsi b/arch/arm/dts/px30-ringneck.dtsi
> new file mode 100644
> index 0000000000..74a7f1182c
> --- /dev/null
> +++ b/arch/arm/dts/px30-ringneck.dtsi
> @@ -0,0 +1,347 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2022 Theobroma Systems Design und Consulting GmbH
> + */
> +
> +/dts-v1/;
> +#include "px30.dtsi"
> +
> +/ {
> + aliases {
> + mmc0 = &emmc;
> + mmc1 = &sdio;
> + rtc0 = &rtc_twi;
> + rtc1 = &rk809;
> + };
> +
> + emmc_pwrseq: emmc-pwrseq {
> + compatible = "mmc-pwrseq-emmc";
> + pinctrl-0 = <&emmc_reset>;
> + pinctrl-names = "default";
> + reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&module_led_pin>;
> + status = "okay";
> +
> + module_led: led-0 {
> + label = "module_led";
> + gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + vcc5v0_sys: vccsys {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +};
> +
> +&cpu0 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu1 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu2 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&cpu3 {
> + cpu-supply = <&vdd_arm>;
> +};
> +
> +&emmc {
> + bus-width = <8>;
> + cap-mmc-highspeed;
> + mmc-hs200-1_8v;
> + supports-emmc;
> + mmc-pwrseq = <&emmc_pwrseq>;
> + non-removable;
> + vmmc-supply = <&vcc_3v3>;
> + vqmmc-supply = <&vcc_emmc>;
> +
> + status = "okay";
> +};
> +
> +/* On-module TI DP83825I PHY but no connector, enable in carrierboard */
> +&gmac {
> + snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 50000 50000>;
> + phy-supply = <&vcc_3v3>;
> + clock_in_out = "output";
> +};
> +
> +&gpu {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + status = "okay";
> +
> + rk809: pmic@20 {
> + compatible = "rockchip,rk809";
> + reg = <0x20>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-0 = <&pmic_int>;
> + pinctrl-names = "default";
> + #clock-cells = <0>;
> + clock-output-names = "xin32k";
> + rockchip,system-power-controller;
> + wakeup-source;
> + status = "okay";
> +
> + vcc1-supply = <&vcc5v0_sys>;
> + vcc2-supply = <&vcc5v0_sys>;
> + vcc3-supply = <&vcc5v0_sys>;
> + vcc4-supply = <&vcc5v0_sys>;
> + vcc5-supply = <&vcc_3v3>;
> + vcc6-supply = <&vcc_3v3>;
> + vcc7-supply = <&vcc_3v3>;
> + vcc9-supply = <&vcc5v0_sys>;
> +
> + regulators {
> + vdd_log: DCDC_REG1 {
> + regulator-name = "vdd_log";
> + regulator-min-microvolt = <950000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-ramp-delay = <6001>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <950000>;
> + };
> + };
> +
> + vdd_arm: DCDC_REG2 {
> + regulator-name = "vdd_arm";
> + regulator-min-microvolt = <950000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-ramp-delay = <6001>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <950000>;
> + };
> + };
> +
> + vcc_ddr: DCDC_REG3 {
> + regulator-name = "vcc_ddr";
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vcc_3v0_1v8: vcc_emmc: DCDC_REG4 {
> + regulator-name = "vcc_3v0_1v8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3000000>;
> + };
> + };
> +
> + vcc_3v3: DCDC_REG5 {
> + regulator-name = "vcc_3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vcc_1v8: LDO_REG2 {
> + regulator-name = "vcc_1v8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcc_1v0: LDO_REG3 {
> + regulator-name = "vcc_1v0";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> + };
> +
> + vccio_sd: LDO_REG5 {
> + regulator-name = "vccio_sd";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3000000>;
> + };
> + };
> +
> + vcc_lcd: LDO_REG7 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-name = "vcc_lcd";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> + };
> +
> + vcc_1v8_lcd: LDO_REG8 {
> + regulator-name = "vcc_1v8_lcd";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcca_1v8: LDO_REG9 {
> + regulator-name = "vcca_1v8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> + };
> + };
> +};
> +
> +&i2c1 {
> + status = "okay";
> +
> + /* SE05x is limited to Fast Mode */
> + clock-frequency = <400000>;
> +
> + fan: fan@18 {
> + compatible = "ti,amc6821";
> + reg = <0x18>;
> + #cooling-cells = <2>;
> + };
> +
> + rtc_twi: rtc@6f {
> + compatible = "isil,isl1208";
> + reg = <0x6f>;
> + };
> +};
> +
> +&i2c3 {
> + status = "okay";
> +};
> +
> +&i2s0_8ch {
> + rockchip,trcm-sync-tx-only;
> +
> + pinctrl-0 = <&i2s0_8ch_sclktx &i2s0_8ch_lrcktx
> + &i2s0_8ch_sdo0 &i2s0_8ch_sdi0>;
> +};
> +
> +&io_domains {
> + vccio1-supply = <&vcc_3v3>;
> + vccio2-supply = <&vccio_sd>;
> + vccio3-supply = <&vcc_3v3>;
> + vccio4-supply = <&vcc_3v3>;
> + vccio5-supply = <&vcc_3v3>;
> + vccio6-supply = <&vcc_emmc>;
> + vccio-oscgpi-supply = <&vcc_3v3>;
> +
> + status = "okay";
> +};
> +
> +&pinctrl {
> + emmc {
> + emmc_reset: emmc-reset {
> + rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + leds {
> + module_led_pin: module-led-pin {
> + rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + pmic {
> + pmic_int: pmic_int {
> + rockchip,pins =
> + <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> +
> +};
> +
> +&tsadc {
> + status = "okay";
> +};
> +
> +&u2phy {
> + status = "okay";
> +};
> +
> +&u2phy_host {
> + status = "okay";
> +};
> +
> +/* Mule UCAN */
> +&usb_host0_ehci {
> + status = "okay";
> +};
> +
> +&usb_host0_ohci {
> + status = "okay";
> +};
> +
> +&wdt {
> + status = "okay";
> +};
> diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig
> index 28639c0041..0d9ce4e203 100644
> --- a/arch/arm/mach-rockchip/px30/Kconfig
> +++ b/arch/arm/mach-rockchip/px30/Kconfig
> @@ -35,6 +35,30 @@ config TARGET_PX30_CORE
> * PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
> 10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.
>
> +config TARGET_RINGNECK_PX30
> + bool "Theobroma Systems PX30-µQ7 (Ringneck)"
> + help
> + The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm,
> + MXM-230 connector) system-on-module from Theobroma Systems[1],
> + featuring the Rockchip PX30.
> +
> + It provides the following feature set:
> + * up to 4GB DDR4
> + * up to 128GB on-module eMMC (with 8-bit 1.8V interface)
> + * SD card (on a baseboard) via edge connector
> + * Fast Ethernet with on-module TI DP83825I PHY
> + * MIPI-DSI/LVDS
> + * MIPI-CSI
> + * USB
> + - 1x USB 2.0 dual-role
> + - 3x USB 2.0 host
> + * on-module STM32 Cortex-M0 companion controller, implementing:
> + - low-power RTC functionality (ISL1208 emulation)
> + - fan controller (AMC6821 emulation)
> + - USB<->CAN bridge controller
> + * on-module Espressif ESP32 for Bluetooth + 2.4GHz WiFi
> + * on-module NXP SE05x Secure Element
> +
> config ROCKCHIP_BOOT_MODE_REG
> default 0xff010200
>
> @@ -71,5 +95,6 @@ config DEBUG_UART_CHANNEL
> source "board/engicam/px30_core/Kconfig"
> source "board/hardkernel/odroid_go2/Kconfig"
> source "board/rockchip/evb_px30/Kconfig"
> +source "board/theobroma-systems/ringneck_px30/Kconfig"
>
> endif
> diff --git a/board/theobroma-systems/ringneck_px30/Kconfig b/board/theobroma-systems/ringneck_px30/Kconfig
> new file mode 100644
> index 0000000000..1b1a0dd665
> --- /dev/null
> +++ b/board/theobroma-systems/ringneck_px30/Kconfig
> @@ -0,0 +1,18 @@
> +if TARGET_RINGNECK_PX30
> +
> +config SYS_BOARD
> + default "ringneck_px30"
> +
> +config SYS_VENDOR
> + default "theobroma-systems"
> +
> +config SYS_CONFIG_NAME
> + default "ringneck_px30"
> +
> +config BOARD_SPECIFIC_OPTIONS # dummy
> + def_bool y
> +
> +config ENV_SIZE
> + default 0x4000
> +
> +endif
> diff --git a/board/theobroma-systems/ringneck_px30/MAINTAINERS b/board/theobroma-systems/ringneck_px30/MAINTAINERS
> new file mode 100644
> index 0000000000..34b7b39650
> --- /dev/null
> +++ b/board/theobroma-systems/ringneck_px30/MAINTAINERS
> @@ -0,0 +1,9 @@
> +RINGNECK-PX30
> +M: Quentin Schulz <quentin.schulz@theobroma-systems.com>
> +M: Klaus Goger <klaus.goger@theobroma-systems.com>
> +S: Maintained
> +F: board/theobroma-systems/ringneck_px30
> +F: include/configs/ringneck_px30.h
> +F: arch/arm/dts/px30-ringneck*
> +F: configs/ringneck-px30_defconfig
> +W: https://www.theobroma-systems.com/px30-%c2%b5q7#tech-spec
> diff --git a/board/theobroma-systems/ringneck_px30/Makefile b/board/theobroma-systems/ringneck_px30/Makefile
> new file mode 100644
> index 0000000000..31ada1a694
> --- /dev/null
> +++ b/board/theobroma-systems/ringneck_px30/Makefile
> @@ -0,0 +1,7 @@
> +#
> +# (C) Copyright 2022 Theobroma Systems Design und Consulting GmbH
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +obj-y += ringneck-px30.o
> diff --git a/board/theobroma-systems/ringneck_px30/README b/board/theobroma-systems/ringneck_px30/README
> new file mode 100644
> index 0000000000..e8ee5c4c50
> --- /dev/null
> +++ b/board/theobroma-systems/ringneck_px30/README
> @@ -0,0 +1,69 @@
> +Introduction
> +============
> +
> +The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm, MXM-230
> +connector) system-on-module from Theobroma Systems[1], featuring the
> +Rockchip PX30.
> +
> +It provides the following feature set:
> + * up to 4GB DDR4
> + * up to 128GB on-module eMMC (with 8-bit 1.8V interface)
> + * SD card (on a baseboard) via edge connector
> + * Fast Ethernet with on-module TI DP83825I PHY
> + * MIPI-DSI/LVDS
> + * MIPI-CSI
> + * USB
> + - 1x USB 2.0 dual-role
> + - 3x USB 2.0 host
> + * on-module STM32 Cortex-M0 companion controller, implementing:
> + - low-power RTC functionality (ISL1208 emulation)
> + - fan controller (AMC6821 emulation)
> + - USB<->CAN bridge controller
> + * on-module Espressif ESP32 for Bluetooth + 2.4GHz WiFi
> + * on-module NXP SE05x Secure Element
> +
> +Here is the step-by-step to boot to U-Boot on px30.
> +
> +Get the Source and build ATF binary
> +===================================
> +
> + > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
> +
> +Compile the ATF
> +===============
> +
> + > cd trusted-firmware-a
> + > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=px30 bl31
> + > cp build/px30/release/bl31/bl31.elf ../u-boot/bl31.elf
> +
> +Compile the U-Boot
> +==================
> +
> + > cd ../u-boot
> + > make CROSS_COMPILE=aarch64-linux-gnu- ringneck-px30_defconfig all
> +
> +Flash the image
> +===============
> +
> +Copy u-boot-rockchip.bin to offset 32k for SD/eMMC.
> +
> +SD-Card
> +-------
> +
> + > dd if=u-boot-rockchip.bin of=/dev/sdb seek=64
> +
> +eMMC
> +----
> +
> +rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with
> +help of the Rockchip loader binary.
> +
> + > git clone https://github.com/rockchip-linux/rkdeveloptool
> + > cd rkdeveloptool
> + > autoreconf -i && ./configure && make
> + > git clone https://github.com/rockchip-linux/rkbin.git
> + > cd rkbin
> + > ./tools/boot_merger RKBOOT/PX30MINIALL.ini
> + > cd ..
> + > ./rkdeveloptool db rkbin/px30_loader_v1.16.131.bin
> + > ./rkdeveloptool wl 64 ../u-boot-rockchip.bin
> diff --git a/board/theobroma-systems/ringneck_px30/ringneck-px30.c b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
> new file mode 100644
> index 0000000000..47d1a40ef7
> --- /dev/null
> +++ b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
> @@ -0,0 +1,175 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2022 Theobroma Systems Design und Consulting GmbH
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <env.h>
> +#include <env_internal.h>
> +#include <init.h>
> +#include <log.h>
> +#include <misc.h>
> +#include <spl.h>
> +#include <syscon.h>
> +#include <u-boot/crc.h>
> +#include <usb.h>
> +#include <dm/pinctrl.h>
> +#include <dm/uclass-internal.h>
> +#include <asm/io.h>
> +#include <asm/setup.h>
> +#include <asm/arch-rockchip/clock.h>
> +#include <asm/arch-rockchip/hardware.h>
> +#include <asm/arch-rockchip/periph.h>
> +#include <asm/arch-rockchip/misc.h>
> +#include <power/regulator.h>
> +#include <u-boot/sha256.h>
> +
> +/*
> + * Swap mmc0 and mmc1 in boot_targets if booted from SD-Card.
> + *
> + * If bootsource is uSD-card we can assume that we want to use the
> + * SD-Card instead of the eMMC as first boot_target for distroboot.
> + * We only want to swap the defaults and not any custom environment a
> + * user has set. We exit early if a changed boot_targets environment
> + * is detected.
> + */
> +static int setup_boottargets(void)
> +{
> + const char *boot_device =
> + ofnode_read_chosen_string("u-boot,spl-boot-device");
> + char *env_default, *env;
> +
> + if (!boot_device) {
> + debug("%s: /chosen/u-boot,spl-boot-device not set\n",
> + __func__);
> + return -1;
> + }
> + debug("%s: booted from %s\n", __func__, boot_device);
> +
> + env_default = env_get_default("boot_targets");
> + env = env_get("boot_targets");
> + if (!env) {
> + debug("%s: boot_targets does not exist\n", __func__);
> + return -1;
> + }
> + debug("%s: boot_targets current: %s - default: %s\n",
> + __func__, env, env_default);
> +
> + if (strcmp(env_default, env) != 0) {
> + debug("%s: boot_targets not default, don't change it\n",
> + __func__);
> + return 0;
> + }
> +
> + /*
> + * Make the default boot medium between SD Card and eMMC, the one that
> + * was used to load U-Boot proper.
> + */
> + bool sd_booted = !strcmp(boot_device, "/mmc@ff370000");
> + char *mmc0, *mmc1;
> +
> + debug("%s: booted from %s\n", __func__,
> + sd_booted ? "SD-Card" : "eMMC");
> + mmc0 = strstr(env, "mmc0");
> + mmc1 = strstr(env, "mmc1");
> +
> + if (!mmc0 || !mmc1) {
> + debug("%s: only one mmc boot_target found\n", __func__);
> + return -1;
> + }
> +
> + /*
> + * If mmc0 comes first in the boot order and U-Boot proper was
> + * loaded from mmc1, swap mmc0 and mmc1 in the list.
> + * If mmc1 comes first in the boot order and U-Boot proper was
> + * loaded from mmc0, swap mmc0 and mmc1 in the list.
> + */
> + if ((mmc0 < mmc1 && sd_booted) ||
> + (mmc0 > mmc1 && !sd_booted)) {
> + mmc0[3] = '1';
> + mmc1[3] = '0';
> + debug("%s: set boot_targets to: %s\n", __func__, env);
> + env_set("boot_targets", env);
> + }
> +
> + return 0;
> +}
> +
> +int mmc_get_env_dev(void)
> +{
> + const char *boot_device =
> + ofnode_read_chosen_string("u-boot,spl-boot-device");
> +
> + if (!boot_device) {
> + debug("%s: /chosen/u-boot,spl-boot-device not set\n",
> + __func__);
> + return CONFIG_SYS_MMC_ENV_DEV;
> + }
> +
> + debug("%s: booted from %s\n", __func__, boot_device);
> +
> + if (!strcmp(boot_device, "/mmc@ff370000"))
> + return 1;
> +
> + if (!strcmp(boot_device, "/mmc@ff390000"))
> + return 0;
> +
> + return CONFIG_SYS_MMC_ENV_DEV;
> +}
> +
> +#if !IS_ENABLED(CONFIG_ENV_IS_NOWHERE)
> +#error Please enable CONFIG_ENV_IS_NOWHERE
> +#endif
> +
> +enum env_location arch_env_get_location(enum env_operation op, int prio)
> +{
> + const char *boot_device =
> + ofnode_read_chosen_string("u-boot,spl-boot-device");
> +
> + if (prio > 0)
> + return ENVL_UNKNOWN;
> +
> + if (!boot_device) {
> + debug("%s: /chosen/u-boot,spl-boot-device not set\n",
> + __func__);
> + return ENVL_NOWHERE;
> + }
> +
> + debug("%s: booted from %s\n", __func__, boot_device);
> +
> + if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC) &&
> + (!strcmp(boot_device, "/mmc@ff370000") ||
> + !strcmp(boot_device, "/mmc@ff390000")))
> + return ENVL_MMC;
> +
> + printf("%s: No environment available: booted from %s but U-Boot "
> + "config does not allow loading environment from it.",
> + __func__, boot_device);
> +
> + return ENVL_NOWHERE;
> +}
> +
> +int misc_init_r(void)
> +{
> + const u32 cpuid_offset = 0x7;
> + const u32 cpuid_length = 0x10;
> + u8 cpuid[cpuid_length];
> + int ret;
> +
> + ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
> + if (ret)
> + return ret;
> +
> + ret = rockchip_cpuid_set(cpuid, cpuid_length);
> + if (ret)
> + return ret;
> +
> + ret = rockchip_setup_macaddr();
> + if (ret)
> + return ret;
> +
> + setup_boottargets();
> +
> + return 0;
> +}
> diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig
> new file mode 100644
> index 0000000000..ab5ef9a70b
> --- /dev/null
> +++ b/configs/ringneck-px30_defconfig
> @@ -0,0 +1,131 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_COUNTER_FREQUENCY=24000000
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_SYS_TEXT_BASE=0x00200000
> +CONFIG_SYS_MALLOC_F_LEN=0x2000
> +CONFIG_SPL_GPIO=y
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=2
> +CONFIG_DEFAULT_DEVICE_TREE="px30-ringneck-haikou"
> +CONFIG_SPL_TEXT_BASE=0x00000000
> +CONFIG_ROCKCHIP_PX30=y
> +CONFIG_TARGET_RINGNECK_PX30=y
> +CONFIG_TPL_LIBGENERIC_SUPPORT=y
> +CONFIG_SPL_DRIVERS_MISC=y
> +CONFIG_SPL_STACK_R_ADDR=0x600000
> +CONFIG_DEBUG_UART_BASE=0xFF030000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SYS_LOAD_ADDR=0x800800
> +CONFIG_TPL_MAX_SIZE=0x20000
> +CONFIG_DEBUG_UART=y
> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
> +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
> +# CONFIG_ANDROID_BOOT_IMAGE is not set
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_LOAD_FIT=y
> +CONFIG_DEFAULT_FDT_FILE="rockchip/px30-ringneck-haikou.dtb"
> +# CONFIG_CONSOLE_MUX is not set
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_MISC_INIT_R=y
> +CONFIG_SPL_MAX_SIZE=0x20000
> +CONFIG_SPL_PAD_TO=0x0
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +CONFIG_SPL_BSS_START_ADDR=0x4000000
> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
> +CONFIG_SPL_BOOTROM_SUPPORT=y
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SPL_STACK=0x400000
> +CONFIG_SPL_STACK_R=y
> +CONFIG_SYS_SPL_MALLOC=y
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
> +CONFIG_SPL_ATF=y
> +# CONFIG_TPL_FRAMEWORK is not set
> +# CONFIG_CMD_BOOTD is not set
> +# CONFIG_CMD_ELF is not set
> +# CONFIG_CMD_IMI is not set
> +# CONFIG_CMD_XIMG is not set
> +# CONFIG_CMD_LZMADEC is not set
> +# CONFIG_CMD_UNZIP is not set
> +CONFIG_CMD_GPT=y
> +# CONFIG_CMD_LOADB is not set
> +# CONFIG_CMD_LOADS is not set
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_USB_MASS_STORAGE=y
> +# CONFIG_CMD_ITEST is not set
> +# CONFIG_CMD_SETEXPR is not set
> +# CONFIG_CMD_SLEEP is not set
> +# CONFIG_SPL_DOS_PARTITION is not set
> +# CONFIG_ISO_PARTITION is not set
> +CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_OF_LIVE=y
> +CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_ENV_IS_NOWHERE=y
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_REGMAP=y
> +CONFIG_SPL_REGMAP=y
> +CONFIG_SYSCON=y
> +CONFIG_SPL_SYSCON=y
> +CONFIG_BUTTON=y
> +CONFIG_BUTTON_GPIO=y
> +CONFIG_CLK=y
> +CONFIG_SPL_CLK=y
> +CONFIG_FASTBOOT_BUF_ADDR=0x800800
> +CONFIG_FASTBOOT_BUF_SIZE=0x04000000
> +CONFIG_GPIO_HOG=y
> +CONFIG_SPL_GPIO_HOG=y
> +CONFIG_ROCKCHIP_GPIO=y
> +CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_MISC=y
> +CONFIG_ROCKCHIP_OTP=y
> +CONFIG_SUPPORT_EMMC_RPMB=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_PHY_TI_GENERIC=y
> +CONFIG_PHY_GIGE=y
> +CONFIG_ETH_DESIGNWARE=y
> +CONFIG_GMAC_ROCKCHIP=y
> +CONFIG_PINCTRL=y
> +CONFIG_SPL_PINCTRL=y
> +CONFIG_DM_PMIC=y
> +CONFIG_PMIC_RK8XX=y
> +CONFIG_REGULATOR_PWM=y
> +CONFIG_DM_REGULATOR_FIXED=y
> +CONFIG_REGULATOR_RK8XX=y
> +CONFIG_PWM_ROCKCHIP=y
> +CONFIG_RAM=y
> +CONFIG_SPL_RAM=y
> +CONFIG_TPL_RAM=y
> +CONFIG_ROCKCHIP_SDRAM_COMMON=y
> +CONFIG_RAM_PX30_DDR4=y
> +CONFIG_DM_RESET=y
> +CONFIG_DM_RNG=y
> +CONFIG_RNG_ROCKCHIP=y
> +# CONFIG_SPECIFY_CONSOLE_INDEX is not set
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_DEBUG_UART_SKIP_INIT=y
> +CONFIG_SOUND=y
> +CONFIG_SYSRESET=y
> +CONFIG_DM_THERMAL=y
> +CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_DWC2_OTG=y
> +CONFIG_DM_VIDEO=y
> +CONFIG_DISPLAY=y
> +CONFIG_LCD=y
> +CONFIG_SPL_TINY_MEMSET=y
> +CONFIG_TPL_TINY_MEMSET=y
> +CONFIG_LZO=y
> +CONFIG_ERRNO_STR=y
> +# CONFIG_EFI_LOADER is not set
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index 4ca7b00b1f..92a5c27306 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -27,6 +27,7 @@ List of mainline supported Rockchip boards:
> - Engicam PX30.Core C.TOUCH 2.0 10.1 (px30-core-ctouch2-of10-px30)
> - Engicam PX30.Core EDIMM2.2 Starter Kit (px30-core-edimm2.2-px30)
> - Firefly Core-PX30-JD4 (firefly-px30)
> + - Theobroma Systems PX30-µQ7 SoM - Ringneck (ringneck-px30)
> * rk3036
> - Rockchip Evb-RK3036 (evb-rk3036)
> - Kylin (kylin_rk3036)
> diff --git a/include/configs/ringneck_px30.h b/include/configs/ringneck_px30.h
> new file mode 100644
> index 0000000000..c63c935e9a
> --- /dev/null
> +++ b/include/configs/ringneck_px30.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * (C) Copyright 2022 Theobroma Systems Design und Consulting GmbH
> + */
> +
> +#ifndef __RINGNECK_PX30_H
> +#define __RINGNECK_PX30_H
> +
> +#include <configs/px30_common.h>
> +
> +#define ROCKCHIP_DEVICE_SETTINGS \
> + "stdout=serial,vidconsole\0" \
> + "stderr=serial,vidconsole\0"
> +
> +#endif
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 6/7] Input: add `SW_BOOT_ALT`
2022-09-22 12:12 ` [PATCH 6/7] Input: add `SW_BOOT_ALT` Quentin Schulz
@ 2022-09-24 8:05 ` Kever Yang
2022-09-26 9:47 ` Quentin Schulz
0 siblings, 1 reply; 19+ messages in thread
From: Kever Yang @ 2022-09-24 8:05 UTC (permalink / raw)
To: Quentin Schulz
Cc: klaus.goger, sjg, philipp.tomsich, heiko, u-boot, Quentin Schulz
Hi Quentin,
On 2022/9/22 20:12, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
>
> This event code represents the firmware source to use at boot.
> Value 0 means using "standard" firmware source, value 1 means using
> "alternative" firmware source.
>
> For example, some hardware has the ability to force the BOOTROM to load
> the bootloader from a secondary firmware source (say SD card) instead of
> trying with the standard first and then the secondary. This event allows
> the userspace to know which firmware source was requested *in hardware*.
Does this series patches need this patch?
I don't understand how can you affect the BOOTROM on PX30, I think PX30
does not
support this feature.
Thanks,
- Kever
>
> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
> Link: https://lore.kernel.org/lkml/20220922101211.3215888-2-foss+kernel@0leil.net/
> Cc: Quentin Schulz <foss+uboot@0leil.net>
> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
> ---
> include/dt-bindings/input/linux-event-codes.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/include/dt-bindings/input/linux-event-codes.h b/include/dt-bindings/input/linux-event-codes.h
> index dff8e7f170..8cd2b58c81 100644
> --- a/include/dt-bindings/input/linux-event-codes.h
> +++ b/include/dt-bindings/input/linux-event-codes.h
> @@ -917,7 +917,8 @@
> #define SW_MUTE_DEVICE 0x0e /* set = device disabled */
> #define SW_PEN_INSERTED 0x0f /* set = pen inserted */
> #define SW_MACHINE_COVER 0x10 /* set = cover closed */
> -#define SW_MAX 0x10
> +#define SW_BOOT_ALT 0x11 /* set = alternative boot firmware source */
> +#define SW_MAX 0x11
> #define SW_CNT (SW_MAX+1)
>
> /*
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 6/7] Input: add `SW_BOOT_ALT`
2022-09-24 8:05 ` Kever Yang
@ 2022-09-26 9:47 ` Quentin Schulz
0 siblings, 0 replies; 19+ messages in thread
From: Quentin Schulz @ 2022-09-26 9:47 UTC (permalink / raw)
To: Kever Yang, Quentin Schulz
Cc: klaus.goger, sjg, philipp.tomsich, heiko, u-boot
Hi Kever,
On 9/24/22 10:05, Kever Yang wrote:
> Hi Quentin,
>
>
> On 2022/9/22 20:12, Quentin Schulz wrote:
>> From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
>>
>> This event code represents the firmware source to use at boot.
>> Value 0 means using "standard" firmware source, value 1 means using
>> "alternative" firmware source.
>>
>> For example, some hardware has the ability to force the BOOTROM to load
>> the bootloader from a secondary firmware source (say SD card) instead of
>> trying with the standard first and then the secondary. This event allows
>> the userspace to know which firmware source was requested *in hardware*.
>
> Does this series patches need this patch?
>
> I don't understand how can you affect the BOOTROM on PX30, I think PX30
> does not
>
> support this feature.
>
This is being discussed upstream with the kernel folks, this will likely
not be taken unfortunately. But let me explain how things work on our board:
We have a switch we can toggle to *electrically* disable eMMC/SPI
flashes and force booting from SD card, even if there is some TPL/SPL on
eMMC/SPI. This is required by the Q7 standard (via the
BIOS_DISABLE/BOOT_ALT signal).
Therefore, the SoC is not even aware of this switch (and does not need
to), it just cannot communicate with the eMMC/SPI so it continues to try
other boot media, with e.g. SD card or fallbacks to USB if nothing's
found. Nothing Rockchip specific here.
This version of the series needs the patch because it defines a new
event code that is then used in the device tree, see gpio-keys Device
Tree node where you have switch-bios-disable-n.
Cheers,
Quentin
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 7/7] rockchip: add support for PX30 Ringneck SoM on Haikou Devkit
2022-09-24 8:02 ` Kever Yang
@ 2022-09-26 9:50 ` Quentin Schulz
2022-10-17 13:17 ` Kever Yang
0 siblings, 1 reply; 19+ messages in thread
From: Quentin Schulz @ 2022-09-26 9:50 UTC (permalink / raw)
To: Kever Yang, Quentin Schulz
Cc: klaus.goger, sjg, philipp.tomsich, heiko, u-boot
Hi Kever,
On 9/24/22 10:02, Kever Yang wrote:
> Hi Quentin,
>
> Does the dts already available on mainline kernel? If yes, please
> provide the commit number.
>
It is sent upstream. From cover-letter:
https://lore.kernel.org/lkml/20220922101211.3215888-3-foss+kernel@0leil.net/
It's being worked on. I don't know what's the process here as I'm adding
support for the board to two different projects at the same time. Are we
going to wait for the Linux kernel to merge this before taking it?
What's the usual process?
Cheers,
Quentin
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 7/7] rockchip: add support for PX30 Ringneck SoM on Haikou Devkit
2022-09-26 9:50 ` Quentin Schulz
@ 2022-10-17 13:17 ` Kever Yang
2022-10-17 14:18 ` Quentin Schulz
0 siblings, 1 reply; 19+ messages in thread
From: Kever Yang @ 2022-10-17 13:17 UTC (permalink / raw)
To: Quentin Schulz, Quentin Schulz
Cc: klaus.goger, sjg, philipp.tomsich, heiko, u-boot
Hi Quentin,
On 2022/9/26 17:50, Quentin Schulz wrote:
> Hi Kever,
>
> On 9/24/22 10:02, Kever Yang wrote:
>> Hi Quentin,
>>
>> Does the dts already available on mainline kernel? If yes,
>> please provide the commit number.
>>
>
> It is sent upstream. From cover-letter:
> https://lore.kernel.org/lkml/20220922101211.3215888-3-foss+kernel@0leil.net/
>
>
> It's being worked on. I don't know what's the process here as I'm
> adding support for the board to two different projects at the same
> time. Are we going to wait for the Linux kernel to merge this before
> taking it? What's the usual process?
>
We would like to merge dts already merge in to kernel mainline, so that
we don't need to do a "sync to kernel" patch later.
Thanks,
- Kever
> Cheers,
> Quentin
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 7/7] rockchip: add support for PX30 Ringneck SoM on Haikou Devkit
2022-10-17 13:17 ` Kever Yang
@ 2022-10-17 14:18 ` Quentin Schulz
0 siblings, 0 replies; 19+ messages in thread
From: Quentin Schulz @ 2022-10-17 14:18 UTC (permalink / raw)
To: Kever Yang, Quentin Schulz
Cc: klaus.goger, sjg, philipp.tomsich, heiko, u-boot
Hi Kever,
On 10/17/22 15:17, Kever Yang wrote:
> Hi Quentin,
>
> On 2022/9/26 17:50, Quentin Schulz wrote:
>> Hi Kever,
>>
>> On 9/24/22 10:02, Kever Yang wrote:
>>> Hi Quentin,
>>>
>>> Does the dts already available on mainline kernel? If yes,
>>> please provide the commit number.
>>>
>>
>> It is sent upstream. From cover-letter:
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__lore.kernel.org_lkml_20220922101211.3215888-2D3-2Dfoss-2Bkernel-400leil.net_&d=DwIDaQ&c=_sEr5x9kUWhuk4_nFwjJtA&r=LYjLexDn7rXIzVmkNPvw5ymA1XTSqHGq8yBP6m6qZZ4njZguQhZhkI_-172IIy1t&m=zniMJ83m6y11B0-vi1_qgSga8un_z3xsadbEhsVzIyddItYCZ1vOTPi0-dUYzw31&s=1n6i4UnN4hysL35bRYymlxd9knbVxdvsKbISm6ftq1c&e=
>>
>> It's being worked on. I don't know what's the process here as I'm
>> adding support for the board to two different projects at the same
>> time. Are we going to wait for the Linux kernel to merge this before
>> taking it? What's the usual process?
>>
> We would like to merge dts already merge in to kernel mainline, so that
> we don't need to do a "sync to kernel" patch later.
>
The v2 I sent 4 hours ago is using the new version of the Linux patchset
which was just merged by Heiko 2 hours ago, so I guess we're good on
that side now :) Thanks for telling me about the process.
Cheers,
Quentin
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2022-10-17 14:18 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-22 12:12 [PATCH 0/7] add support for Theobroma Systems PX30-µQ7 (Ringneck) with Haikou devkit Quentin Schulz
2022-09-22 12:12 ` [PATCH 1/7] rockchip: px30: fix CONFIG_IRAM_BASE Quentin Schulz
2022-09-24 7:58 ` Kever Yang
2022-09-22 12:12 ` [PATCH 2/7] rockchip: px30: list possible SPL boot devices Quentin Schulz
2022-09-24 7:58 ` Kever Yang
2022-09-22 12:12 ` [PATCH 3/7] rockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree Quentin Schulz
2022-09-24 7:59 ` [PATCH 3/7] rockchip: px30: insert u-boot,spl-boot-device " Kever Yang
2022-09-22 12:12 ` [PATCH 4/7] arm64: dts: rockchip: sync px30 with linux-next Quentin Schulz
2022-09-24 7:59 ` Kever Yang
2022-09-22 12:12 ` [PATCH 5/7] include/dt-bindings: Sync linux-event-codes with Linux kernel Quentin Schulz
2022-09-24 7:59 ` Kever Yang
2022-09-22 12:12 ` [PATCH 6/7] Input: add `SW_BOOT_ALT` Quentin Schulz
2022-09-24 8:05 ` Kever Yang
2022-09-26 9:47 ` Quentin Schulz
2022-09-22 12:12 ` [PATCH 7/7] rockchip: add support for PX30 Ringneck SoM on Haikou Devkit Quentin Schulz
2022-09-24 8:02 ` Kever Yang
2022-09-26 9:50 ` Quentin Schulz
2022-10-17 13:17 ` Kever Yang
2022-10-17 14:18 ` Quentin Schulz
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