[PATCH 0/2] xilinx: video: add skeleton drivers for zynqmp DP

[PATCH 0/2] xilinx: video: add skeleton drivers for zynqmp DP

[Michal Simek]

Hi,

add skeleton drivers for display port and display port DMA. The purpose of
having sketon drivers is to use the whole power domain infrastructure is
used. Without driver power domain driver is not asking for enabling power
for these devices. That's why having simple driver is necessary because OS
doesn't need to have a way to ask for enabling power for these devices.

Thanks,
Michal


Michal Simek (2):
  video: Add skeleton driver for ZynqMP Display port driver
  dma: xilinx: Add Display Port DMA driver

 drivers/dma/Kconfig          |  7 ++++
 drivers/dma/Makefile         |  1 +
 drivers/dma/xilinx_dpdma.c   | 43 +++++++++++++++++++++++
 drivers/video/Kconfig        |  8 +++++
 drivers/video/Makefile       |  1 +
 drivers/video/zynqmp_dpsub.c | 66 ++++++++++++++++++++++++++++++++++++
 6 files changed, 126 insertions(+)
 create mode 100644 drivers/dma/xilinx_dpdma.c
 create mode 100644 drivers/video/zynqmp_dpsub.c

-- 
2.35.1

[PATCH 1/2] video: Add skeleton driver for ZynqMP Display port driver

[Michal Simek]

The reason for this driver is to use call power management driver to enable
it in PMUFW. There is missing functionality now but should be added in
near future.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 drivers/video/Kconfig        |  8 +++++
 drivers/video/Makefile       |  1 +
 drivers/video/zynqmp_dpsub.c | 66 ++++++++++++++++++++++++++++++++++++
 3 files changed, 75 insertions(+)
 create mode 100644 drivers/video/zynqmp_dpsub.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index ff8e11f6489d..646fec70262c 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -680,6 +680,14 @@ config VIDEO_SEPS525
 	  Enable support for the Syncoam PM-OLED display driver (RGB 160x128).
 	  Currently driver is supporting only SPI interface.
 
+config VIDEO_ZYNQMP_DPSUB
+	bool "Enable video support for ZynqMP Display Port"
+	depends on DM_VIDEO && ZYNQMP_POWER_DOMAIN
+	help
+	  Enable support for Xilinx ZynqMP Display Port. Currently this file
+	  is used as placeholder for driver. The main reason is to record
+	  compatible string and calling power domain driver.
+
 source "drivers/video/nexell/Kconfig"
 
 config VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 4038395b1289..2530791eb43a 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o
 obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
 obj-$(CONFIG_VIDEO_VESA) += vesa.o
 obj-$(CONFIG_VIDEO_SEPS525) += seps525.o
+obj-$(CONFIG_VIDEO_ZYNQMP_DPSUB) += zynqmp_dpsub.o
 
 obj-y += bridge/
 obj-y += sunxi/
diff --git a/drivers/video/zynqmp_dpsub.c b/drivers/video/zynqmp_dpsub.c
new file mode 100644
index 000000000000..4ead663cd59f
--- /dev/null
+++ b/drivers/video/zynqmp_dpsub.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Xilinx Inc.
+ */
+
+#include <common.h>
+#include <cpu_func.h>
+#include <dm.h>
+#include <errno.h>
+#include <video.h>
+#include <dm/device_compat.h>
+
+#define WIDTH	640
+#define HEIGHT	480
+
+/**
+ * struct zynqmp_dpsub_priv - Private structure
+ * @dev: Device uclass for video_ops
+ */
+struct zynqmp_dpsub_priv {
+	struct udevice *dev;
+};
+
+static int zynqmp_dpsub_probe(struct udevice *dev)
+{
+	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
+	struct zynqmp_dpsub_priv *priv = dev_get_priv(dev);
+
+	uc_priv->bpix = VIDEO_BPP16;
+	uc_priv->xsize = WIDTH;
+	uc_priv->ysize = HEIGHT;
+	uc_priv->rot = 0;
+
+	priv->dev = dev;
+
+	/* Only placeholder for power domain driver */
+	return 0;
+}
+
+static int zynqmp_dpsub_bind(struct udevice *dev)
+{
+	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
+
+	plat->size = WIDTH * HEIGHT * 16;
+
+	return 0;
+}
+
+static const struct video_ops zynqmp_dpsub_ops = {
+};
+
+static const struct udevice_id zynqmp_dpsub_ids[] = {
+	{ .compatible = "xlnx,zynqmp-dpsub-1.7" },
+	{ }
+};
+
+U_BOOT_DRIVER(zynqmp_dpsub_video) = {
+	.name = "zynqmp_dpsub_video",
+	.id = UCLASS_VIDEO,
+	.of_match = zynqmp_dpsub_ids,
+	.ops = &zynqmp_dpsub_ops,
+	.plat_auto = sizeof(struct video_uc_plat),
+	.bind = zynqmp_dpsub_bind,
+	.probe = zynqmp_dpsub_probe,
+	.priv_auto = sizeof(struct zynqmp_dpsub_priv),
+};
-- 
2.35.1

[PATCH 2/2] dma: xilinx: Add Display Port DMA driver

[Michal Simek]

Display Port (DP) has own dma driver that's why add this skeleton driver
only for handling power domain setting and send configuration object to
PMUFW to enable it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 drivers/dma/Kconfig        |  7 +++++++
 drivers/dma/Makefile       |  1 +
 drivers/dma/xilinx_dpdma.c | 43 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 51 insertions(+)
 create mode 100644 drivers/dma/xilinx_dpdma.c

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 9cacea88d0cb..0af546042119 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -68,6 +68,13 @@ config APBH_DMA
 	help
 	  Enable APBH DMA driver.
 
+config XILINX_DPDMA
+	bool "Enable ZynqMP Display Port DMA driver"
+	depends on DMA && ZYNQMP_POWER_DOMAIN
+	help
+	  Enable support for Xilinx ZynqMP Display DMA driver. Currently
+	  this file is used as placeholder for driver. The main reason is
+	  to record compatible string and calling power domain driver.
 
 if APBH_DMA
 config APBH_DMA_BURST
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index afab324461b9..a75572fe5dec 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -13,5 +13,6 @@ obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o
 obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o
 obj-$(CONFIG_TI_EDMA3) += ti-edma3.o
 obj-$(CONFIG_DMA_LPC32XX) += lpc32xx_dma.o
+obj-$(CONFIG_XILINX_DPDMA) += xilinx_dpdma.o
 
 obj-y += ti/
diff --git a/drivers/dma/xilinx_dpdma.c b/drivers/dma/xilinx_dpdma.c
new file mode 100644
index 000000000000..d4ee21dfc07f
--- /dev/null
+++ b/drivers/dma/xilinx_dpdma.c
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Xilinx Inc.
+ */
+
+#include <common.h>
+#include <cpu_func.h>
+#include <dm.h>
+#include <dma.h>
+#include <dma-uclass.h>
+#include <errno.h>
+#include <dm/device_compat.h>
+
+/**
+ * struct zynqmp_dpdma_priv - Private structure
+ * @dev: Device uclass for video_ops
+ */
+struct zynqmp_dpdma_priv {
+	struct udevice *dev;
+};
+
+static int zynqmp_dpdma_probe(struct udevice *dev)
+{
+	/* Only placeholder for power domain driver */
+	return 0;
+}
+
+static const struct dma_ops zynqmp_dpdma_ops = {
+};
+
+static const struct udevice_id zynqmp_dpdma_ids[] = {
+	{ .compatible = "xlnx,zynqmp-dpdma" },
+	{ }
+};
+
+U_BOOT_DRIVER(zynqmp_dpdma) = {
+	.name = "zynqmp_dpdma",
+	.id = UCLASS_DMA,
+	.of_match = zynqmp_dpdma_ids,
+	.ops = &zynqmp_dpdma_ops,
+	.probe = zynqmp_dpdma_probe,
+	.priv_auto = sizeof(struct zynqmp_dpdma_priv),
+};
-- 
2.35.1

Re: [PATCH 0/2] xilinx: video: add skeleton drivers for zynqmp DP

[Michal Simek]

st 23. 2. 2022 v 15:52 odesílatel Michal Simek <michal.simek@xilinx.com> napsal:
>
> Hi,
>
> add skeleton drivers for display port and display port DMA. The purpose of
> having sketon drivers is to use the whole power domain infrastructure is
> used. Without driver power domain driver is not asking for enabling power
> for these devices. That's why having simple driver is necessary because OS
> doesn't need to have a way to ask for enabling power for these devices.
>
> Thanks,
> Michal
>
>
> Michal Simek (2):
>   video: Add skeleton driver for ZynqMP Display port driver
>   dma: xilinx: Add Display Port DMA driver
>
>  drivers/dma/Kconfig          |  7 ++++
>  drivers/dma/Makefile         |  1 +
>  drivers/dma/xilinx_dpdma.c   | 43 +++++++++++++++++++++++
>  drivers/video/Kconfig        |  8 +++++
>  drivers/video/Makefile       |  1 +
>  drivers/video/zynqmp_dpsub.c | 66 ++++++++++++++++++++++++++++++++++++
>  6 files changed, 126 insertions(+)
>  create mode 100644 drivers/dma/xilinx_dpdma.c
>  create mode 100644 drivers/video/zynqmp_dpsub.c
>
> --
> 2.35.1
>

applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs