From: Tim Harvey <tharvey@gateworks.com>
To: Gaurav Jain <gaurav.jain@nxp.com>
Cc: u-boot <u-boot@lists.denx.de>, Stefano Babic <sbabic@denx.de>,
Fabio Estevam <festevam@gmail.com>, Peng Fan <peng.fan@nxp.com>,
Simon Glass <sjg@chromium.org>,
Priyanka Jain <priyanka.jain@nxp.com>, Ye Li <ye.li@nxp.com>,
Horia Geanta <horia.geanta@nxp.com>, Ji Luo <ji.luo@nxp.com>,
Franck Lenormand <franck.lenormand@nxp.com>,
Silvano Di Ninno <silvano.dininno@nxp.com>,
Sahil malhotra <sahil.malhotra@nxp.com>,
Pankaj Gupta <pankaj.gupta@nxp.com>,
Varun Sethi <V.Sethi@nxp.com>,
"NXP i . MX U-Boot Team" <uboot-imx@nxp.com>,
Shengzhou Liu <Shengzhou.Liu@nxp.com>,
Mingkai Hu <mingkai.hu@nxp.com>,
Rajesh Bhagat <rajesh.bhagat@nxp.com>,
Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>,
Wasim Khan <wasim.khan@nxp.com>,
Alison Wang <alison.wang@nxp.com>,
Pramod Kumar <pramod.kumar_1@nxp.com>,
Tang Yuantian <andy.tang@nxp.com>,
Adrian Alonso <adrian.alonso@nxp.com>,
Vladimir Oltean <olteanv@gmail.com>
Subject: Re: [PATCH v2 03/15] i.MX8M: crypto: updated device tree for supporting DM in SPL
Date: Fri, 10 Sep 2021 07:46:31 -0700 [thread overview]
Message-ID: <CAJ+vNU1-2pth6nasZC2pdMMHtkSJaUfN6xHcfJoe7KJg7Af=vQ@mail.gmail.com> (raw)
In-Reply-To: <20210903070319.13484-4-gaurav.jain@nxp.com>
On Fri, Sep 3, 2021 at 12:04 AM Gaurav Jain <gaurav.jain@nxp.com> wrote:
>
> disabled use of JR0 in SPL and uboot, as JR0 is reserved
> for secure boot.
>
> Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
> ---
> arch/arm/dts/imx8mm-evk-u-boot.dtsi | 18 +++++++++++++++++-
> arch/arm/dts/imx8mm.dtsi | 1 +
> arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 18 +++++++++++++++++-
> arch/arm/dts/imx8mn.dtsi | 1 +
> arch/arm/dts/imx8mp-evk-u-boot.dtsi | 18 +++++++++++++++++-
> arch/arm/dts/imx8mp.dtsi | 1 +
> arch/arm/dts/imx8mq.dtsi | 1 +
> 7 files changed, 55 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> index f200afac9f..3c2502cbba 100644
> --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> - * Copyright 2019 NXP
> + * Copyright 2019, 2021 NXP
> */
>
> #include "imx8mm-u-boot.dtsi"
> @@ -72,6 +72,22 @@
> u-boot,dm-spl;
> };
>
> +&crypto {
> + u-boot,dm-spl;
> +};
> +
> +&sec_jr0 {
> + u-boot,dm-spl;
> +};
> +
> +&sec_jr1 {
> + u-boot,dm-spl;
> +};
> +
> +&sec_jr2 {
> + u-boot,dm-spl;
> +};
> +
> &usdhc1 {
> u-boot,dm-spl;
> };
> diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi
> index b142b80734..009999bf3a 100644
> --- a/arch/arm/dts/imx8mm.dtsi
> +++ b/arch/arm/dts/imx8mm.dtsi
> @@ -824,6 +824,7 @@
> compatible = "fsl,sec-v4.0-job-ring";
> reg = <0x1000 0x1000>;
> interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> };
>
> sec_jr1: jr@2000 {
> diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> index 1d3844437d..b462d24eb2 100644
> --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> - * Copyright 2019 NXP
> + * Copyright 2019, 2021 NXP
> */
>
> / {
> @@ -104,6 +104,22 @@
> u-boot,dm-spl;
> };
>
> +&crypto {
> + u-boot,dm-spl;
> +};
> +
> +&sec_jr0 {
> + u-boot,dm-spl;
> +};
> +
> +&sec_jr1 {
> + u-boot,dm-spl;
> +};
> +
> +&sec_jr2 {
> + u-boot,dm-spl;
> +};
> +
> &usdhc1 {
> u-boot,dm-spl;
> };
> diff --git a/arch/arm/dts/imx8mn.dtsi b/arch/arm/dts/imx8mn.dtsi
> index edcb415b53..1820a5af37 100644
> --- a/arch/arm/dts/imx8mn.dtsi
> +++ b/arch/arm/dts/imx8mn.dtsi
> @@ -822,6 +822,7 @@
> compatible = "fsl,sec-v4.0-job-ring";
> reg = <0x1000 0x1000>;
> interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> };
>
> sec_jr1: jr@2000 {
> diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> index 2abcf1f03d..5415d5b617 100644
> --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> - * Copyright 2019 NXP
> + * Copyright 2019, 2021 NXP
> */
>
> #include "imx8mp-u-boot.dtsi"
> @@ -67,6 +67,22 @@
> u-boot,dm-spl;
> };
>
> +&crypto {
> + u-boot,dm-spl;
> +};
> +
> +&sec_jr0 {
> + u-boot,dm-spl;
> +};
> +
> +&sec_jr1 {
> + u-boot,dm-spl;
> +};
> +
> +&sec_jr2 {
> + u-boot,dm-spl;
> +};
> +
> &i2c1 {
> u-boot,dm-spl;
> };
> diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
> index c2d51a46cb..57b01c3a57 100644
> --- a/arch/arm/dts/imx8mp.dtsi
> +++ b/arch/arm/dts/imx8mp.dtsi
> @@ -624,6 +624,7 @@
> compatible = "fsl,sec-v4.0-job-ring";
> reg = <0x1000 0x1000>;
> interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> };
>
> sec_jr1: jr@2000 {
> diff --git a/arch/arm/dts/imx8mq.dtsi b/arch/arm/dts/imx8mq.dtsi
> index a44f729d0e..ecab44ca13 100644
> --- a/arch/arm/dts/imx8mq.dtsi
> +++ b/arch/arm/dts/imx8mq.dtsi
> @@ -955,6 +955,7 @@
> compatible = "fsl,sec-v4.0-job-ring";
> reg = <0x1000 0x1000>;
> interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> };
>
> sec_jr1: jr@2000 {
> --
> 2.17.1
>
Is there a reason these need to be in board specific dts vs the base
ones that are included by all the boards?
Best regards,
Tim
next prev parent reply other threads:[~2021-09-10 14:46 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-03 7:03 [PATCH v2 00/15] Add CAAM driver model support Gaurav Jain
2021-09-03 7:03 ` [PATCH v2 01/15] crypto/fsl: Add support for CAAM Job ring driver model Gaurav Jain
2021-09-10 10:01 ` Ye Li
2021-09-03 7:03 ` [PATCH v2 02/15] crypto/fsl: Add CAAM support for bkek, random number generation Gaurav Jain
2021-09-10 9:46 ` Ye Li
2021-09-03 7:03 ` [PATCH v2 03/15] i.MX8M: crypto: updated device tree for supporting DM in SPL Gaurav Jain
2021-09-10 9:03 ` Ye Li
2021-09-10 14:46 ` Tim Harvey [this message]
2021-09-13 4:55 ` [EXT] " Gaurav Jain
2021-09-23 22:40 ` Tim Harvey
2021-09-28 5:20 ` Gaurav Jain
2021-09-03 7:03 ` [PATCH v2 04/15] crypto/fsl: i.MX8M: Enable Job ring driver model in SPL and U-Boot Gaurav Jain
2021-09-10 9:04 ` Ye Li
2021-09-03 7:03 ` [PATCH v2 05/15] i.MX6: Enable Job ring driver model in U-Boot Gaurav Jain
2021-09-10 9:20 ` Ye Li
2021-09-03 7:03 ` [PATCH v2 06/15] i.MX7: " Gaurav Jain
2021-09-10 9:36 ` Ye Li
2021-09-03 7:03 ` [PATCH v2 07/15] i.MX7ULP: " Gaurav Jain
2021-09-10 9:36 ` Ye Li
2021-09-03 7:03 ` [PATCH v2 08/15] i.MX8: Add crypto node in device tree Gaurav Jain
2021-09-10 9:39 ` Ye Li
2021-09-03 7:03 ` [PATCH v2 09/15] crypto/fsl: i.MX8: Enable Job ring driver model in SPL and U-Boot Gaurav Jain
2021-09-10 9:43 ` Ye Li
2021-09-03 7:03 ` [PATCH v2 10/15] crypto/fsl: Fix kick_trng Gaurav Jain
2021-09-03 7:03 ` [PATCH v2 11/15] Layerscape: Add crypto node in device tree Gaurav Jain
2021-09-13 7:08 ` Priyanka Jain (OSS)
2021-09-03 7:03 ` [PATCH v2 12/15] Layerscape: Enable Job ring driver model in U-Boot Gaurav Jain
2021-09-13 7:10 ` Priyanka Jain (OSS)
2021-09-03 7:03 ` [PATCH v2 13/15] PPC: Add crypto node in device tree Gaurav Jain
2021-09-13 7:10 ` Priyanka Jain (OSS)
2021-09-03 7:03 ` [PATCH v2 14/15] PPC: Enable Job ring driver model in U-Boot Gaurav Jain
2021-09-13 7:13 ` Priyanka Jain (OSS)
2021-09-03 7:03 ` [PATCH v2 15/15] update CAAM MAINTAINER Gaurav Jain
2021-09-23 23:01 ` [PATCH v2 00/15] Add CAAM driver model support Tim Harvey
2021-09-28 5:39 ` [EXT] " Gaurav Jain
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