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From: Dirk Behme <dirk.behme@de.bosch.com>
To: xen-devel@lists.xenproject.org,
	Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>
Cc: Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>,
	Iurii Konovalenko <iurii.konovalenko@globallogic.com>,
	Dirk Behme <dirk.behme@de.bosch.com>
Subject: [PATCH 1/3] xen/arm: drivers: scif: Remove dead code
Date: Tue, 21 Jun 2016 11:15:26 +0200	[thread overview]
Message-ID: <1466500528-8411-1-git-send-email-dirk.behme@de.bosch.com> (raw)

In scif_uart_init() uart->baud is set to BAUD_AUTO. So its a basic error
if this is different later. Detect this by an ASSERT, but remove the
dead code normally never reached.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
---
 xen/drivers/char/scif-uart.c | 23 ++++++-----------------
 1 file changed, 6 insertions(+), 17 deletions(-)

diff --git a/xen/drivers/char/scif-uart.c b/xen/drivers/char/scif-uart.c
index 51a2233..ca88c0f 100644
--- a/xen/drivers/char/scif-uart.c
+++ b/xen/drivers/char/scif-uart.c
@@ -143,23 +143,12 @@ static void __init scif_uart_init_preirq(struct serial_port *port)
     scif_writew(uart, SCIF_SCSMR, val);
 
     ASSERT( uart->clock_hz > 0 );
-    if ( uart->baud != BAUD_AUTO )
-    {
-        /* Setup desired Baud rate */
-        divisor = uart->clock_hz / (uart->baud << 4);
-        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
-        scif_writew(uart, SCIF_DL, (uint16_t)divisor);
-        /* Selects the frequency divided clock (SC_CLK external input) */
-        scif_writew(uart, SCIF_CKS, 0);
-        udelay(1000000 / uart->baud + 1);
-    }
-    else
-    {
-        /* Read current Baud rate */
-        divisor = scif_readw(uart, SCIF_DL);
-        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
-        uart->baud = uart->clock_hz / (divisor << 4);
-    }
+    ASSERT( uart->baud == BAUD_AUTO );
+
+    /* Read current Baud rate */
+    divisor = scif_readw(uart, SCIF_DL);
+    ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
+    uart->baud = uart->clock_hz / (divisor << 4);
 
     /* Setup trigger level for TX/RX FIFOs */
     scif_writew(uart, SCIF_SCFCR, SCFCR_RTRG11 | SCFCR_TTRG11);
-- 
2.8.0


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             reply	other threads:[~2016-06-21  9:16 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-21  9:15 Dirk Behme [this message]
2016-06-21  9:15 ` [PATCH 2/3] xen/arm: drivers: scif: Remove unused variables Dirk Behme
2016-06-21 12:17   ` Julien Grall
2016-06-21  9:15 ` [PATCH 3/3] xen/arm: drivers: scif: Add clock auto detection Dirk Behme
2016-06-21 12:20   ` Julien Grall
2016-06-21 12:30     ` Dirk Behme
2016-06-21 12:33       ` Julien Grall
2016-06-21 10:16 ` [PATCH 1/3] xen/arm: drivers: scif: Remove dead code Oleksandr Tyshchenko
2016-06-21 12:15   ` Julien Grall
2016-06-21 12:54     ` Oleksandr Tyshchenko
2016-06-21 13:01       ` Dirk Behme
2016-06-21 13:22         ` Oleksandr Tyshchenko
2016-06-21 13:07       ` Julien Grall
2016-06-21 13:11         ` Oleksandr Tyshchenko

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