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Message-Id: <E1dI7sl-0004IJ-5G@xenbits.xenproject.org>
Date: Tue, 06 Jun 2017 06:22:23 +0000
Subject: [Xen-changelog] [xen master] Makefile: Mention usual targets of
subdir Makefiles
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commit 624dc330171a27f21b9664da7fc8b06bcc29be48
Author: Ian Jackson <ian.jackson@eu.citrix.com>
AuthorDate: Thu May 25 16:42:12 2017 +0100
Commit: Ian Jackson <Ian.Jackson@eu.citrix.com>
CommitDate: Tue May 30 18:38:54 2017 +0100
Makefile: Mention usual targets of subdir Makefiles
=3D20
Suggested-by: Roger Pau Monn=3DC3=3DA9 <roger.pau@citrix.com>
Signed-off-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
Acked-by: Roger Pau Monn=3DC3=3DA9 <roger.pau@citrix.com>
CC: Wei Liu <wei.liu2@citrix.com>
CC: M A Young <m.a.young@durham.ac.uk>
CC: Andrew Cooper <andrew.cooper3@citrix.com>
---
Makefile | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Makefile b/Makefile
index 51905eb..2ff33df 100644
--- a/Makefile
+++ b/Makefile
@@ -90,6 +90,11 @@ test:
#
# Also, we have a number of targets COMPONENT which run
# dist-COMPONENT, for convenience.
+#
+# The Makefiles invoked with -C from the toplevel should
+# generally have the following targets:
+# all build install clean distclean
+
=3D20
.PHONY: dist
dist: DESTDIR=3D3D$(DISTDIR)/install
--
generated by git-patchbot for /home/xen/git/xen.git#master
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* Delivery Status Notification (Delay)
@ 2017-06-12 10:11 f4da1594
0 siblings, 0 replies; 20+ messages in thread
From: f4da1594 @ 2017-06-12 10:11 UTC (permalink / raw)
To: xen-devel
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Message-Id: <E1dJyUs-0004iL-J7@xenbits.xenproject.org>
Date: Sun, 11 Jun 2017 08:45:22 +0000
Subject: [Xen-changelog] [xen stable-4.6] stop_machine: fill fn_result only
in case of error
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commit 314915cb4aa3865c8623516b65216b974a7d4e9a
Author: Gregory Herrero <gregory.herrero@oracle.com>
AuthorDate: Fri Jun 9 13:58:57 2017 +0200
Commit: Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 9 13:58:57 2017 +0200
stop_machine: fill fn_result only in case of error
=20
When stop_machine_run() is called with NR_CPUS as last argument,
fn_result member must be filled only if an error happens since it is
shared across all cpus.
=20
Assume CPU1 detects an error and set fn_result to -1, then CPU2 doesn't
detect an error and set fn_result to 0. The error detected by CPU1 will
be ignored.
=20
Note that in case multiple failures occur on different CPUs, only the
last error will be reported.
=20
Signed-off-by: Gregory Herrero <gregory.herrero@oracle.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
master commit: d8b833d78f6bfde9855a949b5e6d3790d78c0fb7
master date: 2017-06-01 10:53:04 +0200
---
xen/common/stop_machine.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/xen/common/stop_machine.c b/xen/common/stop_machine.c
index cf109ba..f2484c7 100644
--- a/xen/common/stop_machine.c
+++ b/xen/common/stop_machine.c
@@ -95,6 +95,7 @@ int stop_machine_run(int (*fn)(void *), void *data, unsig=
ned int cpu)
stopmachine_data.fn_data =3D data;
stopmachine_data.nr_cpus =3D nr_cpus;
stopmachine_data.fn_cpu =3D cpu;
+ stopmachine_data.fn_result =3D 0;
atomic_set(&stopmachine_data.done, 0);
stopmachine_data.state =3D STOPMACHINE_START;
=20
@@ -113,7 +114,11 @@ int stop_machine_run(int (*fn)(void *), void *data, un=
signed int cpu)
=20
stopmachine_set_state(STOPMACHINE_INVOKE);
if ( (cpu =3D=3D smp_processor_id()) || (cpu =3D=3D NR_CPUS) )
- stopmachine_data.fn_result =3D (*fn)(data);
+ {
+ ret =3D (*fn)(data);
+ if ( ret )
+ write_atomic(&stopmachine_data.fn_result, ret);
+ }
stopmachine_wait_state();
ret =3D stopmachine_data.fn_result;
=20
@@ -151,8 +156,12 @@ static void stopmachine_action(unsigned long cpu)
case STOPMACHINE_INVOKE:
if ( (stopmachine_data.fn_cpu =3D=3D smp_processor_id()) ||
(stopmachine_data.fn_cpu =3D=3D NR_CPUS) )
- stopmachine_data.fn_result =3D
- stopmachine_data.fn(stopmachine_data.fn_data);
+ {
+ int ret =3D stopmachine_data.fn(stopmachine_data.fn_data);
+
+ if ( ret )
+ write_atomic(&stopmachine_data.fn_result, ret);
+ }
break;
default:
break;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.6
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Date: Sun, 11 Jun 2017 08:44:01 +0000
Subject: [Xen-changelog] [xen stable-4.6] x86/32on64: properly honor
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-------------------------by Abine-------------------------
commit d48df033095afadd82435e591ce66433bc6d3be2
Author: Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 9 13:54:27 2017 +0200
Commit: Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 9 13:54:27 2017 +0200
x86/32on64: properly honor add-to-physmap-batch's size
=3D20
Commit 407a3c00ff ("compat/memory: fix build with old gcc") "fixed" a
build issue by switching to the use of uninitialized data. Due to
- the bounding of the uninitialized data item
- the accessed area being outside of Xen space
- arguments being properly verified by the native hypercall function
this is not a security issue.
=3D20
Reported-by: Marek Marczykowski-G=3DC3=3DB3recki <marmarek@invisiblethi=
ngsl=3D
ab.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
master commit: 144aec4140515c53bb1676df71a469f3e285c557
master date: 2017-04-26 09:48:45 +0200
---
xen/common/compat/memory.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/xen/common/compat/memory.c b/xen/common/compat/memory.c
index a31fa9b..8e257a0 100644
--- a/xen/common/compat/memory.c
+++ b/xen/common/compat/memory.c
@@ -249,12 +249,14 @@ int compat_memory_op(unsigned int cmd, XEN_GUEST_HAND=
=3D
LE_PARAM(void) compat)
unsigned int limit =3D3D (COMPAT_ARG_XLAT_SIZE - sizeof(*nat.a=
tp=3D
b))
/ (sizeof(nat.atpb->idxs.p) + sizeof(nat.=
=3D
atpb->gpfns.p));
/* Use an intermediate variable to suppress warnings on old gc=
=3D
c: */
- unsigned int size =3D3D cmp.atpb.size;
+ unsigned int size;
xen_ulong_t *idxs =3D3D (void *)(nat.atpb + 1);
xen_pfn_t *gpfns =3D3D (void *)(idxs + limit);
=3D20
- if ( copy_from_guest(&cmp.atpb, compat, 1) ||
- !compat_handle_okay(cmp.atpb.idxs, size) ||
+ if ( copy_from_guest(&cmp.atpb, compat, 1) )
+ return -EFAULT;
+ size =3D3D cmp.atpb.size;
+ if ( !compat_handle_okay(cmp.atpb.idxs, size) ||
!compat_handle_okay(cmp.atpb.gpfns, size) ||
!compat_handle_okay(cmp.atpb.errs, size) )
return -EFAULT;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.6
--=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D6220609139265669585=3D=3D
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Message-Id: <E1dJqDe-0003qo-9d@xenbits.xenproject.org>
Date: Sat, 10 Jun 2017 23:55:02 +0000
Subject: [Xen-changelog] [xen stable-4.9] x86/NPT: deal with fallout from
2Mb/1Gb unmapping change
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commit a39c6b4516996ae1e776a46743dbcb78002b9dd8
Author: Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 7 11:36:30 2017 +0200
Commit: Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 7 11:36:30 2017 +0200
x86/NPT: deal with fallout from 2Mb/1Gb unmapping change
=20
Commit efa9596e9d ("x86/mm: fix incorrect unmapping of 2MB and 1GB
pages") left the NPT code untouched, as there is no explicit alignment
check matching the one in EPT code. However, the now more widespread
storing of INVALID_MFN into PTEs requires adjustments:
- calculations when shattering large pages may spill into the p2m type
field (converting p2m_populate_on_demand to p2m_grant_map_rw) - use
OR instead of PLUS,
- the use of plain l{2,3}e_from_pfn() in p2m_pt_set_entry() results in
all upper (flag) bits being clobbered - introduce and use
p2m_l{2,3}e_from_pfn(), paralleling the existing L1 variant.
=20
Reported-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Tested-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: George Dunlap <george.dunlap@citrix.com>
Release-acked-by: Julien Grall <julien.grall@arm.com>
master commit: 83520cb4aa39ebeb4eb1a7cac2e85b413e75a336
master date: 2017-06-06 14:32:54 +0200
---
xen/arch/x86/mm/p2m-pt.c | 34 +++++++++++++++++++---------------
1 file changed, 19 insertions(+), 15 deletions(-)
diff --git a/xen/arch/x86/mm/p2m-pt.c b/xen/arch/x86/mm/p2m-pt.c
index 2eddeee..06e64b8 100644
--- a/xen/arch/x86/mm/p2m-pt.c
+++ b/xen/arch/x86/mm/p2m-pt.c
@@ -45,13 +45,20 @@
#undef page_to_mfn
#define page_to_mfn(_pg) _mfn(__page_to_mfn(_pg))
=20
-/* We may store INVALID_MFN in l1 PTEs. We need to clip this
- * to avoid trampling over higher-order bits (NX, p2m type, IOMMU flags). =
We
- * seem to not need to unclip on the return path, as callers are concerned=
only
- * with p2m type in such cases.=20
+/*
+ * We may store INVALID_MFN in PTEs. We need to clip this to avoid trampl=
ing
+ * over higher-order bits (NX, p2m type, IOMMU flags). We seem to not nee=
d
+ * to unclip on the read path, as callers are concerned only with p2m type=
in
+ * such cases.
*/
#define p2m_l1e_from_pfn(pfn, flags) \
l1e_from_pfn((pfn) & (PADDR_MASK >> PAGE_SHIFT), (flags))
+#define p2m_l2e_from_pfn(pfn, flags) \
+ l2e_from_pfn((pfn) & ((PADDR_MASK & ~(_PAGE_PSE_PAT | 0UL)) \
+ >> PAGE_SHIFT), (flags) | _PAGE_PSE)
+#define p2m_l3e_from_pfn(pfn, flags) \
+ l3e_from_pfn((pfn) & ((PADDR_MASK & ~(_PAGE_PSE_PAT | 0UL)) \
+ >> PAGE_SHIFT), (flags) | _PAGE_PSE)
=20
/* PTE flags for the various types of p2m entry */
#define P2M_BASE_FLAGS \
@@ -243,7 +250,7 @@ p2m_next_level(struct p2m_domain *p2m, void **table,
l1_entry =3D __map_domain_page(pg);
for ( i =3D 0; i < L2_PAGETABLE_ENTRIES; i++ )
{
- new_entry =3D l1e_from_pfn(pfn + (i * L1_PAGETABLE_ENTRIES), f=
lags);
+ new_entry =3D l1e_from_pfn(pfn | (i * L1_PAGETABLE_ENTRIES), f=
lags);
p2m_add_iommu_flags(&new_entry, 1, IOMMUF_readable|IOMMUF_writ=
able);
p2m->write_p2m_entry(p2m, gfn, l1_entry + i, new_entry, 2);
}
@@ -277,7 +284,7 @@ p2m_next_level(struct p2m_domain *p2m, void **table,
l1_entry =3D __map_domain_page(pg);
for ( i =3D 0; i < L1_PAGETABLE_ENTRIES; i++ )
{
- =20
----- Message truncated -----
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* Delivery Status Notification (Delay)
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To: xen-devel
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Date: Fri, 09 Jun 2017 12:55:22 +0000
Subject: [Xen-changelog] [xen master] Avoid excess icache flushes in
populate_physmap() before domain has been created
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commit 726b737574a3c075be95440e572b317a39293a9e
Author: Punit Agrawal <punit.agrawal@arm.com>
AuthorDate: Fri May 26 12:14:07 2017 +0100
Commit: Stefano Stabellini <sstabellini@kernel.org>
CommitDate: Tue Jun 6 11:49:39 2017 -0700
Avoid excess icache flushes in populate_physmap() before domain has bee=
n created
=20
populate_physmap() calls alloc_heap_pages() per requested
extent. alloc_heap_pages() invalidates the entire icache per
extent. During domain creation, the icache invalidations can be deffere=
d
until all the extents have been allocated as there is no risk of
executing stale instructions from the icache.
=20
Introduce a new flag "MEMF_no_icache_flush" to be used to prevent
alloc_heap_pages() from performing icache maintenance operations. Use
the flag in populate_physmap() before the domain has been unpaused and
perform required icache maintenance function at the end of the
allocation.
=20
One concern is the lack of synchronisation around testing for
"creation_finished". But it seems, in practice the window where it is
out of sync should be small enough to not matter.
=20
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
xen/common/memory.c | 31 ++++++++++++++++++++++---------
xen/common/page_alloc.c | 2 +-
xen/include/asm-x86/page.h | 8 ++++++++
xen/include/xen/mm.h | 2 ++
4 files changed, 33 insertions(+), 10 deletions(-)
diff --git a/xen/common/memory.c b/xen/common/memory.c
index 52879e7..34d2dda 100644
--- a/xen/common/memory.c
+++ b/xen/common/memory.c
@@ -152,16 +152,26 @@ static void populate_physmap(struct memop_args *a)
max_order(curr_d)) )
return;
=20
- /*
- * With MEMF_no_tlbflush set, alloc_heap_pages() will ignore
- * TLB-flushes. After VM creation, this is a security issue (it can
- * make pages accessible to guest B, when guest A may still have a
- * cached mapping to them). So we do this only during domain creation,
- * when the domain itself has not yet been unpaused for the first
- * time.
- */
if ( unlikely(!d->creation_finished) )
+ {
+ /*
+ * With MEMF_no_tlbflush set, alloc_heap_pages() will ignore
+ * TLB-flushes. After VM creation, this is a security issue (it ca=
n
+ * make pages accessible to guest B, when guest A may still have a
+ * cached mapping to them). So we do this only during domain creat=
ion,
+ * when the domain itself has not yet been unpaused for the first
+ * time.
+ */
a->memflags |=3D MEMF_no_tlbflush;
+ /*
+ * With MEMF_no_icache_flush, alloc_heap_pages() will skip
+ * performing icache flushes. We do it only before domain
+ * creation as once the domain is running there is a danger of
+ * executing instructions from stale caches if icache flush is
+ * delayed.
+ */
+ a->memflags |=3D MEMF_no_icache_flush;
+ }
=20
for ( i =3D a->nr_done; i < a->nr_extents; i++ )
{
@@ -211,7 +221,6 @@ static void populate_physmap(struct memop_args *a)
}
=20
mfn =3D gpfn;
- page =3D mfn_to_page(mfn);
}
else
{
@@ -255,6 +264,10 @@ static void populate_physmap(struct memop_args *a)
out:
if ( need_tlb
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Message-Id: <E1dJJRs-0000Ib-9i@xenbits.xenproject.org>
Date: Fri, 09 Jun 2017 12:55:32 +0000
Subject: [Xen-changelog] [xen master] xen/arm: Remove unused helpers
access_ok and array_access_ok
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commit f4a27a000d03e121eb1a36c485049a820c395539
Author: Julien Grall <julien.grall@arm.com>
AuthorDate: Tue May 23 18:03:36 2017 +0100
Commit: Stefano Stabellini <sstabellini@kernel.org>
CommitDate: Tue Jun 6 11:53:03 2017 -0700
xen/arm: Remove unused helpers access_ok and array_access_ok
=20
Both helpers access_ok and array_access_ok are not used on ARM. Remove
them.
=20
Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
xen/include/asm-arm/guest_access.h | 7 -------
1 file changed, 7 deletions(-)
diff --git a/xen/include/asm-arm/guest_access.h b/xen/include/asm-arm/guest=
_access.h
index 421bca5..251e935 100644
--- a/xen/include/asm-arm/guest_access.h
+++ b/xen/include/asm-arm/guest_access.h
@@ -4,13 +4,6 @@
#include <xen/guest_access.h>
#include <xen/errno.h>
=20
-/* Guests have their own comlete address space */
-#define access_ok(addr,size) (1)
-
-#define array_access_ok(addr,count,size) \
- (likely((count) < (~0UL / (size))) && \
- access_ok(addr, 0 + (count) * (size)))
-
unsigned long raw_copy_to_guest(void *to, const void *from, unsigned len);
unsigned long raw_copy_to_guest_flush_dcache(void *to, const void *from,
unsigned len);
--
generated by git-patchbot for /home/xen/git/xen.git#master
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Date: Fri, 09 Jun 2017 12:55:32 +0000
Subject: [Xen-changelog] [xen master] xen/arm: Remove unused helpers
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commit f4a27a000d03e121eb1a36c485049a820c395539
Author: Julien Grall <julien.grall@arm.com>
AuthorDate: Tue May 23 18:03:36 2017 +0100
Commit: Stefano Stabellini <sstabellini@kernel.org>
CommitDate: Tue Jun 6 11:53:03 2017 -0700
xen/arm: Remove unused helpers access_ok and array_access_ok
=20
Both helpers access_ok and array_access_ok are not used on ARM. Remove
them.
=20
Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
xen/include/asm-arm/guest_access.h | 7 -------
1 file changed, 7 deletions(-)
diff --git a/xen/include/asm-arm/guest_access.h b/xen/include/asm-arm/guest=
_access.h
index 421bca5..251e935 100644
--- a/xen/include/asm-arm/guest_access.h
+++ b/xen/include/asm-arm/guest_access.h
@@ -4,13 +4,6 @@
#include <xen/guest_access.h>
#include <xen/errno.h>
=20
-/* Guests have their own comlete address space */
-#define access_ok(addr,size) (1)
-
-#define array_access_ok(addr,count,size) \
- (likely((count) < (~0UL / (size))) && \
- access_ok(addr, 0 + (count) * (size)))
-
unsigned long raw_copy_to_guest(void *to, const void *from, unsigned len);
unsigned long raw_copy_to_guest_flush_dcache(void *to, const void *from,
unsigned len);
--
generated by git-patchbot for /home/xen/git/xen.git#master
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Date: Fri, 09 Jun 2017 12:55:22 +0000
Subject: [Xen-changelog] [xen master] Avoid excess icache flushes in
populate_physmap() before domain has been created
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commit 726b737574a3c075be95440e572b317a39293a9e
Author: Punit Agrawal <punit.agrawal@arm.com>
AuthorDate: Fri May 26 12:14:07 2017 +0100
Commit: Stefano Stabellini <sstabellini@kernel.org>
CommitDate: Tue Jun 6 11:49:39 2017 -0700
Avoid excess icache flushes in populate_physmap() before domain has bee=
n created
=20
populate_physmap() calls alloc_heap_pages() per requested
extent. alloc_heap_pages() invalidates the entire icache per
extent. During domain creation, the icache invalidations can be deffere=
d
until all the extents have been allocated as there is no risk of
executing stale instructions from the icache.
=20
Introduce a new flag "MEMF_no_icache_flush" to be used to prevent
alloc_heap_pages() from performing icache maintenance operations. Use
the flag in populate_physmap() before the domain has been unpaused and
perform required icache maintenance function at the end of the
allocation.
=20
One concern is the lack of synchronisation around testing for
"creation_finished". But it seems, in practice the window where it is
out of sync should be small enough to not matter.
=20
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
xen/common/memory.c | 31 ++++++++++++++++++++++---------
xen/common/page_alloc.c | 2 +-
xen/include/asm-x86/page.h | 8 ++++++++
xen/include/xen/mm.h | 2 ++
4 files changed, 33 insertions(+), 10 deletions(-)
diff --git a/xen/common/memory.c b/xen/common/memory.c
index 52879e7..34d2dda 100644
--- a/xen/common/memory.c
+++ b/xen/common/memory.c
@@ -152,16 +152,26 @@ static void populate_physmap(struct memop_args *a)
max_order(curr_d)) )
return;
=20
- /*
- * With MEMF_no_tlbflush set, alloc_heap_pages() will ignore
- * TLB-flushes. After VM creation, this is a security issue (it can
- * make pages accessible to guest B, when guest A may still have a
- * cached mapping to them). So we do this only during domain creation,
- * when the domain itself has not yet been unpaused for the first
- * time.
- */
if ( unlikely(!d->creation_finished) )
+ {
+ /*
+ * With MEMF_no_tlbflush set, alloc_heap_pages() will ignore
+ * TLB-flushes. After VM creation, this is a security issue (it ca=
n
+ * make pages accessible to guest B, when guest A may still have a
+ * cached mapping to them). So we do this only during domain creat=
ion,
+ * when the domain itself has not yet been unpaused for the first
+ * time.
+ */
a->memflags |=3D MEMF_no_tlbflush;
+ /*
+ * With MEMF_no_icache_flush, alloc_heap_pages() will skip
+ * performing icache flushes. We do it only before domain
+ * creation as once the domain is running there is a danger of
+ * executing instructions from stale caches if icache flush is
+ * delayed.
+ */
+ a->memflags |=3D MEMF_no_icache_flush;
+ }
=20
for ( i =3D a->nr_done; i < a->nr_extents; i++ )
{
@@ -211,7 +221,6 @@ static void populate_physmap(struct memop_args *a)
}
=20
mfn =3D gpfn;
- page =3D mfn_to_page(mfn);
}
else
{
@@ -255,6 +264,10 @@ static void populate_physmap(struct memop_args *a)
out:
if ( need_tlb
----- Message truncated -----
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Date: Wed, 07 Jun 2017 23:33:22 +0000
Subject: [Xen-changelog] [xen master] x86/vlapic: fix two flaws in emulatin=
g
MSR_IA32_APICBASE
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commit 4f35cb80e8813053d1cec9dc1654ceb6dd7575a0
Author: Chao Gao <chao.gao@intel.com>
AuthorDate: Tue Jun 6 14:34:30 2017 +0200
Commit: Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 6 14:34:30 2017 +0200
x86/vlapic: fix two flaws in emulating MSR_IA32_APICBASE
=20
According to SDM Chapter ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (AP=
IC)
-> Extended XAPIC (x2APIC) -> x2APIC State Transitions, The existing co=
de to
handle guest's writing MSR_IA32_APICBASE has two flaws:
1. Transition from x2APIC Mode to Disabled Mode is allowed but wrongly
disabled currently. Fix it by removing the related check.
2. Transition from x2APIC Mode to xAPIC Mode is illegal but wrongly all=
owed
currently. Considering changing ENABLE bit of the MSR has been handled,
it can be fixed by only allowing transition from xAPIC Mode to x2APIC M=
ode
(the other two transitions: from x2APIC mode to xAPIC Mode, from disabl=
ed mode
to invalid state (EN=3D0, EXTD=3D1) are disabled).
=20
Signed-off-by: Chao Gao <chao.gao@intel.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
xen/arch/x86/hvm/vlapic.c | 6 ++----
xen/include/asm-x86/hvm/vlapic.h | 4 ++++
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
index cf8ee50..4320c6e 100644
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -1003,14 +1003,12 @@ bool_t vlapic_msr_set(struct vlapic *vlapic, uint64=
_t value)
}
else
{
- if ( unlikely(vlapic_x2apic_mode(vlapic)) )
- return 0;
vlapic->hw.disabled |=3D VLAPIC_HW_DISABLED;
pt_may_unmask_irq(vlapic_domain(vlapic), NULL);
}
}
- else if ( !(value & MSR_IA32_APICBASE_ENABLE) &&
- unlikely(value & MSR_IA32_APICBASE_EXTD) )
+ else if ( ((vlapic->hw.apic_base_msr ^ value) & MSR_IA32_APICBASE_EXTD=
) &&
+ unlikely(!vlapic_xapic_mode(vlapic)) )
return 0;
=20
vlapic->hw.apic_base_msr =3D value;
diff --git a/xen/include/asm-x86/hvm/vlapic.h b/xen/include/asm-x86/hvm/vla=
pic.h
index 4656293..a63fcd5 100644
--- a/xen/include/asm-x86/hvm/vlapic.h
+++ b/xen/include/asm-x86/hvm/vlapic.h
@@ -51,8 +51,12 @@
=20
#define vlapic_base_address(vlapic) \
((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_BASE)
+/* Only check EXTD bit as EXTD can't be set if it is disabled by hardware =
*/
#define vlapic_x2apic_mode(vlapic) \
((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_EXTD)
+#define vlapic_xapic_mode(vlapic) \
+ (!vlapic_hw_disabled(vlapic) && \
+ !((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_EXTD))
=20
/*
* Generic APIC bitmap vector update & search routines.
--
generated by git-patchbot for /home/xen/git/xen.git#master
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Date: Wed, 07 Jun 2017 23:34:03 +0000
Subject: [Xen-changelog] [xen master] x86/HAP: don't open code
clear_domain_page()
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commit 3127e85ba934a2be8c16b3277af88ccce948946a
Author: Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 6 14:37:12 2017 +0200
Commit: Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 6 14:37:12 2017 +0200
x86/HAP: don't open code clear_domain_page()
=20
Also drop a stray initializer.
=20
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: George Dunlap <george.dunlap@citrix.com>
---
xen/arch/x86/mm/hap/hap.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/xen/arch/x86/mm/hap/hap.c b/xen/arch/x86/mm/hap/hap.c
index 8476269..872e2a9 100644
--- a/xen/arch/x86/mm/hap/hap.c
+++ b/xen/arch/x86/mm/hap/hap.c
@@ -248,8 +248,7 @@ static void hap_clean_dirty_bitmap(struct domain *d)
/************************************************/
static struct page_info *hap_alloc(struct domain *d)
{
- struct page_info *pg =3D NULL;
- void *p;
+ struct page_info *pg;
=20
ASSERT(paging_locked_by_me(d));
=20
@@ -259,9 +258,7 @@ static struct page_info *hap_alloc(struct domain *d)
=20
d->arch.paging.hap.free_pages--;
=20
- p =3D __map_domain_page(pg);
- clear_page(p);
- unmap_domain_page(p);
+ clear_domain_page(page_to_mfn(pg));
=20
return pg;
}
--
generated by git-patchbot for /home/xen/git/xen.git#master
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Date: Wed, 07 Jun 2017 23:33:12 +0000
Subject: [Xen-changelog] [xen master] x86/PoD: drop a pointless local
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commit 08d3fff66ef74f7ad4c71dd0a19bf528e70ed22e
Author: Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 6 14:33:47 2017 +0200
Commit: Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 6 14:33:47 2017 +0200
x86/PoD: drop a pointless local variable
=20
... and move another one into a more narrow scope.
=20
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: George Dunlap <george.dunlap@citrix.com>
---
xen/arch/x86/mm/p2m-pod.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c
index d5fea72..4085b7f 100644
--- a/xen/arch/x86/mm/p2m-pod.c
+++ b/xen/arch/x86/mm/p2m-pod.c
@@ -1180,8 +1180,6 @@ guest_physmap_mark_populate_on_demand(struct domain *=
d, unsigned long gfn,
{
struct p2m_domain *p2m =3D p2m_get_hostp2m(d);
unsigned long i, n, pod_count =3D 0;
- p2m_type_t ot;
- mfn_t omfn;
int rc =3D 0;
=20
if ( !paging_mode_translate(d) )
@@ -1194,10 +1192,11 @@ guest_physmap_mark_populate_on_demand(struct domain=
*d, unsigned long gfn,
/* Make sure all gpfns are unused */
for ( i =3D 0; i < (1UL << order); i +=3D n )
{
+ p2m_type_t ot;
p2m_access_t a;
unsigned int cur_order;
=20
- omfn =3D p2m->get_entry(p2m, gfn + i, &ot, &a, 0, &cur_order, NULL=
);
+ p2m->get_entry(p2m, gfn + i, &ot, &a, 0, &cur_order, NULL);
n =3D 1UL << min(order, cur_order);
if ( p2m_is_ram(ot) )
{
--
generated by git-patchbot for /home/xen/git/xen.git#master
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Date: Wed, 07 Jun 2017 23:33:22 +0000
Subject: [Xen-changelog] [xen master] x86/vlapic: fix two flaws in emulatin=
g
MSR_IA32_APICBASE
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commit 4f35cb80e8813053d1cec9dc1654ceb6dd7575a0
Author: Chao Gao <chao.gao@intel.com>
AuthorDate: Tue Jun 6 14:34:30 2017 +0200
Commit: Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 6 14:34:30 2017 +0200
x86/vlapic: fix two flaws in emulating MSR_IA32_APICBASE
=20
According to SDM Chapter ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (AP=
IC)
-> Extended XAPIC (x2APIC) -> x2APIC State Transitions, The existing co=
de to
handle guest's writing MSR_IA32_APICBASE has two flaws:
1. Transition from x2APIC Mode to Disabled Mode is allowed but wrongly
disabled currently. Fix it by removing the related check.
2. Transition from x2APIC Mode to xAPIC Mode is illegal but wrongly all=
owed
currently. Considering changing ENABLE bit of the MSR has been handled,
it can be fixed by only allowing transition from xAPIC Mode to x2APIC M=
ode
(the other two transitions: from x2APIC mode to xAPIC Mode, from disabl=
ed mode
to invalid state (EN=3D0, EXTD=3D1) are disabled).
=20
Signed-off-by: Chao Gao <chao.gao@intel.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
xen/arch/x86/hvm/vlapic.c | 6 ++----
xen/include/asm-x86/hvm/vlapic.h | 4 ++++
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
index cf8ee50..4320c6e 100644
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -1003,14 +1003,12 @@ bool_t vlapic_msr_set(struct vlapic *vlapic, uint64=
_t value)
}
else
{
- if ( unlikely(vlapic_x2apic_mode(vlapic)) )
- return 0;
vlapic->hw.disabled |=3D VLAPIC_HW_DISABLED;
pt_may_unmask_irq(vlapic_domain(vlapic), NULL);
}
}
- else if ( !(value & MSR_IA32_APICBASE_ENABLE) &&
- unlikely(value & MSR_IA32_APICBASE_EXTD) )
+ else if ( ((vlapic->hw.apic_base_msr ^ value) & MSR_IA32_APICBASE_EXTD=
) &&
+ unlikely(!vlapic_xapic_mode(vlapic)) )
return 0;
=20
vlapic->hw.apic_base_msr =3D value;
diff --git a/xen/include/asm-x86/hvm/vlapic.h b/xen/include/asm-x86/hvm/vla=
pic.h
index 4656293..a63fcd5 100644
--- a/xen/include/asm-x86/hvm/vlapic.h
+++ b/xen/include/asm-x86/hvm/vlapic.h
@@ -51,8 +51,12 @@
=20
#define vlapic_base_address(vlapic) \
((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_BASE)
+/* Only check EXTD bit as EXTD can't be set if it is disabled by hardware =
*/
#define vlapic_x2apic_mode(vlapic) \
((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_EXTD)
+#define vlapic_xapic_mode(vlapic) \
+ (!vlapic_hw_disabled(vlapic) && \
+ !((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_EXTD))
=20
/*
* Generic APIC bitmap vector update & search routines.
--
generated by git-patchbot for /home/xen/git/xen.git#master
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commit a5aa07b58859f653b67275cde6d8c79209ff9643
Author: Ian Jackson <ian.jackson@eu.citrix.com>
AuthorDate: Tue May 30 17:30:03 2017 +0100
Commit: Ian Jackson <Ian.Jackson@eu.citrix.com>
CommitDate: Tue May 30 17:30:03 2017 +0100
Branching 4.9: Fix versions to be 4.10-unstable
=20
Signed-off-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
---
README | 12 ++++++------
xen/Makefile | 2 +-
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/README b/README
index b09b715..6737a17 100644
--- a/README
+++ b/README
@@ -1,10 +1,10 @@
#################################
-__ __ _ _ _ ___
-\ \/ /___ _ __ | || | / |/ _ \ _ __ _ __ ___
- \ // _ \ '_ \ | || |_ | | | | |_____| '_ \| '__/ _ \
- / \ __/ | | | |__ _|| | |_| |_____| |_) | | | __/
-/_/\_\___|_| |_| |_|(_)_|\___/ | .__/|_| \___|
- |_|
+__ __ _ _ _ ___ _ _ _
+\ \/ /___ _ __ | || | / |/ _ \ _ _ _ __ ___| |_ __ _| |__ | | =
___
+ \ // _ \ '_ \ | || |_ | | | | |_____| | | | '_ \/ __| __/ _` | '_ \| |/=
_ \
+ / \ __/ | | | |__ _|| | |_| |_____| |_| | | | \__ \ || (_| | |_) | | =
__/
+/_/\_\___|_| |_| |_|(_)_|\___/ \__,_|_| |_|___/\__\__,_|_.__/|_|\=
___|
+
#################################
=20
http://www.xen.org/
diff --git a/xen/Makefile b/xen/Makefile
index 0d78c60..f6a6bc2 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -2,7 +2,7 @@
# All other places this is stored (eg. compile.h) should be autogenerated.
export XEN_VERSION =3D 4
export XEN_SUBVERSION =3D 10
-export XEN_EXTRAVERSION ?=3D -pre$(XEN_VENDORVERSION)
+export XEN_EXTRAVERSION ?=3D -unstable$(XEN_VENDORVERSION)
export XEN_FULLVERSION =3D $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVE=
RSION)
-include xen-version
=20
--
generated by git-patchbot for /home/xen/git/xen.git#master
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Message-Id: <E1dI7uY-0004SL-1A@xenbits.xenproject.org>
Date: Tue, 06 Jun 2017 06:24:14 +0000
Subject: [Xen-changelog] [xen master] x86/mmcfg: set pci_mmcfg_config_num t=
o
0 on error path
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commit d7594d553b10e74a0cbe15a157baac1aae1d3acd
Author: Roger Pau Monn=3DC3=3DA9 <roger.pau@citrix.com>
AuthorDate: Wed May 31 08:39:47 2017 +0200
Commit: Jan Beulich <jbeulich@suse.com>
CommitDate: Wed May 31 08:39:47 2017 +0200
x86/mmcfg: set pci_mmcfg_config_num to 0 on error path
=3D20
One error path of acpi_parse_mcfg doesn't set pci_mmcfg_config_num to z=
=3D
ero, fix
this.
=3D20
Signed-off-by: Roger Pau Monn=3DC3=3DA9 <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
xen/arch/x86/x86_64/acpi_mmcfg.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/xen/arch/x86/x86_64/acpi_mmcfg.c b/xen/arch/x86/x86_64/acpi_mm=
=3D
cfg.c
index a96d5e0..650140e 100644
--- a/xen/arch/x86/x86_64/acpi_mmcfg.c
+++ b/xen/arch/x86/x86_64/acpi_mmcfg.c
@@ -96,6 +96,7 @@ int __init acpi_parse_mcfg(struct acpi_table_header *head=
=3D
er)
if (!pci_mmcfg_config) {
printk(KERN_WARNING PREFIX
"No memory for MCFG config tables\n");
+ pci_mmcfg_config_num =3D3D 0;
return -ENOMEM;
}
=3D20
--
generated by git-patchbot for /home/xen/git/xen.git#master
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Message-Id: <E1dI7t5-0004Jk-B8@xenbits.xenproject.org>
Date: Tue, 06 Jun 2017 06:22:43 +0000
Subject: [Xen-changelog] [xen master] x86/pv: Drop unused
switch_kernel_stack()
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commit 353490a6f0d69bf4630b758742d4f4e070e52e81
Author: Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu May 4 15:19:31 2017 +0100
Commit: Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Tue May 30 18:50:13 2017 +0100
x86/pv: Drop unused switch_kernel_stack()
=20
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
---
xen/arch/x86/domain.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 13cdc50..d9f3cfa 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -1885,8 +1885,6 @@ static void save_segments(struct vcpu *v)
this_cpu(dirty_segment_mask) =3D dirty_segment_mask;
}
=20
-#define switch_kernel_stack(v) ((void)0)
-
static void paravirt_ctxt_switch_from(struct vcpu *v)
{
save_segments(v);
@@ -1905,8 +1903,6 @@ static void paravirt_ctxt_switch_to(struct vcpu *v)
{
unsigned long cr4;
=20
- switch_kernel_stack(v);
-
cr4 =3D pv_guest_cr4_to_real_cr4(v);
if ( unlikely(cr4 !=3D read_cr4()) )
write_cr4(cr4);
--
generated by git-patchbot for /home/xen/git/xen.git#master
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Date: Tue, 06 Jun 2017 06:24:14 +0000
Subject: [Xen-changelog] [xen master] x86/mmcfg: set pci_mmcfg_config_num t=
o
0 on error path
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commit d7594d553b10e74a0cbe15a157baac1aae1d3acd
Author: Roger Pau Monn=3DC3=3DA9 <roger.pau@citrix.com>
AuthorDate: Wed May 31 08:39:47 2017 +0200
Commit: Jan Beulich <jbeulich@suse.com>
CommitDate: Wed May 31 08:39:47 2017 +0200
x86/mmcfg: set pci_mmcfg_config_num to 0 on error path
=3D20
One error path of acpi_parse_mcfg doesn't set pci_mmcfg_config_num to z=
=3D
ero, fix
this.
=3D20
Signed-off-by: Roger Pau Monn=3DC3=3DA9 <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
xen/arch/x86/x86_64/acpi_mmcfg.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/xen/arch/x86/x86_64/acpi_mmcfg.c b/xen/arch/x86/x86_64/acpi_mm=
=3D
cfg.c
index a96d5e0..650140e 100644
--- a/xen/arch/x86/x86_64/acpi_mmcfg.c
+++ b/xen/arch/x86/x86_64/acpi_mmcfg.c
@@ -96,6 +96,7 @@ int __init acpi_parse_mcfg(struct acpi_table_header *head=
=3D
er)
if (!pci_mmcfg_config) {
printk(KERN_WARNING PREFIX
"No memory for MCFG config tables\n");
+ pci_mmcfg_config_num =3D3D 0;
return -ENOMEM;
}
=3D20
--
generated by git-patchbot for /home/xen/git/xen.git#master
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Date: Tue, 06 Jun 2017 06:22:23 +0000
Subject: [Xen-changelog] [xen master] Makefile: Mention usual targets of
subdir Makefiles
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commit 624dc330171a27f21b9664da7fc8b06bcc29be48
Author: Ian Jackson <ian.jackson@eu.citrix.com>
AuthorDate: Thu May 25 16:42:12 2017 +0100
Commit: Ian Jackson <Ian.Jackson@eu.citrix.com>
CommitDate: Tue May 30 18:38:54 2017 +0100
Makefile: Mention usual targets of subdir Makefiles
=3D20
Suggested-by: Roger Pau Monn=3DC3=3DA9 <roger.pau@citrix.com>
Signed-off-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
Acked-by: Roger Pau Monn=3DC3=3DA9 <roger.pau@citrix.com>
CC: Wei Liu <wei.liu2@citrix.com>
CC: M A Young <m.a.young@durham.ac.uk>
CC: Andrew Cooper <andrew.cooper3@citrix.com>
---
Makefile | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Makefile b/Makefile
index 51905eb..2ff33df 100644
--- a/Makefile
+++ b/Makefile
@@ -90,6 +90,11 @@ test:
#
# Also, we have a number of targets COMPONENT which run
# dist-COMPONENT, for convenience.
+#
+# The Makefiles invoked with -C from the toplevel should
+# generally have the following targets:
+# all build install clean distclean
+
=3D20
.PHONY: dist
dist: DESTDIR=3D3D$(DISTDIR)/install
--
generated by git-patchbot for /home/xen/git/xen.git#master
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Date: Wed, 12 Apr 2017 13:14:04 +0000
Subject: [Xen-changelog] [xen master] tools/insn-fuzz: Avoid making use of
static data
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commit b163e550df2127b2bd1fbce682bed87e8d18d0dc
Author: Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Mar 20 18:33:59 2017 +0000
Commit: Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Apr 6 18:42:49 2017 +0100
tools/insn-fuzz: Avoid making use of static data
=20
AFL has a measure of stability, where it passes the same corpus into th=
e
fuzzing harness and observes whether the execution path changes from be=
fore.
Any instability in the fuzzing harness reduces its effectiveness, as an
observed crash may not reliably be caused by the original corpus.
=20
In preparation to fix a stability bug, introduce struct fuzz_state, all=
ocated
on the stack and passed around via struct x86_emulate_ctxt's data param=
eter.
Propagate ctxt into the helpers such as maybe_fail(), so the state can =
be
retrieved.
=20
Move the previously-static data_{index,num} into struct fuzz_state.
=20
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
tools/fuzz/x86_instruction_emulator/fuzz-emul.c | 181 +++++++++++++++-----=
----
1 file changed, 116 insertions(+), 65 deletions(-)
diff --git a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c b/tools/fuzz/x=
86_instruction_emulator/fuzz-emul.c
index 64b7fb2..db0719e 100644
--- a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c
+++ b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c
@@ -21,7 +21,9 @@
=20
#define SEG_NUM x86_seg_none
=20
-struct input_struct {
+/* Layout of data expected as fuzzing input. */
+struct fuzz_corpus
+{
unsigned long cr[5];
uint64_t msr[MSR_INDEX_MAX];
struct cpu_user_regs regs;
@@ -29,19 +31,36 @@ struct input_struct {
unsigned long options;
unsigned char data[4096];
} input;
-#define DATA_OFFSET offsetof(struct input_struct, data)
-static unsigned int data_index;
-static unsigned int data_num;
+#define DATA_OFFSET offsetof(struct fuzz_corpus, data)
+
+/*
+ * Internal state of the fuzzing harness. Calculated initially from the i=
nput
+ * corpus, and later mutates by the emulation callbacks.
+ */
+struct fuzz_state
+{
+ /* Fuzzer's input data. */
+ struct fuzz_corpus *corpus;
+
+ /* Real amount of data backing corpus->data[]. */
+ size_t data_num;
+
+ /* Amount of corpus->data[] consumed thus far. */
+ size_t data_index;
+};
=20
/*
* Randomly return success or failure when processing data. If
* `exception` is false, this function turns _EXCEPTION to _OKAY.
*/
-static int maybe_fail(const char *why, bool exception)
+static int maybe_fail(struct x86_emulate_ctxt *ctxt,
+ const char *why, bool exception)
{
+ struct fuzz_state *s =3D ctxt->data;
+ const struct fuzz_corpus *c =3D s->corpus;
int rc;
=20
- if ( data_index >=3D data_num )
+ if ( s->data_index >=3D s->data_num )
rc =3D X86EMUL_EXCEPTION;
else
{
@@ -50,13 +69,13 @@ static int maybe_fail(const char *why, bool exception)
* 25% unhandlable
* 25% exception
*/
- if ( input.data[data_index] > 0xc0 )
+ if ( c->data[s->data_index] > 0xc0 )
rc =3D X86EMUL_EXCEPTION;
- else if ( input.data[data_index] > 0x80 )
+ else if ( c->data[s->data_index] > 0x80 )
rc =3D X86EMUL_UNHANDLEABLE;
else
rc =3D X86EMUL_OKAY;
- data_index++;
+ s->data_index++;
}
=20
=20
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Date: Wed, 12 Apr 2017 13:13:13 +0000
Subject: [Xen-changelog] [xen master] x86/svm: Introduce
svm_emul_swint_injection()
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commit 897d59a426f19f4099cd34feb0a8da9122810364
Author: Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Mar 30 17:27:07 2017 +0000
Commit: Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Apr 6 18:12:59 2017 +0100
x86/svm: Introduce svm_emul_swint_injection()
=20
Software events require emulation in some cases on AMD hardware. Intro=
duce
svm_emul_swint_injection() to perform this emulation if necessary in
svm_inject_event(), which will cope with any sources of event, rather t=
han
just those coming from x86_emulate().
=20
This logic mirrors inject_swint() in the x86 instruction emulator.
=20
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
xen/arch/x86/hvm/svm/svm.c | 133 +++++++++++++++++++++++++++++++++++++++++=
++++
1 file changed, 133 insertions(+)
diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 4d7e49f..1ffe5c3 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -1183,6 +1183,121 @@ static void svm_vcpu_destroy(struct vcpu *v)
passive_domain_destroy(v);
}
=20
+/*
+ * Emulate enough of interrupt injection to cover the DPL check (omitted b=
y
+ * hardware), and to work out whether it is safe to move %rip fowards for
+ * architectural trap vs fault semantics in the exception frame (which
+ * hardware won't cope with).
+ *
+ * The event parameter will be modified to a fault if necessary.
+ */
+static void svm_emul_swint_injection(struct x86_event *event)
+{
+ struct vcpu *curr =3D current;
+ const struct vmcb_struct *vmcb =3D curr->arch.hvm_svm.vmcb;
+ const struct cpu_user_regs *regs =3D guest_cpu_user_regs();
+ unsigned int trap =3D event->vector, type =3D event->type;
+ unsigned int fault =3D TRAP_gp_fault, ec =3D 0;
+ pagefault_info_t pfinfo;
+ struct segment_register cs, idtr;
+ unsigned int idte_size, idte_offset;
+ unsigned long idte_linear_addr;
+ struct { uint32_t a, b, c, d; } idte =3D {};
+ bool lm =3D vmcb_get_efer(vmcb) & EFER_LMA;
+ int rc;
+
+ if ( !(vmcb_get_cr0(vmcb) & X86_CR0_PE) )
+ goto raise_exception; /* TODO: support real-mode injection? */
+
+ idte_size =3D lm ? 16 : 8;
+ idte_offset =3D trap * idte_size;
+
+ /* ICEBP sets the External Event bit despite being an instruction. */
+ ec =3D (trap << 3) | X86_XEC_IDT |
+ (type =3D=3D X86_EVENTTYPE_PRI_SW_EXCEPTION ? X86_XEC_EXT : 0);
+
+ /*
+ * TODO: This does not cover the v8086 mode with CR4.VME case
+ * correctly, but falls on the safe side from the point of view of a
+ * 32bit OS. Someone with many TUITs can see about reading the TSS
+ * Software Interrupt Redirection bitmap.
+ */
+ if ( (regs->eflags & X86_EFLAGS_VM) &&
+ MASK_EXTR(regs->eflags, X86_EFLAGS_IOPL) !=3D 3 )
+ goto raise_exception;
+
+ /*
+ * Read all 8/16 bytes so the idtr limit check is applied properly to
+ * this entry, even though we don't look at all the words read.
+ */
+ hvm_get_segment_register(curr, x86_seg_cs, &cs);
+ hvm_get_segment_register(curr, x86_seg_idtr, &idtr);
+ if ( !hvm_virtual_to_linear_addr(x86_seg_idtr, &idtr, idte_offset,
+ idte_size, hvm_access_read,
+ &cs, &idte_linear_addr) )
+ goto raise_exception;
+
+ =20
----- Message truncated -----
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Message-Id: <E1cyI3P-0001Ul-36@xenbits.xenproject.org>
Date: Wed, 12 Apr 2017 13:11:23 +0000
Subject: [Xen-changelog] [xen master] golang/xenlight: Add host-related
functionality
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-------------------------by Abine-------------------------
commit 453713b175003a6241f4560c784472d86f83c64b
Author: Ronald Rojas <ronladred@gmail.com>
AuthorDate: Wed Apr 5 17:05:47 2017 +0100
Commit: George Dunlap <george.dunlap@citrix.com>
CommitDate: Thu Apr 6 15:34:06 2017 +0100
golang/xenlight: Add host-related functionality
=20
Add calls for the following host-related functionality:
- libxl_get_max_cpus
- libxl_get_online_cpus
- libxl_get_max_nodes
- libxl_get_free_memory
- libxl_get_physinfo
- libxl_get_version_info
=20
Include Golang versions of the following structs:
- libxl_physinfo as Physinfo
- libxl_version_info as VersionInfo
- libxl_hwcap as Hwcap
=20
Signed-off-by: Ronald Rojas <ronladred@gmail.com>
Reviewed-by: George Dunlap <george.dunlap@citrix.com>
Acked-by: Ian Jackson <ian.jackson@citrix.com>
---
tools/golang/xenlight/xenlight.go | 200 ++++++++++++++++++++++++++++++++++=
++++
1 file changed, 200 insertions(+)
diff --git a/tools/golang/xenlight/xenlight.go b/tools/golang/xenlight/xenl=
ight.go
index de24ffd..5b500f3 100644
--- a/tools/golang/xenlight/xenlight.go
+++ b/tools/golang/xenlight/xenlight.go
@@ -118,6 +118,103 @@ type Context struct {
logger *C.xentoollog_logger_stdiostream
}
=20
+type Hwcap []C.uint32_t
+
+func (chwcap C.libxl_hwcap) CToGo() (ghwcap Hwcap) {
+ // Alloc a Go slice for the bytes
+ size :=3D 8
+ ghwcap =3D make([]C.uint32_t, size)
+
+ // Make a slice pointing to the C array
+ mapslice :=3D (*[1 << 30]C.uint32_t)(unsafe.Pointer(&chwcap[0]))[:size:si=
ze]
+
+ // And copy the C array into the Go array
+ copy(ghwcap, mapslice)
+
+ return
+}
+
+/*
+ * Types: IDL
+ *
+ * FIXME: Generate these automatically from the IDL
+ */
+
+type Physinfo struct {
+ ThreadsPerCore uint32
+ CoresPerSocket uint32
+ MaxCpuId uint32
+ NrCpus uint32
+ CpuKhz uint32
+ TotalPages uint64
+ FreePages uint64
+ ScrubPages uint64
+ OutstandingPages uint64
+ SharingFreedPages uint64
+ SharingUsedFrames uint64
+ NrNodes uint32
+ HwCap Hwcap
+ CapHvm bool
+ CapHvmDirectio bool
+}
+
+func (cphys *C.libxl_physinfo) toGo() (physinfo *Physinfo) {
+
+ physinfo =3D &Physinfo{}
+ physinfo.ThreadsPerCore =3D uint32(cphys.threads_per_core)
+ physinfo.CoresPerSocket =3D uint32(cphys.cores_per_socket)
+ physinfo.MaxCpuId =3D uint32(cphys.max_cpu_id)
+ physinfo.NrCpus =3D uint32(cphys.nr_cpus)
+ physinfo.CpuKhz =3D uint32(cphys.cpu_khz)
+ physinfo.TotalPages =3D uint64(cphys.total_pages)
+ physinfo.FreePages =3D uint64(cphys.free_pages)
+ physinfo.ScrubPages =3D uint64(cphys.scrub_pages)
+ physinfo.ScrubPages =3D uint64(cphys.scrub_pages)
+ physinfo.SharingFreedPages =3D uint64(cphys.sharing_freed_pages)
+ physinfo.SharingUsedFrames =3D uint64(cphys.sharing_used_frames)
+ physinfo.NrNodes =3D uint32(cphys.nr_nodes)
+ physinfo.HwCap =3D cphys.hw_cap.CToGo()
+ physinfo.CapHvm =3D bool(cphys.cap_hvm)
+ physinfo.CapHvmDirectio =3D bool(cphys.cap_hvm_directio)
+
+ return
+}
+
+type VersionInfo struct {
+ XenVersionMajor int
+ XenVersionMinor int
+ XenVersionExtra string
+ Compiler string
+ CompileBy string
+ CompileDomain string
+ CompileDate string
+ Capabilities string
+ Changeset string
+ VirtStart uint64
+ Pagesize int
+ Commandline string
+ BuildId string
+}
+
+func (cinfo *C.libxl_version_info) toGo() (info *VersionInfo) {
+ info =3D=20
----- Message truncated -----
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