From: Oleksandr Andrushchenko <Oleksandr_Andrushchenko@epam.com>
To: Julien Grall <julien@xen.org>,
"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "sstabellini@kernel.org" <sstabellini@kernel.org>,
Oleksandr Tyshchenko <Oleksandr_Tyshchenko@epam.com>,
Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
Artem Mygaiev <Artem_Mygaiev@epam.com>,
"roger.pau@citrix.com" <roger.pau@citrix.com>,
"jbeulich@suse.com" <jbeulich@suse.com>,
"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
"george.dunlap@citrix.com" <george.dunlap@citrix.com>,
"paul@xen.org" <paul@xen.org>,
Bertrand Marquis <bertrand.marquis@arm.com>,
Rahul Singh <rahul.singh@arm.com>,
Oleksandr Andrushchenko <Oleksandr_Andrushchenko@epam.com>
Subject: Re: [PATCH v6 3/7] xen/arm: setup MMIO range trap handlers for hardware domain
Date: Tue, 23 Nov 2021 16:41:39 +0000 [thread overview]
Message-ID: <442c853a-5554-9be0-80e4-b1f34cd6adeb@epam.com> (raw)
In-Reply-To: <ef17fbe6-9768-9978-fa8f-6be757034234@xen.org>
Hi, Julien!
On 23.11.21 18:12, Julien Grall wrote:
>
>
> On 23/11/2021 06:58, Oleksandr Andrushchenko wrote:
>> Hi, Julien!
>
> Hi Oleksandr,
>
>> On 22.11.21 19:36, Julien Grall wrote:
>>> On 18/11/2021 10:46, Oleksandr Andrushchenko wrote:
>>>> On 18.11.21 09:27, Oleksandr Andrushchenko wrote:
>>>>>>> + unsigned int count;
>>>>>>> +
>>>>>>> + if ( is_hardware_domain(d) )
>>>>>>> + /* For each PCI host bridge's configuration space. */
>>>>>>> + count = pci_host_get_num_bridges();
>>>>>> This first part makes sense to me. But...
>>>>>>
>>>>>>> + else
>>>>>> ... I don't understand how the else is related to this commit. Can you clarify it?
>>>>>>
>>>>>>> + /*
>>>>>>> + * There's a single MSI-X MMIO handler that deals with both PBA
>>>>>>> + * and MSI-X tables per each PCI device being passed through.
>>>>>>> + * Maximum number of supported devices is 32 as virtual bus
>>>>>>> + * topology emulates the devices as embedded endpoints.
>>>>>>> + * +1 for a single emulated host bridge's configuration space.
>>>>>>> + */
>>>>>>> + count = 1;
>>>>>>> +#ifdef CONFIG_HAS_PCI_MSI
>>>>>>> + count += 32;
>>>>>> Surely, this is a decision that is based on other factor in the vPCI code. So can use a define and avoid hardcoding the number?
>>>>> Well, in the later series [1] this is defined via PCI_SLOT(~0) + 1 and there is no dedicated
>>>>> constant for that. I can use the same here, e.g. s/32/PCI_SLOT(~0) + 1
>>>
>>> I would prefer if we introduce a new constant for that. This makes easier to update the code if we decide to increase the number of virtual devices.
>>>
>>> However, I am still not sure how the 'else' part is related to this commit. Can you please clarify it?
>> Well, yes, this is too early for this patch to introduce some future knowledge, so I'll instead have:
>>
>> unsigned int domain_vpci_get_num_mmio_handlers(struct domain *d)
>> {
>> if ( !has_vpci(d) )
>> return 0;
>>
>> if ( is_hardware_domain(d) )
>> {
>> int ret = pci_host_iterate_bridges_and_count(d, vpci_get_num_handlers_cb);
>>
>> return ret < 0 ? 0 : ret;
>> }
>>
>> /*
>> * This is a guest domain:
>> *
>> * 1 for a single emulated host bridge's configuration space.
>> */
>> return 1;
>
> I am afraid that my question stands even with this approach. This patch is only meant to handle the hardware domain, therefore the change seems to be out of context.
>
> I would prefer if this change is done separately.
While I do agree that MSI part and virtual bus topology are not belonging to this
patch I can't agree with the rest: we already have MMIO handlers for guest domains
and we introduce domain_vpci_get_num_mmio_handlers which must also account
on guests and stay consistent.
So, despite the patch has "hardware domain" in its name it doesn't mean we should
break guests here.
Thus I do think the above is still correct wrt this patch.
>
> Cheers,
>
Thank you,
Oleksandr
next prev parent reply other threads:[~2021-11-23 16:42 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-05 6:33 [PATCH v6 0/7] PCI devices passthrough on Arm, part 2 Oleksandr Andrushchenko
2021-11-05 6:33 ` [PATCH v6 1/7] xen/arm: rename DEVICE_PCI to DEVICE_PCI_HOSTBRIDGE Oleksandr Andrushchenko
2021-11-16 18:26 ` Julien Grall
2021-11-05 6:33 ` [PATCH v6 2/7] xen/arm: add pci-domain for disabled devices Oleksandr Andrushchenko
2021-11-16 18:48 ` Julien Grall
2021-11-17 6:56 ` Oleksandr Andrushchenko
2021-11-17 21:33 ` Julien Grall
2021-11-18 7:13 ` Oleksandr Andrushchenko
2021-11-22 15:29 ` Julien Grall
2021-11-22 16:23 ` Oleksandr Andrushchenko
2021-11-22 17:17 ` Julien Grall
2021-11-23 6:31 ` Oleksandr Andrushchenko
2021-11-23 16:05 ` Julien Grall
2021-11-23 16:44 ` Oleksandr Andrushchenko
2021-11-23 17:15 ` Julien Grall
2021-11-24 6:54 ` Oleksandr Andrushchenko
2021-11-05 6:33 ` [PATCH v6 3/7] xen/arm: setup MMIO range trap handlers for hardware domain Oleksandr Andrushchenko
2021-11-09 9:20 ` Oleksandr Andrushchenko
2021-11-16 19:12 ` Julien Grall
2021-11-18 7:27 ` Oleksandr Andrushchenko
2021-11-18 10:46 ` Oleksandr Andrushchenko
2021-11-22 17:36 ` Julien Grall
2021-11-23 6:58 ` Oleksandr Andrushchenko
2021-11-23 16:12 ` Julien Grall
2021-11-23 16:41 ` Oleksandr Andrushchenko [this message]
2021-11-23 16:58 ` Julien Grall
2021-11-24 7:22 ` Oleksandr Andrushchenko
2021-11-05 6:33 ` [PATCH v6 4/7] xen/arm: do not map PCI ECAM and MMIO space to Domain-0's p2m Oleksandr Andrushchenko
2021-11-23 16:42 ` Julien Grall
2021-11-24 7:42 ` Oleksandr Andrushchenko
2021-11-05 6:33 ` [PATCH v6 5/7] xen/arm: do not map IRQs and memory for disabled devices Oleksandr Andrushchenko
2021-11-16 19:22 ` Julien Grall
2021-11-18 6:59 ` Oleksandr Andrushchenko
2021-11-22 19:31 ` Julien Grall
2021-11-23 7:23 ` Oleksandr Andrushchenko
2021-11-05 6:33 ` [PATCH v6 6/7] xen/arm: process pending vPCI map/unmap operations Oleksandr Andrushchenko
2021-11-05 7:40 ` Jan Beulich
2021-11-17 21:26 ` Julien Grall
2021-11-05 6:33 ` [PATCH v6 7/7] xen/arm: do not use void pointer in pci_host_common_probe Oleksandr Andrushchenko
2021-11-17 11:12 ` Rahul Singh
2021-11-17 21:45 ` Julien Grall
2021-11-18 7:34 ` Oleksandr Andrushchenko
2021-11-22 17:48 ` Julien Grall
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