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From: "Jan Beulich" <JBeulich@suse.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>, Keir Fraser <keir@xen.org>
Subject: Re: [PATCH v4 RFC 6/6] x86/MSI: properly track guest masking requests
Date: Thu, 25 Jun 2015 15:49:26 +0100	[thread overview]
Message-ID: <558C31160200007800089BBE@mail.emea.novell.com> (raw)
In-Reply-To: <558C0FA8.7060303@citrix.com>

>>> On 25.06.15 at 16:26, <andrew.cooper3@citrix.com> wrote:
> On 25/06/15 09:04, Jan Beulich wrote:
>>>>> On 24.06.15 at 19:24, <andrew.cooper3@citrix.com> wrote:
>>> On 22/06/15 15:51, Jan Beulich wrote:
>>>> --- a/xen/arch/x86/msi.c
>>>> +++ b/xen/arch/x86/msi.c
>>>> @@ -1308,6 +1308,39 @@ printk("%04x:%02x:%02x.%u: MSI-X %03x:%u
>>>>          return 1;
>>>>      }
>>>>  
>>>> +    entry = find_msi_entry(pdev, -1, PCI_CAP_ID_MSI);
>>>> +    if ( entry && entry->msi_attrib.maskbit )
>>>> +    {
>>>> +        uint16_t cntl;
>>>> +        uint32_t unused;
>>>> +
>>>> +        pos = entry->msi_attrib.pos;
>>>> +        if ( reg < pos || reg >= entry->msi.mpos + 8 )
>>>> +            return 0;
>>>> +printk("%04x:%02x:%02x.%u: MSI %03x:%u->%04x\n", seg, bus, slot, func, reg, 
> size, *data);//temp
>>>> +
>>>> +        if ( reg == msi_control_reg(pos) )
>>>> +            return size == 2 ? 1 : -EACCES;
>>>> +        if ( reg < entry->msi.mpos || reg >= entry->msi.mpos + 4 || size != 4 )
>>>> +            return -EACCES;
>>> Can we avoid using EACCES to avoid confusing it with a mismatched tools
>>> version?
>> What other suitable error code would you see here? I'm not sure
>> we want this error code to be reserved for exactly one purpose,
>> the more that here we're on a path that will never has this error
>> code returned to the guest (and even less so via a domctl/sysctl,
>> which would be the primary mismatched-tools-version candidates).
> 
> If there is no chance that we will end up back on a domctl/sysctl error
> path then its use is fine.

I don't see how it could get on such a patch - it's an intercept of
a guest (Dom0) operation. If we were to introduce hypercall based
PCI config space writes, then that would be a physdev op imo.

Jan

  reply	other threads:[~2015-06-25 14:49 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-22 14:38 [PATCH v4 RFC 0/6] x86/MSI: XSA-120, 126, 128-131 follow-up Jan Beulich
2015-06-22 14:46 ` [PATCH v4 RFC 1/6] x86/PCI: add config space write abstract intercept logic Jan Beulich
2015-06-22 19:31   ` Konrad Rzeszutek Wilk
2015-06-23  7:21     ` Jan Beulich
2015-06-23 11:06       ` Konrad Rzeszutek Wilk
2015-06-23 12:55         ` Jan Beulich
2015-06-24 17:09   ` Andrew Cooper
2015-06-22 14:47 ` [PATCH v4 RFC 2/6] x86/MSI-X: track host and guest mask‑all requests separately Jan Beulich
2015-06-24 17:15   ` Andrew Cooper
2015-06-25  8:01     ` Jan Beulich
2015-06-25 14:25       ` Andrew Cooper
2015-06-22 14:49 ` [PATCH v4 3/6] x86/MSI-X: be more careful during teardown Jan Beulich
2015-06-22 14:50 ` [PATCH v4 4/6] x86/MSI-X: access MSI-X table only after having enabled MSI-X Jan Beulich
2015-06-22 14:51 ` [PATCH v4 RFC 5/6] x86/MSI-X: reduce fiddling with control register during restore Jan Beulich
2015-06-22 14:51 ` [PATCH v4 RFC 6/6] x86/MSI: properly track guest masking requests Jan Beulich
2015-06-24 17:24   ` Andrew Cooper
2015-06-25  8:04     ` Jan Beulich
2015-06-25 14:26       ` Andrew Cooper
2015-06-25 14:49         ` Jan Beulich [this message]
2015-07-13 11:42 ` [PATCH v4 RFC 0/6] x86/MSI: XSA-120, 126, 128-131 follow-up Jan Beulich

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