From: "Jan Beulich" <JBeulich@suse.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH v5 06/21] xen/x86: Improvements to in-hypervisor cpuid sanity checks
Date: Fri, 08 Apr 2016 12:06:10 -0600 [thread overview]
Message-ID: <5708012202000078000E61BE@prv-mh.provo.novell.com> (raw)
In-Reply-To: <1460030246-30153-7-git-send-email-andrew.cooper3@citrix.com>
>>> On 07.04.16 at 13:57, <andrew.cooper3@citrix.com> wrote:
> Currently, {pv,hvm}_cpuid() has a large quantity of essentially-static logic
> for modifying the features visible to a guest. A lot of this can be
> subsumed
> by {pv,hvm}_featuremask, which identify the features available on this
> hardware which could be given to a PV or HVM guest.
>
> This is a step in the direction of full per-domain cpuid policies, but lots
> more development is needed for that. As a result, the static checks are
> simplified, but the dynamic checks need to remain for now.
>
> As a side effect, some of the logic for special features can be improved.
> OSXSAVE and OSPKE will be automatically cleared because of being absent in
> the
> featuremask. This allows the fast-forward logic to be more simple.
>
> In addition, there are some corrections to the existing logic:
>
> * Hiding PSE36 out of PAE mode is architecturally wrong. It turns out that
> it was a bugfix for running HyperV under Xen, which wanted to see PSE36
> even after choosing to use PAE paging. PSE36 is not supported by shadow
> paging, so is hidden from non-HAP guests, but is still visible for HAP
> guests. It is also leaked into non-HAP guests when the guest is already
> running in PAE mode.
> * Changing the visibility of RDTSCP based on host TSC stability or virtual
> TSC mode is bogus, so dropped.
> * When emulating Intel to a guest, the common features in e1d should be
> cleared.
> * The APIC bit in e1d (on non-Intel) is also a fast-forward from the
> APIC_BASE MSR.
>
> As a small improvement, use compiler-visible &'s and |'s, rather than
> {clear,set}_bit().
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
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next prev parent reply other threads:[~2016-04-08 18:06 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-07 11:57 [PATCH v5 00/21] x86: Improvements to cpuid handling for guests Andrew Cooper
2016-04-07 11:57 ` [PATCH v5 01/21] xen/x86: Annotate VM applicability in featureset Andrew Cooper
2016-04-07 23:01 ` Jan Beulich
2016-04-07 11:57 ` [PATCH v5 02/21] xen/x86: Calculate maximum host and guest featuresets Andrew Cooper
2016-04-07 23:04 ` Jan Beulich
2016-04-07 11:57 ` [PATCH v5 03/21] xen/x86: Generate deep dependencies of features Andrew Cooper
2016-04-07 23:18 ` Jan Beulich
2016-04-07 23:36 ` Andrew Cooper
2016-04-08 15:17 ` Jan Beulich
2016-04-08 15:18 ` Andrew Cooper
2016-04-07 11:57 ` [PATCH v5 04/21] xen/x86: Clear dependent features when clearing a cpu cap Andrew Cooper
2016-04-08 15:36 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 05/21] xen/x86: Improve disabling of features which have dependencies Andrew Cooper
2016-04-08 15:04 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 06/21] xen/x86: Improvements to in-hypervisor cpuid sanity checks Andrew Cooper
2016-04-08 16:10 ` Konrad Rzeszutek Wilk
2016-04-08 18:06 ` Jan Beulich [this message]
2016-04-07 11:57 ` [PATCH v5 07/21] x86/cpu: Move set_cpumask() calls into c_early_init() Andrew Cooper
2016-04-08 18:09 ` Jan Beulich
2016-04-07 11:57 ` [PATCH v5 08/21] x86/cpu: Sysctl and common infrastructure for levelling context switching Andrew Cooper
2016-04-07 16:54 ` Daniel De Graaf
2016-04-08 16:12 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 09/21] x86/cpu: Rework AMD masking MSR setup Andrew Cooper
2016-04-08 16:13 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 10/21] x86/cpu: Rework Intel masking/faulting setup Andrew Cooper
2016-04-08 16:14 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 11/21] x86/cpu: Context switch cpuid masks and faulting state in context_switch() Andrew Cooper
2016-04-08 16:15 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 12/21] x86/pv: Provide custom cpumasks for PV domains Andrew Cooper
2016-04-08 16:17 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 13/21] x86/domctl: Update PV domain cpumasks when setting cpuid policy Andrew Cooper
2016-04-08 16:26 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 14/21] xen+tools: Export maximum host and guest cpu featuresets via SYSCTL Andrew Cooper
2016-04-07 16:54 ` Daniel De Graaf
2016-04-08 16:32 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 15/21] tools/libxc: Modify bitmap operations to take void pointers Andrew Cooper
2016-04-07 13:00 ` Wei Liu
2016-04-08 16:34 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 16/21] tools/libxc: Use public/featureset.h for cpuid policy generation Andrew Cooper
2016-04-08 16:37 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 17/21] tools/libxc: Expose the automatically generated cpu featuremask information Andrew Cooper
2016-04-08 16:38 ` Konrad Rzeszutek Wilk
2016-04-07 11:57 ` [PATCH v5 18/21] tools: Utility for dealing with featuresets Andrew Cooper
2016-04-07 11:57 ` [PATCH v5 19/21] tools/libxc: Wire a featureset through to cpuid policy logic Andrew Cooper
2016-04-07 11:57 ` [PATCH v5 20/21] tools/libxc: Use featuresets rather than guesswork Andrew Cooper
2016-04-07 11:57 ` [PATCH v5 21/21] tools/libxc: Calculate xstate cpuid leaf from guest information Andrew Cooper
2016-04-07 12:58 ` Wei Liu
2016-04-08 21:00 ` Jan Beulich
2016-04-08 21:45 ` Andrew Cooper
2016-04-08 22:38 ` Jan Beulich
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