From: "Jan Beulich" <JBeulich@suse.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>,
Luwei Kang <luwei.kang@intel.com>,
xen-devel@lists.xen.org
Cc: chao.p.peng@intel.com, yong.y.wang@intel.com
Subject: Re: [PATCH] x86/cpuid: AVX-512 Feature Detection
Date: Wed, 29 Jun 2016 04:03:11 -0600 [thread overview]
Message-ID: <5773B8FF02000078000F9BE4@prv-mh.provo.novell.com> (raw)
In-Reply-To: <48a8675c-1f1d-92e1-4d73-4b42614006ec@citrix.com>
>>> On 29.06.16 at 11:50, <andrew.cooper3@citrix.com> wrote:
> On 29/06/16 03:20, Luwei Kang wrote:
>> --- a/xen/tools/gen-cpuid.py
>> +++ b/xen/tools/gen-cpuid.py
>> @@ -235,6 +235,10 @@ def crunch_numbers(state):
>> # subsequent instruction groups may only be VEX encoded.
>> AVX: [FMA, FMA4, F16C, AVX2, XOP],
>>
>> + # AVX-512 is an extention of AVX2 and it depends on AVX2 available.
>> + AVX2: [AVX512F, AVX512DQ, AVX512IFMA, AVX512PF, AVX512ER, AVX512CD,
>> + AVX512BW, AVX512VL, AVX512VBMI],
>
> I think this needs adjusting. AVX512F is the base feature and
> indication of extra xstate, while all other AVX512 features (e.g.
> AVX512DQ) are explicitly documented not needing to check for AVX512F if
> the AVX512DQ bit is present.
I think the "not" here is wrong? At least my copy (rev 024) requires
all involved feature bits to be checked (see e.g. table 2-2 or the
individual instruction pages).
> I think it wants to look something like:
>
> # AVX2 is an extension to AVX, providing mainly new integer instructions.
> # In principle, AVX512 only depends on YMM register state, but many AVX2
DYM ZMM register state here?
Jan
> # instructions are extended by AVX512F to 512-bit forms.
> AVX2: [AVX512F],
>
> # AVX512F is taken to mean hardware support for EVEX encoded instructions,
> # 512bit registers, and the instructions themselves. All further AVX512
> features
> # are built on top of AVX512F.
> AVX512F: [AVX512DQ, AVX512IFMA, AVX512PF, AVX512ER, AVX512CD,
> AVX512BW, AVX512VL, AVX512VBMI],
>
> ~Andrew
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next prev parent reply other threads:[~2016-06-29 10:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-29 2:20 [PATCH] x86/cpuid: AVX-512 Feature Detection Luwei Kang
2016-06-29 9:50 ` Andrew Cooper
2016-06-29 9:53 ` Andrew Cooper
2016-06-29 10:03 ` Jan Beulich [this message]
2016-06-29 11:37 ` Andrew Cooper
2016-06-29 14:13 ` Jan Beulich
-- strict thread matches above, loose matches on Subject: below --
2016-06-29 1:57 Luwei Kang
2016-06-29 9:21 ` Jan Beulich
2016-06-28 5:51 Luwei Kang
2016-06-28 7:49 ` Jan Beulich
2016-06-28 8:10 ` Kang, Luwei
2016-06-28 8:46 ` Andrew Cooper
2016-06-28 8:51 ` Kang, Luwei
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