Re: [PATCH] x86/cpuid: AVX-512 Feature Detection

["Kang, Luwei" <luwei.kang@intel.com>]

Thanks for your advice, I will  make a change right now.


-----Original Message-----
From: Jan Beulich [mailto:JBeulich@suse.com] 
Sent: Tuesday, June 28, 2016 3:49 PM
To: Kang, Luwei <luwei.kang@intel.com>
Cc: andrew.cooper3@citrix.com; Peng, Chao P <chao.p.peng@intel.com>; Wang, Yong Y <yong.y.wang@intel.com>; xen-devel@lists.xen.org
Subject: Re: [PATCH] x86/cpuid: AVX-512 Feature Detection

>>> On 28.06.16 at 07:51, <luwei.kang@intel.com> wrote:
> --- a/xen/arch/x86/hvm/hvm.c
> +++ b/xen/arch/x86/hvm/hvm.c
> @@ -3474,6 +3474,14 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx,
>                                    xstate_sizes[_XSTATE_BNDCSR]);
>              }
>  
> +            if ( _ebx & cpufeat_mask(X86_FEATURE_AVX512F) )
> +            {
> +                xfeature_mask |= XSTATE_OPMASK | XSTATE_ZMM | XSTATE_HI_ZMM;
> +                xstate_size = max(xstate_size,
> +                                  xstate_offsets[_XSTATE_HI_ZMM] +
> +                                  xstate_sizes[_XSTATE_HI_ZMM]);

I think this would better be three such statements, one per bit.
Otherwise the goal of not putting in assumptions on the relative ordering of bits and save area ranges gets undermined.

> @@ -1136,9 +1136,16 @@ void pv_cpuid(struct cpu_user_regs *regs)
>      case XSTATE_CPUID:
>  
>          if ( !is_control_domain(currd) && !is_hardware_domain(currd) 
> )
> +        {
>              domain_cpuid(currd, 1, 0, &tmp, &tmp, &_ecx, &tmp);
> +            domain_cpuid(currd, 0x07, 0, &tmp, &_ebx, &tmp, &tmp);

The neighboring line tells you that this should be 7 instead of 0x07.

> --- a/xen/include/public/arch-x86/cpufeatureset.h
> +++ b/xen/include/public/arch-x86/cpufeatureset.h
> @@ -206,15 +206,24 @@ XEN_CPUFEATURE(PQM,           5*32+12) /*   Platform QoS Monitoring */
>  XEN_CPUFEATURE(NO_FPU_SEL,    5*32+13) /*!  FPU CS/DS stored as zero */
>  XEN_CPUFEATURE(MPX,           5*32+14) /*S  Memory Protection Extensions */
>  XEN_CPUFEATURE(PQE,           5*32+15) /*   Platform QoS Enforcement */
> +XEN_CPUFEATURE(AVX512F,       5*32+16) /*A  AVX-512 Foundation Instructions */
> +XEN_CPUFEATURE(AVX512DQ,      5*32+17) /*A  AVX-512 Doubleword & Quadword Instrs */
>  XEN_CPUFEATURE(RDSEED,        5*32+18) /*A  RDSEED instruction */
>  XEN_CPUFEATURE(ADX,           5*32+19) /*A  ADCX, ADOX instructions */
>  XEN_CPUFEATURE(SMAP,          5*32+20) /*S  Supervisor Mode Access Prevention */
> +XEN_CPUFEATURE(AVX512IFMA,    5*32+21) /*A  AVX-512 Integer Fused Multiply Add */
>  XEN_CPUFEATURE(CLFLUSHOPT,    5*32+23) /*A  CLFLUSHOPT instruction */
>  XEN_CPUFEATURE(CLWB,          5*32+24) /*A  CLWB instruction */
> +XEN_CPUFEATURE(AVX512PF,      5*32+26) /*A  AVX-512 Prefetch Instructions */
> +XEN_CPUFEATURE(AVX512ER,      5*32+27) /*A  AVX-512 Exponent & Reciprocal Instrs */
> +XEN_CPUFEATURE(AVX512CD,      5*32+28) /*A  AVX-512 Conflict Detection Instrs */
>  XEN_CPUFEATURE(SHA,           5*32+29) /*A  SHA1 & SHA256 instructions */
> +XEN_CPUFEATURE(AVX512BW,      5*32+30) /*A  AVX-512 Byte and Word Instructions */
> +XEN_CPUFEATURE(AVX512VL,      5*32+31) /*A  AVX-512 Vector Length Extensions */
>  
>  /* Intel-defined CPU features, CPUID level 0x00000007:0.ecx, word 6 */
>  XEN_CPUFEATURE(PREFETCHWT1,   6*32+ 0) /*A  PREFETCHWT1 instruction */
> +XEN_CPUFEATURE(AVX512VBMI,    6*32+ 1) /*A  AVX-512 Vector Byte Manipulation Instrs */
>  XEN_CPUFEATURE(PKU,           6*32+ 3) /*H  Protection Keys for Userspace */
>  XEN_CPUFEATURE(OSPKE,         6*32+ 4) /*!  OS Protection Keys Enable */

This lacks an adjustment to the dependencies between features in xen/tools/gen-cpuid.py.

Jan


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