Re: [Xen-devel] HPET interrupt remapping during boot

[Jan Beulich <jbeulich@suse.com>]

On 08.10.2019 20:30, Andrew Cooper wrote:
> Hello,
> 
> I have no idea if this is a regression or not.  I suspect it might not
> be, and has always been broken.
> 
> Either way, I'm seeing occasional single interrupt remapping errors when
> booting a range of Intel systems
> 
> (XEN) x2APIC mode is already enabled by BIOS.
> (XEN) Using APIC driver x2apic_cluster
> ...
> (XEN) Platform timer is 23.999MHz HPET
> (XEN) Detected 2194.922 MHz processor.
> ...
> (XEN) HVM: HAP page sizes: 4kB, 2MB, 1GB
> (XEN) alt table ffff82d08047a070 -> ffff82d080486c6c
> (XEN) [VT-D]INTR-REMAP: Request device [0000:f0:1f.0] fault index 0,
> iommu reg = ffff82c00072d000
> (XEN) [VT-D]INTR-REMAP: reason 22 - Present field in the IRTE entry is clear
> (XEN) microcode: CPU2 updated from revision 0x5000021 to 0x500002b, date
> = 2019-08-12
> 
> From other debugging, I know that this happens after CPU 1 (which is a
> hyperthread) has passed through start_secondary().
> 
> f0:1f.0 is one of the IO-APICs, and if I've cross referenced the DMAR
> and APIC tables properly, is the IO-APIC on the PCH, making the
> problematic IRQ GSI0.
> 
> This suggests that we have an error setting up the timer IRQ (as the
> HPET isn't MSI-capable), but we have already allegedly used it
> successfully earlier on boot.

Wait - is this really a system with the timer at GSI 0, i.e. without
an interrupt source override like this (as seen in Linux logs):

ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)

Otherwise isn't this rather an ExtInt arriving through the PIC? We
mask all PIC interrupts first thing, but I'm not sure there aren't
paths where we'd unmask any. Additionally I seem to vaguely recall
that the spurious interrupt can't be masked at the PIC, and I do
recall seeing (randomly, like you) spurious interrupts during boot
(can't tell offhand whether this was on AMD and/or Intel, and
perhaps on IOMMU-less systems only). I've never seen though what
you describe here.

Then again the log message saying "fault index 0" doesn't tell us
what the GSI is, or what IO-APIC pin the IRQ can through. All not
yet set up IO-APIC RTEs would specify a remapping index of zero.
Of course all such IO-APIC entries ought to have their mask bit
set - question is whether the system comes out of boot with one
(perhaps indeed an ExtInt one) not masked.

Jan

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