From: Jan Beulich <jbeulich@suse.com>
To: "Roger Pau Monné" <roger.pau@citrix.com>,
"Andrew Cooper" <andrew.cooper3@citrix.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>,
Julien Grall <julien@xen.org>, Wei Liu <wl@xen.org>,
Ian Jackson <ian.jackson@eu.citrix.com>,
George Dunlap <george.dunlap@citrix.com>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH v3 2/2] x86/idle: prevent entering C6 with in service interrupts on Intel
Date: Mon, 18 May 2020 17:47:47 +0200 [thread overview]
Message-ID: <6ce247e4-ef85-6793-68a6-0d1cde7f886d@suse.com> (raw)
In-Reply-To: <20200518154527.GW54375@Air-de-Roger>
On 18.05.2020 17:45, Roger Pau Monné wrote:
> On Mon, May 18, 2020 at 05:05:12PM +0200, Jan Beulich wrote:
>> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments unless you have verified the sender and know the content is safe.
>>
>> On 15.05.2020 15:58, Roger Pau Monne wrote:
>>> --- a/docs/misc/xen-command-line.pandoc
>>> +++ b/docs/misc/xen-command-line.pandoc
>>> @@ -652,6 +652,15 @@ Specify the size of the console debug trace buffer. By specifying `cpu:`
>>> additionally a trace buffer of the specified size is allocated per cpu.
>>> The debug trace feature is only enabled in debugging builds of Xen.
>>>
>>> +### disable-c6-errata
>>
>> Hmm, yes please - a disable for errata! ;-)
>>
>> How about "avoid-c6-errata", and then perhaps as a sub-option to
>> "cpuidle="? (If we really want a control for this in the first
>> place.)
>
> Right, I see I'm very bad at naming. Not sure it's even worth it
> maybe?
>
> I can remove it completely from the patch if that is OK.
I'd be fine without. Andrew?
Jan
next prev parent reply other threads:[~2020-05-18 15:48 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-15 13:58 [PATCH v3 0/2] x86/idle: fix for Intel ISR errata Roger Pau Monne
2020-05-15 13:58 ` [PATCH v3 1/2] x86/idle: rework C6 EOI workaround Roger Pau Monne
2020-05-18 14:48 ` Jan Beulich
2020-05-15 13:58 ` [PATCH v3 2/2] x86/idle: prevent entering C6 with in service interrupts on Intel Roger Pau Monne
2020-05-18 15:05 ` Jan Beulich
2020-05-18 15:45 ` Roger Pau Monné
2020-05-18 15:47 ` Jan Beulich [this message]
2020-05-20 18:38 ` Andrew Cooper
2020-05-20 21:30 ` Andrew Cooper
2020-05-21 8:45 ` Roger Pau Monné
2020-05-21 16:27 ` Andrew Cooper
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