From: Jan Beulich <jbeulich@suse.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
"Wei Liu" <wl@xen.org>, "Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [Xen-devel] [PATCH 7/7] x86emul: support SYSRET
Date: Wed, 25 Mar 2020 12:55:48 +0100 [thread overview]
Message-ID: <6fe56e73-6d6c-9f8a-136d-ace39e9c8b09@suse.com> (raw)
In-Reply-To: <9af3c1bb-5b8f-4ff5-c9ce-2f34af652814@citrix.com>
On 25.03.2020 11:00, Andrew Cooper wrote:
> On 24/03/2020 16:29, Jan Beulich wrote:
>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>> @@ -5975,6 +5975,60 @@ x86_emulate(
>> goto done;
>> break;
>>
>> + case X86EMUL_OPC(0x0f, 0x07): /* sysret */
>> + vcpu_must_have(syscall);
>> + /* Inject #UD if syscall/sysret are disabled. */
>> + fail_if(!ops->read_msr);
>> + if ( (rc = ops->read_msr(MSR_EFER, &msr_val, ctxt)) != X86EMUL_OKAY )
>> + goto done;
>> + generate_exception_if((msr_val & EFER_SCE) == 0, EXC_UD);
>
> (as with the SYSCALL side), no need for the vcpu_must_have(syscall) as
> well as this check.
Upon re-reading I'm now confused - are you suggesting to also drop
the EFER.SCE check? That's not what you said in reply to 6/7. If
so, what's your thinking behind saying so? If I'm to guess, this
may go along the lines of you suggesting to drop the explicit CPUID
checks from SYSENTER/SYSEXIT as well, but I'm not seeing there
either why you would think this way (albeit there it's also a
little vague what exact changes you're thinking of at the MSR
handling side).
Jan
next prev parent reply other threads:[~2020-03-25 11:56 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-24 16:18 [Xen-devel] [PATCH 0/7] x86emul: (mainly) vendor specific behavior adjustments Jan Beulich
2020-03-24 16:26 ` [Xen-devel] [PATCH 1/7] x86emul: add wrappers to check for AMD-like behavior Jan Beulich
2020-03-25 13:26 ` Andrew Cooper
2020-03-24 16:26 ` [Xen-devel] [PATCH 2/7] x86emul: vendor specific near RET behavior in 64-bit mode Jan Beulich
2020-03-25 13:36 ` Andrew Cooper
2020-03-24 16:27 ` [Xen-devel] [PATCH 3/7] x86emul: vendor specific direct branch " Jan Beulich
2020-03-25 14:10 ` Andrew Cooper
2020-03-24 16:27 ` [Xen-devel] [PATCH 4/7] x86emul: vendor specific near indirect " Jan Beulich
2020-03-25 14:11 ` Andrew Cooper
2020-03-24 16:28 ` [Xen-devel] [PATCH 5/7] x86emul: vendor specific SYSENTER/SYSEXIT behavior in long mode Jan Beulich
2020-03-25 14:15 ` Andrew Cooper
2020-03-24 16:28 ` [Xen-devel] [PATCH 6/7] x86emul: vendor specific SYSCALL behavior Jan Beulich
2020-03-25 9:44 ` Andrew Cooper
2020-03-24 16:29 ` [Xen-devel] [PATCH 7/7] x86emul: support SYSRET Jan Beulich
2020-03-25 10:00 ` Andrew Cooper
2020-03-25 10:19 ` Jan Beulich
2020-03-25 10:47 ` Andrew Cooper
2020-03-25 11:55 ` Jan Beulich [this message]
2020-03-25 12:25 ` Andrew Cooper
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