From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>,
xen-devel <xen-devel@lists.xenproject.org>
Cc: Brian Woods <brian.woods@amd.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: Re: [Xen-devel] [PATCH 3/9] AMD/IOMMU: use bit field for IRTE
Date: Tue, 18 Jun 2019 11:37:46 +0100 [thread overview]
Message-ID: <7a2cfbe7-32d3-4349-66a3-84b4d1ecf6f6@citrix.com> (raw)
In-Reply-To: <5D024E3E0200007800237E03@prv1-mh.provo.novell.com>
On 13/06/2019 14:23, Jan Beulich wrote:
> At the same time restrict its scope to just the single source file
> actually using it, and abstract accesses by introducing a union of
> pointers. (A union of the actual table entries is not used to make it
> impossible to [wrongly, once the 128-bit form gets added] perform
> pointer arithmetic / array accesses on derived types.)
>
> Also move away from updating the entries piecemeal: Construct a full new
> entry, and write it out.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> It would have been nice to use write_atomic() or ACCESS_ONCE() for the
> actual writes, but both cast the value to a scalar one, which doesn't
> suit us here (and I also didn't want to make the compound type a union
> with a raw member just for this).
>
> --- a/xen/drivers/passthrough/amd/iommu_intr.c
> +++ b/xen/drivers/passthrough/amd/iommu_intr.c
> @@ -23,6 +23,23 @@
> #include <asm/io_apic.h>
> #include <xen/keyhandler.h>
>
> +struct irte_basic {
I'd suggest irte_32, to go with irte_128 in the following patch.
The 128bit format is also used for posted interrupts, and isn't specific
to x2apic support.
Furthermore, calling it irte_full isn't a term I can see in the manual,
and is falling into the naming trap that USB currently lives in.
> + unsigned int remap_en:1;
> + unsigned int sup_io_pf:1;
> + unsigned int int_type:3;
> + unsigned int rq_eoi:1;
> + unsigned int dm:1;
> + unsigned int guest_mode:1; /* MBZ */
> + unsigned int dest:8;
> + unsigned int vector:8;
> + unsigned int :8;
> +};
> +
> +union irte_ptr {
> + void *raw;
> + struct irte_basic *basic;
> +};
> +
> #define INTREMAP_TABLE_ORDER 1
> #define INTREMAP_LENGTH 0xB
> #define INTREMAP_ENTRIES (1 << INTREMAP_LENGTH)
> @@ -101,47 +118,44 @@ static unsigned int alloc_intremap_entry
> return slot;
> }
>
> -static u32 *get_intremap_entry(int seg, int bdf, int offset)
> +static union irte_ptr get_intremap_entry(unsigned int seg, unsigned int bdf,
> + unsigned int offset)
As this is changing, s/offset/entry/ to avoid any confusion where offset
might be in units of bytes.
~Andrew
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next prev parent reply other threads:[~2019-06-18 10:38 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-13 13:14 [Xen-devel] [PATCH 0/9] x86: AMD x2APIC support Jan Beulich
2019-06-13 13:22 ` [Xen-devel] [PATCH 1/9] AMD/IOMMU: use bit field for extended feature register Jan Beulich
2019-06-17 19:07 ` Woods, Brian
2019-06-18 9:37 ` Jan Beulich
2019-06-17 20:23 ` Andrew Cooper
2019-06-18 9:33 ` Jan Beulich
2019-06-13 13:22 ` [Xen-devel] [PATCH 2/9] AMD/IOMMU: use bit field for control register Jan Beulich
2019-06-18 9:54 ` Andrew Cooper
2019-06-18 10:45 ` Jan Beulich
2019-06-13 13:23 ` [Xen-devel] [PATCH 3/9] AMD/IOMMU: use bit field for IRTE Jan Beulich
2019-06-18 10:37 ` Andrew Cooper [this message]
2019-06-18 11:53 ` Jan Beulich
2019-06-18 12:16 ` Andrew Cooper
2019-06-18 12:55 ` Jan Beulich
2019-06-18 11:31 ` Andrew Cooper
2019-06-18 11:47 ` Jan Beulich
2019-06-13 13:23 ` [Xen-devel] [PATCH 4/9] AMD/IOMMU: introduce 128-bit IRTE non-guest-APIC IRTE format Jan Beulich
2019-06-18 11:57 ` Andrew Cooper
2019-06-18 15:31 ` Jan Beulich
2019-06-13 13:24 ` [Xen-devel] [PATCH 5/9] AMD/IOMMU: split amd_iommu_init_one() Jan Beulich
2019-06-18 12:17 ` Andrew Cooper
2019-06-13 13:25 ` [Xen-devel] [PATCH 6/9] AMD/IOMMU: allow enabling with IRQ not yet set up Jan Beulich
2019-06-18 12:22 ` Andrew Cooper
2019-06-13 13:26 ` [Xen-devel] [PATCH 7/9] AMD/IOMMU: adjust setup of internal interrupt for x2APIC mode Jan Beulich
2019-06-18 12:35 ` Andrew Cooper
2019-06-13 13:27 ` [Xen-devel] [PATCH 8/9] AMD/IOMMU: enable x2APIC mode when available Jan Beulich
2019-06-18 13:40 ` Andrew Cooper
2019-06-18 14:02 ` Jan Beulich
2019-06-13 13:28 ` [Xen-devel] [PATCH RFC 9/9] AMD/IOMMU: correct IRTE updating Jan Beulich
2019-06-18 13:28 ` Andrew Cooper
2019-06-18 14:58 ` Jan Beulich
2019-06-27 15:15 ` [Xen-devel] [PATCH v2 00/10] x86: AMD x2APIC support Jan Beulich
2019-06-27 15:19 ` [Xen-devel] [PATCH v2 01/10] AMD/IOMMU: restrict feature logging Jan Beulich
2019-07-01 15:37 ` Andrew Cooper
2019-07-01 15:59 ` Woods, Brian
2019-06-27 15:19 ` [Xen-devel] [PATCH v2 02/10] AMD/IOMMU: use bit field for extended feature register Jan Beulich
2019-07-02 12:09 ` Andrew Cooper
2019-07-02 13:48 ` Jan Beulich
2019-07-16 16:02 ` Jan Beulich
2019-06-27 15:20 ` [Xen-devel] [PATCH v2 03/10] AMD/IOMMU: use bit field for control register Jan Beulich
2019-07-02 12:20 ` Andrew Cooper
2019-06-27 15:20 ` [Xen-devel] [PATCH v2 04/10] AMD/IOMMU: use bit field for IRTE Jan Beulich
2019-07-02 12:33 ` Andrew Cooper
2019-07-02 13:56 ` Jan Beulich
2019-06-27 15:21 ` [Xen-devel] [PATCH v2 05/10] AMD/IOMMU: introduce 128-bit IRTE non-guest-APIC IRTE format Jan Beulich
2019-07-02 14:41 ` Andrew Cooper
2019-07-03 8:46 ` Jan Beulich
2019-07-16 6:39 ` Jan Beulich
2019-06-27 15:21 ` [Xen-devel] [PATCH v2 06/10] AMD/IOMMU: split amd_iommu_init_one() Jan Beulich
2019-06-27 15:22 ` [Xen-devel] [PATCH v2 07/10] AMD/IOMMU: allow enabling with IRQ not yet set up Jan Beulich
2019-06-27 15:22 ` [Xen-devel] [PATCH v2 08/10] AMD/IOMMU: adjust setup of internal interrupt for x2APIC mode Jan Beulich
2019-06-27 15:23 ` [Xen-devel] [PATCH v2 09/10] AMD/IOMMU: enable x2APIC mode when available Jan Beulich
2019-07-02 14:50 ` Andrew Cooper
2019-06-27 15:23 ` [Xen-devel] [PATCH RFC v2 10/10] AMD/IOMMU: correct IRTE updating Jan Beulich
2019-07-02 15:08 ` Andrew Cooper
2019-07-03 8:55 ` Jan Beulich
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