From: Jan Beulich <jbeulich@suse.com>
To: "Roger Pau Monné" <roger.pau@citrix.com>
Cc: George Dunlap <George.Dunlap@eu.citrix.com>,
AndrewCooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Subject: Re: [Xen-devel] [PATCH 4/9] x86/HVM: move NOFLUSH handling out of hvm_set_cr3()
Date: Thu, 12 Sep 2019 13:52:12 +0200 [thread overview]
Message-ID: <7ea0eb1e-1063-b7ef-8cde-6f47f70e41e0@suse.com> (raw)
In-Reply-To: <20190912113542.bxnfmweacwfr3py4@Air-de-Roger>
On 12.09.2019 13:35, Roger Pau Monné wrote:
> On Wed, Sep 11, 2019 at 05:23:20PM +0200, Jan Beulich wrote:
>> The bit is meaningful only for MOV-to-CR3 insns, not anywhere else, in
>> particular not when loading nested guest state.
>
> Can't you use the current vcpu to check if the guest is in nested
> mode, and avoid having to explicitly pass the noflush parameter?
Even if this implication held today (it doesn't according to
the uses in hvmemul_write_cr() and hvm_mov_to_cr()), I don't
think introducing such a dependency would be a good idea.
>> @@ -2282,12 +2287,11 @@ int hvm_set_cr0(unsigned long value, boo
>> return X86EMUL_OKAY;
>> }
>>
>> -int hvm_set_cr3(unsigned long value, bool may_defer)
>> +int hvm_set_cr3(unsigned long value, bool noflush, bool may_defer)
>
> I would rather introduce a flush parameter instead, I think negated
> booleans are harder to parse mentally, and easier to get wrong.
I did actually consider this, but decided against for the
reason of this "no flush" behavior being a later addition to
the effects CR3 writes have, i.e. I'd intentionally like it
to be in line with X86_CR3_NOFLUSH.
Jan
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next prev parent reply other threads:[~2019-09-12 11:52 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-11 15:15 [Xen-devel] [PATCH RESEND/PING 0/9] XSA-292 follow-up Jan Beulich
2019-09-11 15:21 ` [Xen-devel] [PATCH 1/9] x86: adjust cr3_pcid() return type Jan Beulich
2019-09-12 9:19 ` Roger Pau Monné
2019-09-11 15:22 ` [Xen-devel] [PATCH 2/9] x86: limit the amount of TLB flushing in switch_cr3_cr4() Jan Beulich
2019-09-12 9:54 ` Roger Pau Monné
2019-09-12 10:11 ` Jan Beulich
2019-09-12 10:38 ` Roger Pau Monné
2019-09-11 15:22 ` [Xen-devel] [PATCH 3/9] x86/mm: honor opt_pcid also for 32-bit PV domains Jan Beulich
2019-09-12 10:34 ` Roger Pau Monné
2019-09-12 10:45 ` Jan Beulich
2019-09-11 15:23 ` [Xen-devel] [PATCH 4/9] x86/HVM: move NOFLUSH handling out of hvm_set_cr3() Jan Beulich
2019-09-12 11:35 ` Roger Pau Monné
2019-09-12 11:52 ` Jan Beulich [this message]
2019-09-12 14:44 ` Roger Pau Monné
2019-09-12 14:47 ` Jan Beulich
2019-09-12 15:42 ` Roger Pau Monné
2019-09-12 15:52 ` Jan Beulich
2019-09-11 15:24 ` [Xen-devel] [PATCH 5/9] x86/HVM: refuse CR3 loads with reserved (upper) bits set Jan Beulich
2019-09-12 11:45 ` Roger Pau Monné
2019-09-12 12:01 ` Jan Beulich
2019-09-11 15:25 ` [Xen-devel] [PATCH 6/9] x86/HVM: relax shadow mode check in hvm_set_cr3() Jan Beulich
2019-09-12 14:50 ` Roger Pau Monné
2019-09-11 15:25 ` [Xen-devel] [PATCH 7/9] x86/HVM: cosmetics to hvm_set_cr3() Jan Beulich
2019-09-12 15:04 ` Roger Pau Monné
2019-09-11 15:26 ` [Xen-devel] [PATCH 8/9] x86/CPUID: drop INVPCID dependency on PCID Jan Beulich
2019-09-12 15:11 ` Roger Pau Monné
2019-09-11 15:26 ` [Xen-devel] [PATCH 9/9] x86: PCID is unused when !PV Jan Beulich
2019-09-12 15:31 ` Roger Pau Monné
2019-09-12 15:46 ` Jan Beulich
2019-09-12 15:48 ` Jan Beulich
2019-09-12 15:57 ` Roger Pau Monné
-- strict thread matches above, loose matches on Subject: below --
2019-05-02 11:35 [PATCH 0/9] XSA-292 follow-up Jan Beulich
2019-05-02 12:20 ` [PATCH 4/9] x86/HVM: move NOFLUSH handling out of hvm_set_cr3() Jan Beulich
2019-05-02 12:20 ` [Xen-devel] " Jan Beulich
2019-05-02 13:07 ` Paul Durrant
2019-05-02 13:07 ` [Xen-devel] " Paul Durrant
2019-05-02 13:23 ` Jan Beulich
2019-05-02 13:23 ` [Xen-devel] " Jan Beulich
2019-05-02 13:25 ` Paul Durrant
2019-05-02 13:25 ` [Xen-devel] " Paul Durrant
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