* Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
@ 2015-06-24 19:38 Sander Eikelenboom
2015-06-25 8:48 ` Jan Beulich
0 siblings, 1 reply; 23+ messages in thread
From: Sander Eikelenboom @ 2015-06-24 19:38 UTC (permalink / raw)
To: Jan Beulich, andrew.cooper3; +Cc: xen-devel
Hi Jan / Andrew,
I'm having some trouble with a xhci controller passed through with pci-passthrough to one of my HVM guests.
It uses MSI-X for interrupts, a bisection turned up the following commit:
ad28e42bd1d28d746988ed71654e8aa670629753 is the first bad commit
commit ad28e42bd1d28d746988ed71654e8aa670629753
Author: Jan Beulich <jbeulich@suse.com>
Date: Fri Jun 19 10:59:53 2015 +0200
x86/MSI: track host and guest masking separately
In particular we want to avoid losing track of our own intention to
have an entry masked. Physical unmasking now happens only when both
host and guest requested so.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Although from a first glance it looks as if the controller is correctly
initialize during the boot of the HVM guest (no worrying messages in dmesg yet).
It utterly fails a simple "lsusb" this results in the hang pasted below.
Other devices i passthrough which use legacy or MSI interrupts seem to be
unaffected.
Please say so if you need any specific output from Xen debug keys or anything
else !
--
Sander
The lspci from witin the guest (doesn't differ between good or bad):
00:05.0 USB controller [0c03]: NEC Corporation uPD720200 USB 3.0 Host Controller [1033:0194] (rev 03) (prog-if 30 [XHCI])
Subsystem: ASUSTeK Computer Inc. P8P67 Deluxe Motherboard [1043:8413]
Physical Slot: 5
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 36
Region 0: Memory at f3270000 (64-bit, non-prefetchable) [size=8K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [70] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [90] MSI-X: Enable+ Count=8 Masked-
Vector table: BAR=0 offset=00001000
PBA: BAR=0 offset=00001080
Capabilities: [a0] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <4us, L1 unlimited
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR+, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: xhci_hcd
lspci from dom0:
08:00.0 USB controller [0c03]: NEC Corporation uPD720200 USB 3.0 Host Controller [1033:0194] (rev 03) (prog-if 30 [XHCI])
Subsystem: ASUSTeK Computer Inc. P8P67 Deluxe Motherboard [1043:8413]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 37
Region 0: Memory at fe0fe000 (64-bit, non-prefetchable) [size=8K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [70] MSI: Enable- Count=1/8 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [90] MSI-X: Enable+ Count=8 Masked-
Vector table: BAR=0 offset=00001000
PBA: BAR=0 offset=00001080
Capabilities: [a0] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <4us, L1 unlimited
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR+, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 14, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [140 v1] Device Serial Number ff-ff-ff-ff-ff-ff-ff-ff
Capabilities: [150 v1] Latency Tolerance Reporting
Max snoop latency: 0ns
Max no snoop latency: 0ns
Kernel driver in use: pciback
[ 240.783386] INFO: task kworker/3:1:853 blocked for more than 120 seconds.
[ 240.788883] Not tainted 4.1.0-rc7-20150609-security+ #1
[ 240.793566] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
[ 240.805612] kworker/3:1 D ffff88003cdbbb38 0 853 2 0x00000000
[ 240.817493] Workqueue: usb_hub_wq hub_event
[ 240.824566] ffff88003cdbbb38 00000000000040d0 ffff88003dafe8d0 0000000000030010
[ 240.846212] ffff88003cdbc000 7fffffffffffffff ffff88003cedc150 ffff88003dafe8d0
[ 240.861651] ffff88003dafe8d0 ffff88003cdbbb58 ffffffff81af0812 0000000000000002
[ 240.875103] Call Trace:
[ 240.879301] [<ffffffff81af0812>] schedule+0x32/0x80
[ 240.885835] [<ffffffff81af2fb9>] schedule_timeout+0x139/0x190
[ 240.895976] [<ffffffff8176b2cb>] ? usb_alloc_dev+0x2b/0x310
[ 240.905071] [<ffffffff81af11ee>] wait_for_common+0xce/0x1e0
[ 240.929943] [<ffffffff810d3800>] ? wake_up_process+0x50/0x50
[ 240.938833] [<ffffffff81af1318>] wait_for_completion+0x18/0x20
[ 240.946345] [<ffffffff817a064f>] xhci_alloc_dev+0x9f/0x270
[ 240.954751] [<ffffffff8176b309>] usb_alloc_dev+0x69/0x310
[ 240.962074] [<ffffffff81771719>] hub_event+0x7c9/0x12f0
[ 240.968884] [<ffffffff810c538d>] process_one_work+0x13d/0x380
[ 240.978075] [<ffffffff810c563b>] worker_thread+0x6b/0x550
[ 240.985503] [<ffffffff810c55d0>] ? process_one_work+0x380/0x380
[ 240.992991] [<ffffffff810caa66>] kthread+0xd6/0xf0
[ 240.999994] [<ffffffff810ca990>] ? kthread_create_on_node+0x180/0x180
[ 241.008045] [<ffffffff81af44a2>] ret_from_fork+0x42/0x70
[ 241.015867] [<ffffffff810ca990>] ? kthread_create_on_node+0x180/0x180
[ 241.027458] INFO: task udevd:1600 blocked for more than 120 seconds.
[ 241.035950] Not tainted 4.1.0-rc7-20150609-security+ #1
[ 241.043372] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
[ 241.055299] udevd D ffff88003b4ffc38 0 1600 1562 0x00000004
[ 241.066287] ffff88003b4ffc38 ffff88003b4ffc48 ffff88003d328000 ffff88003b4ffc28
[ 241.080800] ffff88003b500000 ffff88003db978f4 ffff88003d328000 00000000ffffffff
[ 241.095124] ffff88003db978f8 ffff88003b4ffc58 ffffffff81af0812 ffff88003db978f0
[ 241.108802] Call Trace:
[ 241.113716] [<ffffffff81af0812>] schedule+0x32/0x80
[ 241.120665] [<ffffffff81af0b19>] schedule_preempt_disabled+0x9/0x10
[ 241.128191] [<ffffffff81af1ed5>] __mutex_lock_slowpath+0x95/0x110
[ 241.137652] [<ffffffff81af1f6e>] mutex_lock+0x1e/0x40
[ 241.144911] [<ffffffff8177ea3f>] product_show+0x1f/0x50
[ 241.153177] [<ffffffff816888fb>] dev_attr_show+0x1b/0x50
[ 241.161507] [<ffffffff81af1f61>] ? mutex_lock+0x11/0x40
[ 241.168354] [<ffffffff8120067b>] sysfs_kf_seq_show+0xbb/0x150
[ 241.180683] [<ffffffff811fef2b>] kernfs_seq_show+0x1b/0x20
[ 241.190340] [<ffffffff811b0c6d>] seq_read+0xcd/0x3b0
[ 241.200103] [<ffffffff811ffa55>] kernfs_fop_read+0x105/0x170
[ 241.209954] [<ffffffff8119e9a5>] ? do_filp_open+0x35/0xb0
[ 241.220031] [<ffffffff8118e5c3>] __vfs_read+0x23/0xd0
[ 241.230325] [<ffffffff811ab008>] ? __fd_install+0x48/0x60
[ 241.238748] [<ffffffff8118edc5>] vfs_read+0x85/0x140
[ 241.245479] [<ffffffff8118fb65>] SyS_read+0x45/0xc0
[ 241.253530] [<ffffffff81af40ae>] system_call_fastpath+0x12/0x71
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-24 19:38 Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately Sander Eikelenboom
@ 2015-06-25 8:48 ` Jan Beulich
2015-06-25 10:51 ` Sander Eikelenboom
0 siblings, 1 reply; 23+ messages in thread
From: Jan Beulich @ 2015-06-25 8:48 UTC (permalink / raw)
To: Sander Eikelenboom; +Cc: andrew.cooper3, xen-devel
>>> On 24.06.15 at 21:38, <linux@eikelenboom.it> wrote:
> I'm having some trouble with a xhci controller passed through with
> pci-passthrough to one of my HVM guests.
> It uses MSI-X for interrupts, a bisection turned up the following commit:
>
> x86/MSI: track host and guest masking separately
>
> Although from a first glance it looks as if the controller is correctly
> initialize during the boot of the HVM guest (no worrying messages in dmesg
> yet).
> It utterly fails a simple "lsusb" this results in the hang pasted below.
>
> Other devices i passthrough which use legacy or MSI interrupts seem to be
> unaffected.
Odd enough, since I'm having a hard time testing MSI (no suitable
devices), but did a lot of testing with MSI-X.
> Please say so if you need any specific output from Xen debug keys or
> anything
> else !
M and i debug key output would be the first thing. I'd suspect host
masking to be wrongly active for some reason.
Jan
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-25 8:48 ` Jan Beulich
@ 2015-06-25 10:51 ` Sander Eikelenboom
2015-06-25 11:29 ` Jan Beulich
0 siblings, 1 reply; 23+ messages in thread
From: Sander Eikelenboom @ 2015-06-25 10:51 UTC (permalink / raw)
To: Jan Beulich; +Cc: andrew.cooper3, xen-devel
[-- Attachment #1: Type: text/plain, Size: 1255 bytes --]
Thursday, June 25, 2015, 10:48:40 AM, you wrote:
>>>> On 24.06.15 at 21:38, <linux@eikelenboom.it> wrote:
>> I'm having some trouble with a xhci controller passed through with
>> pci-passthrough to one of my HVM guests.
>> It uses MSI-X for interrupts, a bisection turned up the following commit:
>>
>> x86/MSI: track host and guest masking separately
>>
>> Although from a first glance it looks as if the controller is correctly
>> initialize during the boot of the HVM guest (no worrying messages in dmesg
>> yet).
>> It utterly fails a simple "lsusb" this results in the hang pasted below.
>>
>> Other devices i passthrough which use legacy or MSI interrupts seem to be
>> unaffected.
> Odd enough, since I'm having a hard time testing MSI (no suitable
> devices), but did a lot of testing with MSI-X.
>> Please say so if you need any specific output from Xen debug keys or
>> anything
>> else !
> M and i debug key output would be the first thing. I'd suspect host
> masking to be wrongly active for some reason.
> Jan
Hi Jan,
Attached is the xl-dmesg output of:
- debug-keys M and i before guest boot
- guest boot
- debug-keys M and i after lsusb in the guest that hangs.
The not working controller is 0000:08:00.0.
--
Sander
[-- Attachment #2: xl-dmesg.txt --]
[-- Type: text/plain, Size: 65536 bytes --]
77] traps.c:2655:d0v1 Domain attempted WRMSR 00000000c0000084 from 0x0000000000074700 to 0x0000000000047700.
(XEN) [2015-06-25 10:38:46.277] traps.c:2655:d0v2 Domain attempted WRMSR 00000000c0000081 from 0xe023e00800000000 to 0x0023001000000000.
(XEN) [2015-06-25 10:38:46.277] traps.c:2655:d0v2 Domain attempted WRMSR 00000000c0000082 from 0xffff82d0bfffd100 to 0xffffffff81b2f010.
(XEN) [2015-06-25 10:38:46.277] traps.c:2655:d0v2 Domain attempted WRMSR 00000000c0000083 from 0xffff82d0bfffd120 to 0xffffffff81b30f10.
(XEN) [2015-06-25 10:38:46.277] traps.c:2655:d0v2 Domain attempted WRMSR 0000000000000174 from 0x0000000000000000 to 0x0000000000000010.
(XEN) [2015-06-25 10:38:46.277] traps.c:2655:d0v2 Domain attempted WRMSR 0000000000000176 from 0x0000000000000000 to 0xffffffff81b30dc0.
(XEN) [2015-06-25 10:38:46.277] traps.c:2655:d0v2 Domain attempted WRMSR 00000000c0000084 from 0x0000000000074700 to 0x0000000000047700.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v3 Domain attempted WRMSR 00000000c0000081 from 0xe023e00800000000 to 0x0023001000000000.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v3 Domain attempted WRMSR 00000000c0000082 from 0xffff82d0bfffc180 to 0xffffffff81b2f010.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v3 Domain attempted WRMSR 00000000c0000083 from 0xffff82d0bfffc1a0 to 0xffffffff81b30f10.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v3 Domain attempted WRMSR 0000000000000174 from 0x0000000000000000 to 0x0000000000000010.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v3 Domain attempted WRMSR 0000000000000176 from 0x0000000000000000 to 0xffffffff81b30dc0.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v3 Domain attempted WRMSR 00000000c0000084 from 0x0000000000074700 to 0x0000000000047700.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v4 Domain attempted WRMSR 00000000c0000081 from 0xe023e00800000000 to 0x0023001000000000.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v4 Domain attempted WRMSR 00000000c0000082 from 0xffff82d0bfffb200 to 0xffffffff81b2f010.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v4 Domain attempted WRMSR 00000000c0000083 from 0xffff82d0bfffb220 to 0xffffffff81b30f10.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v4 Domain attempted WRMSR 0000000000000174 from 0x0000000000000000 to 0x0000000000000010.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v4 Domain attempted WRMSR 0000000000000176 from 0x0000000000000000 to 0xffffffff81b30dc0.
(XEN) [2015-06-25 10:38:46.278] traps.c:2655:d0v4 Domain attempted WRMSR 00000000c0000084 from 0x0000000000074700 to 0x0000000000047700.
(XEN) [2015-06-25 10:38:46.279] traps.c:2655:d0v5 Domain attempted WRMSR 00000000c0000081 from 0xe023e00800000000 to 0x0023001000000000.
(XEN) [2015-06-25 10:38:46.279] traps.c:2655:d0v5 Domain attempted WRMSR 00000000c0000082 from 0xffff82d0bfffa280 to 0xffffffff81b2f010.
(XEN) [2015-06-25 10:38:46.279] traps.c:2655:d0v5 Domain attempted WRMSR 00000000c0000083 from 0xffff82d0bfffa2a0 to 0xffffffff81b30f10.
(XEN) [2015-06-25 10:38:46.279] traps.c:2655:d0v5 Domain attempted WRMSR 0000000000000174 from 0x0000000000000000 to 0x0000000000000010.
(XEN) [2015-06-25 10:38:46.279] traps.c:2655:d0v5 Domain attempted WRMSR 0000000000000176 from 0x0000000000000000 to 0xffffffff81b30dc0.
(XEN) [2015-06-25 10:38:46.279] traps.c:2655:d0v5 Domain attempted WRMSR 00000000c0000084 from 0x0000000000074700 to 0x0000000000047700.
(XEN) [2015-06-25 10:38:46.739] PCI add device 0000:00:00.0
(XEN) [2015-06-25 10:38:46.740] PCI add device 0000:00:00.2
(XEN) [2015-06-25 10:38:46.740] PCI add device 0000:00:02.0
(XEN) [2015-06-25 10:38:46.740] PCI add device 0000:00:03.0
(XEN) [2015-06-25 10:38:46.740] PCI add device 0000:00:05.0
(XEN) [2015-06-25 10:38:46.740] PCI add device 0000:00:06.0
(XEN) [2015-06-25 10:38:46.740] PCI add device 0000:00:09.0
(XEN) [2015-06-25 10:38:46.741] PCI add device 0000:00:0a.0
(XEN) [2015-06-25 10:38:46.741] PCI add device 0000:00:0b.0
(XEN) [2015-06-25 10:38:46.741] PCI add device 0000:00:0c.0
(XEN) [2015-06-25 10:38:46.741] PCI add device 0000:00:0d.0
(XEN) [2015-06-25 10:38:46.741] PCI add device 0000:00:11.0
(XEN) [2015-06-25 10:38:46.742] PCI add device 0000:00:12.0
(XEN) [2015-06-25 10:38:46.742] PCI add device 0000:00:12.2
(XEN) [2015-06-25 10:38:46.742] PCI add device 0000:00:13.0
(XEN) [2015-06-25 10:38:46.742] PCI add device 0000:00:13.2
(XEN) [2015-06-25 10:38:46.743] PCI add device 0000:00:14.0
(XEN) [2015-06-25 10:38:46.743] PCI add device 0000:00:14.3
(XEN) [2015-06-25 10:38:46.743] PCI add device 0000:00:14.4
(XEN) [2015-06-25 10:38:46.743] PCI add device 0000:00:14.5
(XEN) [2015-06-25 10:38:46.743] PCI add device 0000:00:15.0
(XEN) [2015-06-25 10:38:46.743] PCI add device 0000:00:16.0
(XEN) [2015-06-25 10:38:46.744] PCI add device 0000:00:16.2
(XEN) [2015-06-25 10:38:46.744] PCI add device 0000:00:18.0
(XEN) [2015-06-25 10:38:46.744] PCI add device 0000:00:18.1
(XEN) [2015-06-25 10:38:46.744] PCI add device 0000:00:18.2
(XEN) [2015-06-25 10:38:46.744] PCI add device 0000:00:18.3
(XEN) [2015-06-25 10:38:46.744] PCI add device 0000:00:18.4
(XEN) [2015-06-25 10:38:46.745] PCI add device 0000:0f:00.0
(XEN) [2015-06-25 10:38:46.745] PCI add device 0000:0f:00.1
(XEN) [2015-06-25 10:38:46.752] PCI add device 0000:0e:00.0
(XEN) [2015-06-25 10:38:46.752] PCI add device 0000:0e:00.1
(XEN) [2015-06-25 10:38:46.759] PCI add device 0000:0d:00.0
(XEN) [2015-06-25 10:38:46.766] PCI add device 0000:0c:00.0
(XEN) [2015-06-25 10:38:46.772] PCI add device 0000:0b:00.0
(XEN) [2015-06-25 10:38:46.779] PCI add device 0000:0a:00.0
(XEN) [2015-06-25 10:38:46.786] PCI add device 0000:09:00.0
(XEN) [2015-06-25 10:38:46.786] PCI add device 0000:09:00.1
(XEN) [2015-06-25 10:38:46.793] PCI add device 0000:05:00.0
(XEN) [2015-06-25 10:38:46.799] PCI add device 0000:06:01.0
(XEN) [2015-06-25 10:38:46.800] PCI add device 0000:06:02.0
(XEN) [2015-06-25 10:38:46.800] PCI add device 0000:08:00.0
(XEN) [2015-06-25 10:38:46.806] PCI add device 0000:07:00.0
(XEN) [2015-06-25 10:38:46.813] PCI add device 0000:04:00.0
(XEN) [2015-06-25 10:38:46.820] PCI add device 0000:03:06.0
(XEN) [2015-06-25 10:38:46.834] PCI: Using MCFG for segment 0000 bus 00-ff
(XEN) [2015-06-25 10:38:47.172] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-25 10:38:47.172] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-25 10:38:47.172] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-25 10:38:47.172] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-25 10:38:47.172] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-25 10:38:47.172] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-25 10:38:51.509] mm.c:798: d0: Forcing read-only access to MFN fed00
(XEN) [2015-06-25 10:38:53.221] d0 attempted to change d0v2's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-25 10:38:52.865] d0 attempted to change d0v1's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-25 10:38:52.875] d0 attempted to change d0v3's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-25 10:38:52.888] d0 attempted to change d0v4's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-25 10:38:52.895] d0 attempted to change d0v5's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-25 10:38:52.898] d0 attempted to change d0v0's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-25 10:43:32.432] MSI information:
(XEN) [2015-06-25 10:43:32.433] MSI 56 vec=28 lowest edge assert log lowest dest=00000001 mask=0/ /?
(XEN) [2015-06-25 10:43:32.433] HPET 57 vec=a0 lowest edge assert log lowest dest=00000002 mask=1/ /?
(XEN) [2015-06-25 10:43:32.433] HPET 58 vec=a8 lowest edge assert log lowest dest=00000002 mask=1/ /?
(XEN) [2015-06-25 10:43:32.433] HPET 59 vec=b0 lowest edge assert log lowest dest=00000001 mask=1/ /?
(XEN) [2015-06-25 10:43:32.433] MSI 60 vec=41 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 61 vec=49 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 62 vec=51 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 63 vec=59 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 64 vec=61 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 65 vec=69 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 66 vec=71 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 67 vec=79 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 68 vec=81 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 69 vec=91 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 70 vec=99 lowest edge assert log lowest dest=0000003f mask=1/H /1
(XEN) [2015-06-25 10:43:32.433] MSI 71 vec=a1 lowest edge assert log lowest dest=0000003f mask=1/H /1
(XEN) [2015-06-25 10:43:32.433] MSI 72 vec=b1 lowest edge assert log lowest dest=0000003f mask=1/H /1
(XEN) [2015-06-25 10:43:32.433] MSI 73 vec=32 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 74 vec=3a lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 75 vec=42 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 76 vec=4a lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 77 vec=52 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 78 vec=5a lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 79 vec=62 lowest edge assert log lowest dest=0000003f mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 80 vec=6a lowest edge assert log lowest dest=0000003f mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 81 vec=7a lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 82 vec=92 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:32.433] MSI 83 vec=a2 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:43:37.429] IRQ information:
(XEN) [2015-06-25 10:43:37.429] IRQ: 0 affinity:01 vec:f0 type=IO-APIC-edge status=00000000 timer_interrupt()
(XEN) [2015-06-25 10:43:37.429] IRQ: 1 affinity:01 vec:30 type=IO-APIC-edge status=00000034 in-flight=0 domain-list=0: 1(---),
(XEN) [2015-06-25 10:43:37.429] IRQ: 3 affinity:01 vec:38 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 4 affinity:01 vec:f1 type=IO-APIC-edge status=00000000 ns16550_interrupt()
(XEN) [2015-06-25 10:43:37.429] IRQ: 5 affinity:01 vec:40 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 6 affinity:01 vec:48 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 7 affinity:01 vec:50 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 8 affinity:01 vec:58 type=IO-APIC-edge status=00000030 in-flight=0 domain-list=0: 8(---),
(XEN) [2015-06-25 10:43:37.429] IRQ: 9 affinity:01 vec:60 type=IO-APIC-level status=00000030 in-flight=0 domain-list=0: 9(---),
(XEN) [2015-06-25 10:43:37.429] IRQ: 10 affinity:01 vec:68 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 11 affinity:01 vec:70 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 12 affinity:01 vec:78 type=IO-APIC-edge status=00000030 in-flight=0 domain-list=0: 12(---),
(XEN) [2015-06-25 10:43:37.429] IRQ: 13 affinity:3f vec:88 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 14 affinity:01 vec:90 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 15 affinity:01 vec:98 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 16 affinity:3f vec:89 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 17 affinity:01 vec:c0 type=IO-APIC-level status=00000030 in-flight=0 domain-list=0: 17(---),
(XEN) [2015-06-25 10:43:37.429] IRQ: 18 affinity:01 vec:b8 type=IO-APIC-level status=00000030 in-flight=0 domain-list=0: 18(---),
(XEN) [2015-06-25 10:43:37.429] IRQ: 19 affinity:3f vec:2a type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 22 affinity:3f vec:b9 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 25 affinity:3f vec:9a type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 28 affinity:3f vec:22 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 29 affinity:3f vec:d9 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.429] IRQ: 32 affinity:3f vec:c9 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 33 affinity:3f vec:c1 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 36 affinity:3f vec:21 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 37 affinity:3f vec:29 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 38 affinity:3f vec:a9 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 40 affinity:3f vec:31 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 46 affinity:3f vec:72 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 47 affinity:3f vec:d1 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 48 affinity:3f vec:d0 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 51 affinity:3f vec:8a type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 52 affinity:3f vec:39 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 53 affinity:3f vec:c8 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 54 affinity:3f vec:d8 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 56 affinity:01 vec:28 type=AMD-IOMMU-MSI status=00000000 iommu_interrupt_handler()
(XEN) [2015-06-25 10:43:37.430] IRQ: 57 affinity:02 vec:a0 type=HPET-MSI status=00000000 hpet_interrupt_handler()
(XEN) [2015-06-25 10:43:37.430] IRQ: 58 affinity:02 vec:a8 type=HPET-MSI status=00000000 hpet_interrupt_handler()
(XEN) [2015-06-25 10:43:37.430] IRQ: 59 affinity:01 vec:b0 type=HPET-MSI status=00000000 hpet_interrupt_handler()
(XEN) [2015-06-25 10:43:37.430] IRQ: 60 affinity:01 vec:41 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:631(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 61 affinity:01 vec:49 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:630(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 62 affinity:01 vec:51 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:629(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 63 affinity:01 vec:59 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:628(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 64 affinity:01 vec:61 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:627(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 65 affinity:01 vec:69 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:626(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 66 affinity:01 vec:71 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:625(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 67 affinity:01 vec:79 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:624(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 68 affinity:01 vec:81 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:623(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 69 affinity:01 vec:91 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:622(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 70 affinity:3f vec:99 type=PCI-MSI/-X status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 71 affinity:3f vec:a1 type=PCI-MSI/-X status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 72 affinity:3f vec:b1 type=PCI-MSI/-X status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 73 affinity:01 vec:32 type=PCI-MSI status=00000010 in-flight=0 domain-list=0:611(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 74 affinity:01 vec:3a type=PCI-MSI status=00000030 in-flight=0 domain-list=0:612(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 75 affinity:01 vec:42 type=PCI-MSI status=00000010 in-flight=0 domain-list=0:613(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 76 affinity:01 vec:4a type=PCI-MSI status=00000030 in-flight=0 domain-list=0:614(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 77 affinity:01 vec:52 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:615(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 78 affinity:01 vec:5a type=PCI-MSI status=00000030 in-flight=0 domain-list=0:616(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 79 affinity:3f vec:62 type=PCI-MSI status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 80 affinity:3f vec:6a type=PCI-MSI status=00000002 mapped, unbound
(XEN) [2015-06-25 10:43:37.430] IRQ: 81 affinity:01 vec:7a type=PCI-MSI status=00000010 in-flight=0 domain-list=0:610(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 82 affinity:01 vec:92 type=PCI-MSI status=00000010 in-flight=0 domain-list=0:609(---),
(XEN) [2015-06-25 10:43:37.430] IRQ: 83 affinity:01 vec:a2 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:608(---),
(XEN) [2015-06-25 10:43:37.430] Direct vector information:
(XEN) [2015-06-25 10:43:37.430] 0x20 -> irq_move_cleanup_interrupt()
(XEN) [2015-06-25 10:43:37.430] 0xf9 -> pmu_apic_interrupt()
(XEN) [2015-06-25 10:43:37.430] 0xfa -> apic_timer_interrupt()
(XEN) [2015-06-25 10:43:37.430] 0xfb -> call_function_interrupt()
(XEN) [2015-06-25 10:43:37.430] 0xfc -> event_check_interrupt()
(XEN) [2015-06-25 10:43:37.430] 0xfd -> invalidate_interrupt()
(XEN) [2015-06-25 10:43:37.430] 0xfe -> error_interrupt()
(XEN) [2015-06-25 10:43:37.430] 0xff -> spurious_interrupt()
(XEN) [2015-06-25 10:43:37.430] IO-APIC interrupt information:
(XEN) [2015-06-25 10:43:37.430] IRQ 0 Vec240:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 2: vec=f0 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 1 Vec 48:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 1: vec=30 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 3 Vec 56:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 3: vec=38 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 4 Vec241:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 4: vec=f1 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 5 Vec 64:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 5: vec=40 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 6 Vec 72:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 6: vec=48 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 7 Vec 80:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 7: vec=50 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 8 Vec 88:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 8: vec=58 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 9 Vec 96:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 9: vec=60 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 10 Vec104:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 10: vec=68 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 11 Vec112:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 11: vec=70 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 12 Vec120:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 12: vec=78 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.430] IRQ 13 Vec136:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 13: vec=88 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.430] IRQ 14 Vec144:
(XEN) [2015-06-25 10:43:37.430] Apic 0x00, Pin 14: vec=90 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.431] IRQ 15 Vec152:
(XEN) [2015-06-25 10:43:37.431] Apic 0x00, Pin 15: vec=98 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.431] IRQ 16 Vec137:
(XEN) [2015-06-25 10:43:37.431] Apic 0x00, Pin 16: vec=89 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 17 Vec192:
(XEN) [2015-06-25 10:43:37.431] Apic 0x00, Pin 17: vec=c0 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.431] IRQ 18 Vec184:
(XEN) [2015-06-25 10:43:37.431] Apic 0x00, Pin 18: vec=b8 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=0 dest_id:1
(XEN) [2015-06-25 10:43:37.431] IRQ 19 Vec 42:
(XEN) [2015-06-25 10:43:37.431] Apic 0x00, Pin 19: vec=2a delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 22 Vec185:
(XEN) [2015-06-25 10:43:37.431] Apic 0x00, Pin 22: vec=b9 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 25 Vec154:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 1: vec=9a delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 28 Vec 34:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 4: vec=22 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 29 Vec217:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 5: vec=d9 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 32 Vec201:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 8: vec=c9 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 33 Vec193:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 9: vec=c1 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 36 Vec 33:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 12: vec=21 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 37 Vec 41:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 13: vec=29 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 38 Vec169:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 14: vec=a9 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 40 Vec 49:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 16: vec=31 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 46 Vec114:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 22: vec=72 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 47 Vec209:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 23: vec=d1 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 48 Vec208:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 24: vec=d0 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 51 Vec138:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 27: vec=8a delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 52 Vec 57:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 28: vec=39 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 53 Vec200:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 29: vec=c8 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:37.431] IRQ 54 Vec216:
(XEN) [2015-06-25 10:43:37.431] Apic 0x01, Pin 30: vec=d8 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:43:53.908] io.c:429: d1: bind: m_gsi=37 g_gsi=36 dev=00.00.5 intx=0
(XEN) [2015-06-25 10:43:54.291] AMD-Vi: Disable: device id = 0x800, domain = 0, paging mode = 3
(XEN) [2015-06-25 10:43:54.291] AMD-Vi: Setup I/O page table: device id = 0x800, type = 0x1, root table = 0x4b514a000, domain = 1, paging mode = 3
(XEN) [2015-06-25 10:43:54.291] AMD-Vi: Re-assign 0000:08:00.0 from dom0 to dom1
(XEN) [2015-06-25 10:43:56.332] io.c:429: d1: bind: m_gsi=47 g_gsi=40 dev=00.00.6 intx=0
(XEN) [2015-06-25 10:43:56.346] AMD-Vi: Disable: device id = 0xa00, domain = 0, paging mode = 3
(XEN) [2015-06-25 10:43:56.346] AMD-Vi: Setup I/O page table: device id = 0xa00, type = 0x1, root table = 0x4b514a000, domain = 1, paging mode = 3
(XEN) [2015-06-25 10:43:56.346] AMD-Vi: Re-assign 0000:0a:00.0 from dom0 to dom1
(d1) [2015-06-25 10:43:56.390] HVM Loader
(d1) [2015-06-25 10:43:56.390] Detected Xen v4.6-unstable
(d1) [2015-06-25 10:43:56.390] Xenbus rings @0xfeffc000, event channel 1
(d1) [2015-06-25 10:43:56.391] System requested SeaBIOS
(d1) [2015-06-25 10:43:56.391] CPU speed is 3200 MHz
(d1) [2015-06-25 10:43:56.391] Relocating guest memory for lowmem MMIO space disabled
(XEN) [2015-06-25 10:43:56.391] irq.c:276: Dom1 PCI link 0 changed 0 -> 5
(d1) [2015-06-25 10:43:56.391] PCI-ISA link 0 routed to IRQ5
(XEN) [2015-06-25 10:43:56.391] irq.c:276: Dom1 PCI link 1 changed 0 -> 10
(d1) [2015-06-25 10:43:56.391] PCI-ISA link 1 routed to IRQ10
(XEN) [2015-06-25 10:43:56.391] irq.c:276: Dom1 PCI link 2 changed 0 -> 11
(d1) [2015-06-25 10:43:56.391] PCI-ISA link 2 routed to IRQ11
(XEN) [2015-06-25 10:43:56.391] irq.c:276: Dom1 PCI link 3 changed 0 -> 5
(d1) [2015-06-25 10:43:56.391] PCI-ISA link 3 routed to IRQ5
(d1) [2015-06-25 10:43:56.401] pci dev 01:3 INTA->IRQ10
(d1) [2015-06-25 10:43:56.404] pci dev 02:0 INTA->IRQ11
(d1) [2015-06-25 10:43:56.409] pci dev 04:0 INTA->IRQ5
(d1) [2015-06-25 10:43:56.412] pci dev 05:0 INTA->IRQ10
(d1) [2015-06-25 10:43:56.415] pci dev 06:0 INTA->IRQ11
(d1) [2015-06-25 10:43:56.427] No RAM in high memory; setting high_mem resource base to 100000000
(d1) [2015-06-25 10:43:56.427] pci dev 03:0 bar 10 size 002000000: 0f0000008
(d1) [2015-06-25 10:43:56.429] pci dev 02:0 bar 14 size 001000000: 0f2000008
(d1) [2015-06-25 10:43:56.430] pci dev 06:0 bar 10 size 000200000: 0f3000004
(XEN) [2015-06-25 10:43:56.430] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:43:56.433] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:43:56.435] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:43:56.437] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:43:56.439] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:43:56.441] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:43:56.443] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:43:56.445] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(d1) [2015-06-25 10:43:56.449] pci dev 04:0 bar 30 size 000040000: 0f3200000
(d1) [2015-06-25 10:43:56.451] pci dev 04:0 bar 10 size 000020000: 0f3240000
(d1) [2015-06-25 10:43:56.451] pci dev 03:0 bar 30 size 000010000: 0f3260000
(d1) [2015-06-25 10:43:56.451] pci dev 05:0 bar 10 size 000002000: 0f3270004
(XEN) [2015-06-25 10:43:56.451] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(d1) [2015-06-25 10:43:56.457] pci dev 03:0 bar 14 size 000001000: 0f3272000
(d1) [2015-06-25 10:43:56.457] pci dev 02:0 bar 10 size 000000100: 00000c001
(d1) [2015-06-25 10:43:56.459] pci dev 04:0 bar 14 size 000000040: 00000c101
(d1) [2015-06-25 10:43:56.461] pci dev 01:1 bar 20 size 000000010: 00000c141
(d1) [2015-06-25 10:43:56.463] Multiprocessor initialisation:
(d1) [2015-06-25 10:43:56.487] - CPU0 ... 48-bit phys ... fixed MTRRs ... var MTRRs [1/8] ... done.
(d1) [2015-06-25 10:43:56.513] - CPU1 ... 48-bit phys ... fixed MTRRs ... var MTRRs [1/8] ... done.
(d1) [2015-06-25 10:43:56.538] - CPU2 ... 48-bit phys ... fixed MTRRs ... var MTRRs [1/8] ... done.
(d1) [2015-06-25 10:43:56.563] - CPU3 ... 48-bit phys ... fixed MTRRs ... var MTRRs [1/8] ... done.
(d1) [2015-06-25 10:43:56.563] Testing HVM environment:
(d1) [2015-06-25 10:43:56.579] - REP INSB across page boundaries ... passed
(d1) [2015-06-25 10:43:56.591] - GS base MSRs and SWAPGS ... passed
(d1) [2015-06-25 10:43:56.591] Passed 2 of 2 tests
(d1) [2015-06-25 10:43:56.591] Writing SMBIOS tables ...
(d1) [2015-06-25 10:43:56.592] Loading SeaBIOS ...
(d1) [2015-06-25 10:43:56.592] Creating MP tables ...
(d1) [2015-06-25 10:43:56.592] Loading ACPI ...
(d1) [2015-06-25 10:43:56.593] vm86 TSS at fc00a200
(d1) [2015-06-25 10:43:56.593] BIOS map:
(d1) [2015-06-25 10:43:56.593] 10000-100d3: Scratch space
(d1) [2015-06-25 10:43:56.593] c0000-fffff: Main BIOS
(d1) [2015-06-25 10:43:56.593] E820 table:
(d1) [2015-06-25 10:43:56.593] [00]: 00000000:00000000 - 00000000:000a0000: RAM
(d1) [2015-06-25 10:43:56.593] HOLE: 00000000:000a0000 - 00000000:000c0000
(d1) [2015-06-25 10:43:56.593] [01]: 00000000:000c0000 - 00000000:00100000: RESERVED
(d1) [2015-06-25 10:43:56.593] [02]: 00000000:00100000 - 00000000:3f800000: RAM
(d1) [2015-06-25 10:43:56.593] HOLE: 00000000:3f800000 - 00000000:fc000000
(d1) [2015-06-25 10:43:56.593] [03]: 00000000:fc000000 - 00000001:00000000: RESERVED
(d1) [2015-06-25 10:43:56.593] Invoking SeaBIOS ...
(d1) [2015-06-25 10:43:56.595] SeaBIOS (version rel-1.8.0-0-g4c59f5d-20150625_114556-serveerstertje)
(d1) [2015-06-25 10:43:56.595]
(d1) [2015-06-25 10:43:56.595] Found Xen hypervisor signature at 40000000
(d1) [2015-06-25 10:43:56.595] Running on QEMU (i440fx)
(d1) [2015-06-25 10:43:56.595] xen: copy e820...
(d1) [2015-06-25 10:43:56.595] Relocating init from 0x000df4c0 to 0x3f7af5a0 (size 68000)
(d1) [2015-06-25 10:43:56.597] CPU Mhz=3201
(d1) [2015-06-25 10:43:56.599] Found 9 PCI devices (max PCI bus is 00)
(d1) [2015-06-25 10:43:56.599] Allocated Xen hypercall page at 3f7ff000
(d1) [2015-06-25 10:43:56.599] Detected Xen v4.6-unstable
(d1) [2015-06-25 10:43:56.599] xen: copy BIOS tables...
(d1) [2015-06-25 10:43:56.599] Copying SMBIOS entry point from 0x00010010 to 0x000f66f0
(d1) [2015-06-25 10:43:56.599] Copying MPTABLE from 0xfc0011b0/fc0011c0 to 0x000f65d0
(d1) [2015-06-25 10:43:56.599] Copying PIR from 0x00010030 to 0x000f6550
(d1) [2015-06-25 10:43:56.599] Copying ACPI RSDP from 0x000100b0 to 0x000f6520
(d1) [2015-06-25 10:43:56.599] Using pmtimer, ioport 0xb008
(d1) [2015-06-25 10:43:56.599] Scan for VGA option rom
(d1) [2015-06-25 10:43:56.610] Running option rom at c000:0003
(XEN) [2015-06-25 10:43:56.614] stdvga.c:147:d1v0 entering stdvga and caching modes
(d1) [2015-06-25 10:43:56.635] pmm call arg1=0
(d1) [2015-06-25 10:43:56.636] Turning on vga text mode console
(d1) [2015-06-25 10:43:56.677] SeaBIOS (version rel-1.8.0-0-g4c59f5d-20150625_114556-serveerstertje)
(d1) [2015-06-25 10:43:56.683] Machine UUID 3862b2dc-7336-479e-8391-9efb14ef4a6b
(d1) [2015-06-25 10:43:56.683] XHCI init on dev 00:05.0: regs @ 0xf3270000, 4 ports, 32 slots, 32 byte context
(d1) [2015-06-25 10:43:56.683] s
(d1) [2015-06-25 10:43:56.683] XHCI extcap 0x1 @ f3270500
(d1) [2015-06-25 10:43:56.683] XHCI protocol USB 3.00, 2 ports (offset 1), def 0
(d1) [2015-06-25 10:43:56.683] XHCI protocol USB 2.00, 2 ports (offset 3), def 0
(d1) [2015-06-25 10:43:56.684] Found 0 lpt ports
(d1) [2015-06-25 10:43:56.684] Found 1 serial ports
(d1) [2015-06-25 10:43:56.684] ATA controller 1 at 1f0/3f4/0 (irq 14 dev 9)
(d1) [2015-06-25 10:43:56.685] ATA controller 2 at 170/374/0 (irq 15 dev 9)
(d1) [2015-06-25 10:43:56.687] ata0-0: QEMU HARDDISK ATA-7 Hard-Disk (10240 MiBytes)
(d1) [2015-06-25 10:43:56.688] Searching bootorder for: /pci@i0cf8/*@1,1/drive@0/disk@0
(d1) [2015-06-25 10:43:56.688] ata0-1: QEMU HARDDISK ATA-7 Hard-Disk (300 GiBytes)
(d1) [2015-06-25 10:43:56.688] Searching bootorder for: /pci@i0cf8/*@1,1/drive@0/disk@1
(d1) [2015-06-25 10:43:56.786] PS2 keyboard initialized
(d1) [2015-06-25 10:43:56.810] XHCI port #4: 0x00200a03, powered, enabled, pls 0, speed 2 [Low]
(d1) [2015-06-25 10:43:56.840] XHCI no devices found
(d1) [2015-06-25 10:43:56.846] All threads complete.
(d1) [2015-06-25 10:43:56.846] Scan for option roms
(d1) [2015-06-25 10:43:56.862] Running option rom at c980:0003
(d1) [2015-06-25 10:43:56.865] pmm call arg1=1
(d1) [2015-06-25 10:43:56.865] pmm call arg1=0
(d1) [2015-06-25 10:43:56.866] pmm call arg1=1
(d1) [2015-06-25 10:43:56.866] pmm call arg1=0
(d1) [2015-06-25 10:43:56.874] Searching bootorder for: /pci@i0cf8/*@4
(d1) [2015-06-25 10:43:56.874]
(d1) [2015-06-25 10:43:56.877] Press F12 for boot menu.
(d1) [2015-06-25 10:43:56.878]
(d1) [2015-06-25 10:43:59.437] Searching bootorder for: HALT
(d1) [2015-06-25 10:43:59.437] drive 0x000f64d0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=20971520
(d1) [2015-06-25 10:43:59.438] drive 0x000f64a0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=629145600
(d1) [2015-06-25 10:43:59.438]
(d1) [2015-06-25 10:43:59.438] Space available for UMB: ca800-ef000, f5f10-f64a0
(d1) [2015-06-25 10:43:59.438] Returned 253952 bytes of ZoneHigh
(d1) [2015-06-25 10:43:59.438] e820 map has 6 items:
(d1) [2015-06-25 10:43:59.438] 0: 0000000000000000 - 000000000009fc00 = 1 RAM
(d1) [2015-06-25 10:43:59.439] 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
(d1) [2015-06-25 10:43:59.439] 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
(d1) [2015-06-25 10:43:59.439] 3: 0000000000100000 - 000000003f7fe000 = 1 RAM
(d1) [2015-06-25 10:43:59.439] 4: 000000003f7fe000 - 000000003f800000 = 2 RESERVED
(d1) [2015-06-25 10:43:59.439] 5: 00000000fc000000 - 0000000100000000 = 2 RESERVED
(d1) [2015-06-25 10:43:59.443] enter handle_19:
(d1) [2015-06-25 10:43:59.443] NULL
(d1) [2015-06-25 10:43:59.456] Booting from Hard Disk...
(d1) [2015-06-25 10:43:59.459] Booting from 0000:7c00
(XEN) [2015-06-25 10:44:01.925] stdvga.c:151:d1v0 leaving stdvga
(XEN) [2015-06-25 10:44:23.635] stdvga.c:147:d1v0 entering stdvga and caching modes
(XEN) [2015-06-25 10:44:24.094] irq.c:386: Dom1 callback via changed to Direct Vector 0xf3
(XEN) [2015-06-25 10:44:25.995] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:25.999] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:26.003] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:26.007] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:26.011] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:26.015] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:26.018] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:26.022] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:26.026] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:26.030] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:26.034] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:26.038] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-25 10:44:26.045] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.047] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.049] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.051] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.054] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.056] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.058] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.060] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.064] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.067] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.069] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.071] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.073] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.075] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.077] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.079] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.083] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.085] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.088] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.090] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.092] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.094] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.096] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.098] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.103] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.105] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.107] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.109] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.111] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.113] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.115] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.118] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.122] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.124] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.126] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.128] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.130] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.132] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.134] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.137] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.141] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.143] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.145] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.147] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.149] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.152] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.154] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.156] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.160] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.162] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.164] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.166] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.168] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.171] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.173] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.175] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.179] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.181] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.183] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.186] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.188] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.190] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.192] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.194] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.198] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.200] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.202] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.205] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.207] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.209] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.211] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.213] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.217] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.220] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.222] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.224] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.226] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.228] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.230] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.232] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.236] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.239] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.241] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.243] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.245] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.247] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.249] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.251] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.255] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-25 10:44:26.258] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-25 10:44:26.260] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-25 10:44:26.262] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-25 10:44:26.264] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-25 10:44:26.266] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-25 10:44:26.269] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-25 10:44:26.271] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-25 10:44:26.283] irq.c:276: Dom1 PCI link 0 changed 5 -> 0
(XEN) [2015-06-25 10:44:26.290] irq.c:276: Dom1 PCI link 1 changed 10 -> 0
(XEN) [2015-06-25 10:44:26.297] irq.c:276: Dom1 PCI link 2 changed 11 -> 0
(XEN) [2015-06-25 10:44:26.303] irq.c:276: Dom1 PCI link 3 changed 5 -> 0
(XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
(XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
(XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
(XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
(XEN) [2015-06-25 10:44:26.896] grant_table.c:1486:d1v1 Expanding dom (1) grant table from (4) to (5) frames.
(XEN) [2015-06-25 10:46:20.513] grant_table.c:1486:d1v0 Expanding dom (1) grant table from (5) to (6) frames.
(XEN) [2015-06-25 10:46:31.820] MSI information:
(XEN) [2015-06-25 10:46:31.820] MSI 56 vec=28 lowest edge assert log lowest dest=00000001 mask=0/ /?
(XEN) [2015-06-25 10:46:31.820] HPET 57 vec=a0 lowest edge assert log lowest dest=00000002 mask=1/ /?
(XEN) [2015-06-25 10:46:31.820] HPET 58 vec=a8 lowest edge assert log lowest dest=00000002 mask=1/ /?
(XEN) [2015-06-25 10:46:31.820] HPET 59 vec=b0 lowest edge assert log lowest dest=00000001 mask=1/ /?
(XEN) [2015-06-25 10:46:31.820] MSI 60 vec=41 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 61 vec=49 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 62 vec=51 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 63 vec=59 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 64 vec=61 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 65 vec=69 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 66 vec=71 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 67 vec=79 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 68 vec=81 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 69 vec=91 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 70 vec=99 lowest edge assert log lowest dest=0000003f mask=1/H /1
(XEN) [2015-06-25 10:46:31.820] MSI 71 vec=a1 lowest edge assert log lowest dest=0000003f mask=1/H /1
(XEN) [2015-06-25 10:46:31.820] MSI 72 vec=b1 lowest edge assert log lowest dest=0000003f mask=1/H /1
(XEN) [2015-06-25 10:46:31.820] MSI 73 vec=32 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 74 vec=3a lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 75 vec=42 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 76 vec=4a lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 77 vec=52 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 78 vec=5a lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 79 vec=62 lowest edge assert log lowest dest=0000003f mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 80 vec=6a lowest edge assert log lowest dest=0000003f mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 81 vec=7a lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 82 vec=92 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI 83 vec=a2 lowest edge assert log lowest dest=00000001 mask=0/H /?
(XEN) [2015-06-25 10:46:31.820] MSI-X 84 vec=aa lowest edge assert log lowest dest=00000002 mask=1/ G/1
(XEN) [2015-06-25 10:46:31.820] MSI-X 85 vec=b2 lowest edge assert log lowest dest=00000002 mask=1/ G/1
(XEN) [2015-06-25 10:46:31.820] MSI-X 86 vec=ba lowest edge assert log lowest dest=00000002 mask=1/ G/1
(XEN) [2015-06-25 10:46:31.820] MSI-X 87 vec=c2 lowest edge assert log lowest dest=00000002 mask=1/ G/1
(XEN) [2015-06-25 10:46:31.820] MSI-X 88 vec=ca lowest edge assert log lowest dest=00000002 mask=1/ G/1
(XEN) [2015-06-25 10:46:36.249] IRQ information:
(XEN) [2015-06-25 10:46:36.249] IRQ: 0 affinity:01 vec:f0 type=IO-APIC-edge status=00000000 timer_interrupt()
(XEN) [2015-06-25 10:46:36.249] IRQ: 1 affinity:01 vec:30 type=IO-APIC-edge status=00000034 in-flight=0 domain-list=0: 1(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 3 affinity:01 vec:38 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 4 affinity:01 vec:f1 type=IO-APIC-edge status=00000000 ns16550_interrupt()
(XEN) [2015-06-25 10:46:36.249] IRQ: 5 affinity:01 vec:40 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 6 affinity:01 vec:48 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 7 affinity:01 vec:50 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 8 affinity:01 vec:58 type=IO-APIC-edge status=00000030 in-flight=0 domain-list=0: 8(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 9 affinity:01 vec:60 type=IO-APIC-level status=00000030 in-flight=0 domain-list=0: 9(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 10 affinity:01 vec:68 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 11 affinity:01 vec:70 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 12 affinity:01 vec:78 type=IO-APIC-edge status=00000030 in-flight=0 domain-list=0: 12(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 13 affinity:3f vec:88 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 14 affinity:01 vec:90 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 15 affinity:01 vec:98 type=IO-APIC-edge status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 16 affinity:3f vec:89 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 17 affinity:01 vec:c0 type=IO-APIC-level status=00000030 in-flight=0 domain-list=0: 17(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 18 affinity:01 vec:b8 type=IO-APIC-level status=00000030 in-flight=0 domain-list=0: 18(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 19 affinity:3f vec:2a type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 22 affinity:3f vec:b9 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 25 affinity:3f vec:9a type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 28 affinity:3f vec:22 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 29 affinity:3f vec:d9 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 32 affinity:3f vec:c9 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 33 affinity:3f vec:c1 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 36 affinity:3f vec:21 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 37 affinity:02 vec:29 type=IO-APIC-level status=00000010 in-flight=0 domain-list=1: 37(-M-),
(XEN) [2015-06-25 10:46:36.249] IRQ: 38 affinity:3f vec:a9 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 40 affinity:3f vec:31 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 46 affinity:3f vec:72 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 47 affinity:02 vec:d1 type=IO-APIC-level status=00000030 in-flight=0 domain-list=1: 47(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 48 affinity:3f vec:d0 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 51 affinity:3f vec:8a type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 52 affinity:3f vec:39 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 53 affinity:3f vec:c8 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 54 affinity:3f vec:d8 type=IO-APIC-level status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 56 affinity:01 vec:28 type=AMD-IOMMU-MSI status=00000000 iommu_interrupt_handler()
(XEN) [2015-06-25 10:46:36.249] IRQ: 57 affinity:02 vec:a0 type=HPET-MSI status=00000000 hpet_interrupt_handler()
(XEN) [2015-06-25 10:46:36.249] IRQ: 58 affinity:02 vec:a8 type=HPET-MSI status=00000000 hpet_interrupt_handler()
(XEN) [2015-06-25 10:46:36.249] IRQ: 59 affinity:01 vec:b0 type=HPET-MSI status=00000000 hpet_interrupt_handler()
(XEN) [2015-06-25 10:46:36.249] IRQ: 60 affinity:01 vec:41 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:631(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 61 affinity:01 vec:49 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:630(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 62 affinity:01 vec:51 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:629(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 63 affinity:01 vec:59 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:628(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 64 affinity:01 vec:61 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:627(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 65 affinity:01 vec:69 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:626(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 66 affinity:01 vec:71 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:625(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 67 affinity:01 vec:79 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:624(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 68 affinity:01 vec:81 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:623(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 69 affinity:01 vec:91 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:622(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 70 affinity:3f vec:99 type=PCI-MSI/-X status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 71 affinity:3f vec:a1 type=PCI-MSI/-X status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 72 affinity:3f vec:b1 type=PCI-MSI/-X status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 73 affinity:01 vec:32 type=PCI-MSI status=00000010 in-flight=0 domain-list=0:611(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 74 affinity:01 vec:3a type=PCI-MSI status=00000030 in-flight=0 domain-list=0:612(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 75 affinity:01 vec:42 type=PCI-MSI status=00000010 in-flight=0 domain-list=0:613(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 76 affinity:01 vec:4a type=PCI-MSI status=00000030 in-flight=0 domain-list=0:614(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 77 affinity:01 vec:52 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:615(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 78 affinity:01 vec:5a type=PCI-MSI status=00000030 in-flight=0 domain-list=0:616(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 79 affinity:3f vec:62 type=PCI-MSI status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 80 affinity:3f vec:6a type=PCI-MSI status=00000002 mapped, unbound
(XEN) [2015-06-25 10:46:36.249] IRQ: 81 affinity:01 vec:7a type=PCI-MSI status=00000010 in-flight=0 domain-list=0:610(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 82 affinity:01 vec:92 type=PCI-MSI status=00000010 in-flight=0 domain-list=0:609(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 83 affinity:01 vec:a2 type=PCI-MSI status=00000030 in-flight=0 domain-list=0:608(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 84 affinity:02 vec:aa type=PCI-MSI/-X status=00000030 in-flight=0 domain-list=1: 87(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 85 affinity:02 vec:b2 type=PCI-MSI/-X status=00000030 in-flight=0 domain-list=1: 86(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 86 affinity:02 vec:ba type=PCI-MSI/-X status=00000030 in-flight=0 domain-list=1: 85(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 87 affinity:02 vec:c2 type=PCI-MSI/-X status=00000030 in-flight=0 domain-list=1: 84(---),
(XEN) [2015-06-25 10:46:36.249] IRQ: 88 affinity:02 vec:ca type=PCI-MSI/-X status=00000030 in-flight=0 domain-list=1: 83(---),
(XEN) [2015-06-25 10:46:36.249] Direct vector information:
(XEN) [2015-06-25 10:46:36.249] 0x20 -> irq_move_cleanup_interrupt()
(XEN) [2015-06-25 10:46:36.249] 0xf9 -> pmu_apic_interrupt()
(XEN) [2015-06-25 10:46:36.249] 0xfa -> apic_timer_interrupt()
(XEN) [2015-06-25 10:46:36.249] 0xfb -> call_function_interrupt()
(XEN) [2015-06-25 10:46:36.249] 0xfc -> event_check_interrupt()
(XEN) [2015-06-25 10:46:36.249] 0xfd -> invalidate_interrupt()
(XEN) [2015-06-25 10:46:36.249] 0xfe -> error_interrupt()
(XEN) [2015-06-25 10:46:36.249] 0xff -> spurious_interrupt()
(XEN) [2015-06-25 10:46:36.249] IO-APIC interrupt information:
(XEN) [2015-06-25 10:46:36.249] IRQ 0 Vec240:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 2: vec=f0 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 1 Vec 48:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 1: vec=30 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 3 Vec 56:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 3: vec=38 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 4 Vec241:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 4: vec=f1 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 5 Vec 64:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 5: vec=40 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 6 Vec 72:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 6: vec=48 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 7 Vec 80:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 7: vec=50 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 8 Vec 88:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 8: vec=58 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 9 Vec 96:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 9: vec=60 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 10 Vec104:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 10: vec=68 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 11 Vec112:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 11: vec=70 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 12 Vec120:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 12: vec=78 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 13 Vec136:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 13: vec=88 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.249] IRQ 14 Vec144:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 14: vec=90 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 15 Vec152:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 15: vec=98 delivery=LoPri dest=L status=0 polarity=0 irr=0 trig=E mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 16 Vec137:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 16: vec=89 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.249] IRQ 17 Vec192:
(XEN) [2015-06-25 10:46:36.249] Apic 0x00, Pin 17: vec=c0 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.249] IRQ 18 Vec184:
(XEN) [2015-06-25 10:46:36.250] Apic 0x00, Pin 18: vec=b8 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=0 dest_id:1
(XEN) [2015-06-25 10:46:36.250] IRQ 19 Vec 42:
(XEN) [2015-06-25 10:46:36.250] Apic 0x00, Pin 19: vec=2a delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 22 Vec185:
(XEN) [2015-06-25 10:46:36.250] Apic 0x00, Pin 22: vec=b9 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 25 Vec154:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 1: vec=9a delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 28 Vec 34:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 4: vec=22 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 29 Vec217:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 5: vec=d9 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 32 Vec201:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 8: vec=c9 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 33 Vec193:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 9: vec=c1 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 36 Vec 33:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 12: vec=21 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 37 Vec 41:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 13: vec=29 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=0 dest_id:2
(XEN) [2015-06-25 10:46:36.250] IRQ 38 Vec169:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 14: vec=a9 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 40 Vec 49:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 16: vec=31 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 46 Vec114:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 22: vec=72 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 47 Vec209:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 23: vec=d1 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=0 dest_id:2
(XEN) [2015-06-25 10:46:36.250] IRQ 48 Vec208:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 24: vec=d0 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 51 Vec138:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 27: vec=8a delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 52 Vec 57:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 28: vec=39 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 53 Vec200:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 29: vec=c8 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
(XEN) [2015-06-25 10:46:36.250] IRQ 54 Vec216:
(XEN) [2015-06-25 10:46:36.250] Apic 0x01, Pin 30: vec=d8 delivery=LoPri dest=L status=0 polarity=1 irr=0 trig=L mask=1 dest_id:63
[-- Attachment #3: Type: text/plain, Size: 126 bytes --]
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^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-25 10:51 ` Sander Eikelenboom
@ 2015-06-25 11:29 ` Jan Beulich
2015-06-25 12:02 ` Sander Eikelenboom
0 siblings, 1 reply; 23+ messages in thread
From: Jan Beulich @ 2015-06-25 11:29 UTC (permalink / raw)
To: Sander Eikelenboom; +Cc: andrew.cooper3, xen-devel
>>> On 25.06.15 at 12:51, <linux@eikelenboom.it> wrote:
> Attached is the xl-dmesg output of:
>
> - debug-keys M and i before guest boot
> - guest boot
> - debug-keys M and i after lsusb in the guest that hangs.
Interesting:
(XEN) [2015-06-25 10:46:31.820] MSI-X 84 vec=aa lowest edge assert log lowest dest=00000002 mask=1/ G/1
(XEN) [2015-06-25 10:46:31.820] MSI-X 85 vec=b2 lowest edge assert log lowest dest=00000002 mask=1/ G/1
(XEN) [2015-06-25 10:46:31.820] MSI-X 86 vec=ba lowest edge assert log lowest dest=00000002 mask=1/ G/1
(XEN) [2015-06-25 10:46:31.820] MSI-X 87 vec=c2 lowest edge assert log lowest dest=00000002 mask=1/ G/1
(XEN) [2015-06-25 10:46:31.820] MSI-X 88 vec=ca lowest edge assert log lowest dest=00000002 mask=1/ G/1
I.e. they didn't get unmasked by the guest. Is that with one of our
two qemu-s, or some other version?
I'd be curious what the guest view of the MSI-X table entries is at
that point. Can you still use the console inside the guest? If so,
sufficiently verbose lspci of the device should be able to tell us
(hoping that this isn't a Windows guest), or a dd of /dev/mem at
the right offset. Perhaps there are also way to get at that from
qemu, but I do not know how.
If none of this works or provides enough insight, I guess we'd
have to instrument msixtbl_write() to monitor guest writes to the
mask bit. (After all that's the only place the guest_masked bit
gets driven from right now.)
> The not working controller is 0000:08:00.0.
That information would have been useful only together with P
output, but since there were no MSI-X entries before the guest
started, it was pretty clear that all of them belong to the device(s)
handed to it.
Btw., are
(XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
(XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
(XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
(XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
new? Did you ever try to figure out what they're being caused by?
Jan
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-25 11:29 ` Jan Beulich
@ 2015-06-25 12:02 ` Sander Eikelenboom
2015-06-25 12:40 ` Jan Beulich
2015-06-26 9:56 ` Jan Beulich
0 siblings, 2 replies; 23+ messages in thread
From: Sander Eikelenboom @ 2015-06-25 12:02 UTC (permalink / raw)
To: Jan Beulich; +Cc: andrew.cooper3, xen-devel
[-- Attachment #1: Type: text/plain, Size: 2922 bytes --]
Thursday, June 25, 2015, 1:29:39 PM, you wrote:
>>>> On 25.06.15 at 12:51, <linux@eikelenboom.it> wrote:
>> Attached is the xl-dmesg output of:
>>
>> - debug-keys M and i before guest boot
>> - guest boot
>> - debug-keys M and i after lsusb in the guest that hangs.
> Interesting:
> (XEN) [2015-06-25 10:46:31.820] MSI-X 84 vec=aa lowest edge assert log lowest dest=00000002 mask=1/ G/1
> (XEN) [2015-06-25 10:46:31.820] MSI-X 85 vec=b2 lowest edge assert log lowest dest=00000002 mask=1/ G/1
> (XEN) [2015-06-25 10:46:31.820] MSI-X 86 vec=ba lowest edge assert log lowest dest=00000002 mask=1/ G/1
> (XEN) [2015-06-25 10:46:31.820] MSI-X 87 vec=c2 lowest edge assert log lowest dest=00000002 mask=1/ G/1
> (XEN) [2015-06-25 10:46:31.820] MSI-X 88 vec=ca lowest edge assert log lowest dest=00000002 mask=1/ G/1
> I.e. they didn't get unmasked by the guest. Is that with one of our
> two qemu-s, or some other version?
Normal qemu-xen, git://xenbits.xen.org/qemu-upstream-unstable.git master
The tree has as last commit:
commit 579e90432e995d6cb6f8520aca557fa6646f94ec
Author: Petr Matousek <pmatouse@redhat.com>
Date: Sun May 24 10:53:44 2015 +0200
> I'd be curious what the guest view of the MSI-X table entries is at
> that point. Can you still use the console inside the guest? If so,
> sufficiently verbose lspci of the device should be able to tell us
> (hoping that this isn't a Windows guest), or a dd of /dev/mem at
> the right offset. Perhaps there are also way to get at that from
> qemu, but I do not know how.
The guest(linux) keeps running, only that terminal with the lsusb
command hangs, so no problem to gather the lspci output.
Guest lspci -vvvknn attached.
> If none of this works or provides enough insight, I guess we'd
> have to instrument msixtbl_write() to monitor guest writes to the
> mask bit. (After all that's the only place the guest_masked bit
> gets driven from right now.)
>> The not working controller is 0000:08:00.0.
> That information would have been useful only together with P
> output, but since there were no MSI-X entries before the guest
> started, it was pretty clear that all of them belong to the device(s)
> handed to it.
> Btw., are
> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 -> ffff82d080239eec
> new? Did you ever try to figure out what they're being caused by?
No those aren't new (they are present for at least some months now), something
in a booting guest kernel triggers those, not only for HVM's but
also for PV guests (and so they also appear for dom0).
> Jan
[-- Attachment #2: guest-lspci.txt --]
[-- Type: text/plain, Size: 6663 bytes --]
00:00.0 Host bridge [0600]: Intel Corporation 440FX - 82441FX PMC [Natoma] [8086:1237] (rev 02)
Subsystem: Red Hat, Inc Qemu virtual machine [1af4:1100]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:01.0 ISA bridge [0601]: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II] [8086:7000]
Subsystem: Red Hat, Inc Qemu virtual machine [1af4:1100]
Physical Slot: 1
Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:01.1 IDE interface [0101]: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II] [8086:7010] (prog-if 80 [Master])
Subsystem: Red Hat, Inc Qemu virtual machine [1af4:1100]
Physical Slot: 1
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8]
Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable)
Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8]
Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable)
Region 4: I/O ports at c140 [size=16]
00:01.3 Bridge [0680]: Intel Corporation 82371AB/EB/MB PIIX4 ACPI [8086:7113] (rev 03)
Subsystem: Red Hat, Inc Qemu virtual machine [1af4:1100]
Physical Slot: 1
Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 9
00:02.0 Unassigned class [ff80]: XenSource, Inc. Xen Platform Device [5853:0001] (rev 01)
Subsystem: XenSource, Inc. Xen Platform Device [5853:0001]
Physical Slot: 2
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 24
Region 0: I/O ports at c000 [size=256]
Region 1: Memory at f2000000 (32-bit, prefetchable) [size=16M]
Kernel driver in use: xen-platform-pci
00:03.0 VGA compatible controller [0300]: Cirrus Logic GD 5446 [1013:00b8] (prog-if 00 [VGA controller])
Subsystem: Red Hat, Inc QEMU Virtual Machine [1af4:1100]
Physical Slot: 3
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: Memory at f0000000 (32-bit, prefetchable) [size=32M]
Region 1: Memory at f3272000 (32-bit, non-prefetchable) [size=4K]
Expansion ROM at f3260000 [disabled] [size=64K]
00:05.0 USB controller [0c03]: NEC Corporation uPD720200 USB 3.0 Host Controller [1033:0194] (rev 03) (prog-if 30 [XHCI])
Subsystem: ASUSTeK Computer Inc. P8P67 Deluxe Motherboard [1043:8413]
Physical Slot: 5
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 36
Region 0: Memory at f3270000 (64-bit, non-prefetchable) [size=8K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [70] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [90] MSI-X: Enable+ Count=8 Masked-
Vector table: BAR=0 offset=00001000
PBA: BAR=0 offset=00001080
Capabilities: [a0] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <4us, L1 unlimited
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR+, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: xhci_hcd
00:06.0 Multimedia video controller [0400]: Conexant Systems, Inc. Device [14f1:8210]
Physical Slot: 6
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 40
Region 0: Memory at f3000000 (64-bit, non-prefetchable) [size=2M]
Capabilities: [40] Express (v1) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <2us, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
Capabilities: [80] Power Management version 3
Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [90] Vital Product Data
Unknown small resource type 02, will not decode more.
Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Kernel driver in use: cx25821
[-- Attachment #3: Type: text/plain, Size: 126 bytes --]
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^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-25 12:02 ` Sander Eikelenboom
@ 2015-06-25 12:40 ` Jan Beulich
2015-06-25 13:16 ` Sander Eikelenboom
2015-06-26 9:56 ` Jan Beulich
1 sibling, 1 reply; 23+ messages in thread
From: Jan Beulich @ 2015-06-25 12:40 UTC (permalink / raw)
To: Sander Eikelenboom; +Cc: andrew.cooper3, xen-devel
>>> On 25.06.15 at 14:02, <linux@eikelenboom.it> wrote:
> Thursday, June 25, 2015, 1:29:39 PM, you wrote:
>> I'd be curious what the guest view of the MSI-X table entries is at
>> that point. Can you still use the console inside the guest? If so,
>> sufficiently verbose lspci of the device should be able to tell us
>> (hoping that this isn't a Windows guest), or a dd of /dev/mem at
>> the right offset. Perhaps there are also way to get at that from
>> qemu, but I do not know how.
>
> The guest(linux) keeps running, only that terminal with the lsusb
> command hangs, so no problem to gather the lspci output.
> Guest lspci -vvvknn attached.
Hmm, no, this
Capabilities: [90] MSI-X: Enable+ Count=8 Masked-
Vector table: BAR=0 offset=00001000
PBA: BAR=0 offset=00001080
isn't enough. I was sure I saw lspci capable of listing the individual
table entries...
>> Btw., are
>
>> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 ->
> ffff82d080239eec
>> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 ->
> ffff82d080239eec
>> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 ->
> ffff82d080239eec
>> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 ->
> ffff82d080239eec
>
>> new? Did you ever try to figure out what they're being caused by?
>
> No those aren't new (they are present for at least some months now),
> something
> in a booting guest kernel triggers those, not only for HVM's but
> also for PV guests (and so they also appear for dom0).
No, the Dom0 ones were different from what I recall.
Jan
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-25 12:40 ` Jan Beulich
@ 2015-06-25 13:16 ` Sander Eikelenboom
2015-06-25 13:37 ` Jan Beulich
0 siblings, 1 reply; 23+ messages in thread
From: Sander Eikelenboom @ 2015-06-25 13:16 UTC (permalink / raw)
To: Jan Beulich; +Cc: andrew.cooper3, xen-devel
Thursday, June 25, 2015, 2:40:18 PM, you wrote:
>>>> On 25.06.15 at 14:02, <linux@eikelenboom.it> wrote:
>> Thursday, June 25, 2015, 1:29:39 PM, you wrote:
>>> I'd be curious what the guest view of the MSI-X table entries is at
>>> that point. Can you still use the console inside the guest? If so,
>>> sufficiently verbose lspci of the device should be able to tell us
>>> (hoping that this isn't a Windows guest), or a dd of /dev/mem at
>>> the right offset. Perhaps there are also way to get at that from
>>> qemu, but I do not know how.
>>
>> The guest(linux) keeps running, only that terminal with the lsusb
>> command hangs, so no problem to gather the lspci output.
>> Guest lspci -vvvknn attached.
> Hmm, no, this
> Capabilities: [90] MSI-X: Enable+ Count=8 Masked-
> Vector table: BAR=0 offset=00001000
> PBA: BAR=0 offset=00001080
> isn't enough. I was sure I saw lspci capable of listing the individual
> table entries...
It seems to be the most verbose option for my lspci of debian Jessie.
So probably a debug-patch would be best ?
>>> Btw., are
>>
>>> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 ->
>> ffff82d080239eec
>>> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 ->
>> ffff82d080239eec
>>> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 ->
>> ffff82d080239eec
>>> (XEN) [2015-06-25 10:44:26.550] traps.c:3227: GPF (0000): ffff82d0801d8282 ->
>> ffff82d080239eec
>>
>>> new? Did you ever try to figure out what they're being caused by?
>>
>> No those aren't new (they are present for at least some months now),
>> something
>> in a booting guest kernel triggers those, not only for HVM's but
>> also for PV guests (and so they also appear for dom0).
> No, the Dom0 ones were different from what I recall.
I will double check.
> Jan
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-25 13:16 ` Sander Eikelenboom
@ 2015-06-25 13:37 ` Jan Beulich
2015-06-25 13:42 ` linux
0 siblings, 1 reply; 23+ messages in thread
From: Jan Beulich @ 2015-06-25 13:37 UTC (permalink / raw)
To: Sander Eikelenboom; +Cc: andrew.cooper3, xen-devel
>>> On 25.06.15 at 15:16, <linux@eikelenboom.it> wrote:
> Thursday, June 25, 2015, 2:40:18 PM, you wrote:
>> Hmm, no, this
>
>> Capabilities: [90] MSI-X: Enable+ Count=8 Masked-
>> Vector table: BAR=0 offset=00001000
>> PBA: BAR=0 offset=00001080
>
>> isn't enough. I was sure I saw lspci capable of listing the individual
>> table entries...
>
> It seems to be the most verbose option for my lspci of debian Jessie.
> So probably a debug-patch would be best ?
Yes, but I'm not sure when I'd get to it (being on vacation all next
week).
Jan
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-25 13:37 ` Jan Beulich
@ 2015-06-25 13:42 ` linux
0 siblings, 0 replies; 23+ messages in thread
From: linux @ 2015-06-25 13:42 UTC (permalink / raw)
To: Jan Beulich; +Cc: andrew.cooper3, xen-devel
On 2015-06-25 15:37, Jan Beulich wrote:
>>>> On 25.06.15 at 15:16, <linux@eikelenboom.it> wrote:
>> Thursday, June 25, 2015, 2:40:18 PM, you wrote:
>>> Hmm, no, this
>>
>>> Capabilities: [90] MSI-X: Enable+ Count=8 Masked-
>>> Vector table: BAR=0 offset=00001000
>>> PBA: BAR=0 offset=00001080
>>
>>> isn't enough. I was sure I saw lspci capable of listing the
>>> individual
>>> table entries...
>>
>> It seems to be the most verbose option for my lspci of debian Jessie.
>> So probably a debug-patch would be best ?
>
> Yes, but I'm not sure when I'd get to it (being on vacation all next
> week).
>
> Jan
Ok no problem no hurry, reverting the commit and the following cleanup
to get a clean revert,
"fixes" it for me. It can wait (or Andrew should beat you to it ;) )
Have a good vacation !
--
Sander
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-25 12:02 ` Sander Eikelenboom
2015-06-25 12:40 ` Jan Beulich
@ 2015-06-26 9:56 ` Jan Beulich
2015-06-26 11:02 ` linux
1 sibling, 1 reply; 23+ messages in thread
From: Jan Beulich @ 2015-06-26 9:56 UTC (permalink / raw)
To: Sander Eikelenboom; +Cc: andrew.cooper3, xen-devel
[-- Attachment #1: Type: text/plain, Size: 1057 bytes --]
>>> On 25.06.15 at 14:02, <linux@eikelenboom.it> wrote:
> Thursday, June 25, 2015, 1:29:39 PM, you wrote:
>>>>> On 25.06.15 at 12:51, <linux@eikelenboom.it> wrote:
>>> Attached is the xl-dmesg output of:
>>>
>>> - debug-keys M and i before guest boot
>>> - guest boot
>>> - debug-keys M and i after lsusb in the guest that hangs.
>
>> Interesting:
>
>> (XEN) [2015-06-25 10:46:31.820] MSI-X 84 vec=aa lowest edge assert log
> lowest dest=00000002 mask=1/ G/1
>> (XEN) [2015-06-25 10:46:31.820] MSI-X 85 vec=b2 lowest edge assert log
> lowest dest=00000002 mask=1/ G/1
>> (XEN) [2015-06-25 10:46:31.820] MSI-X 86 vec=ba lowest edge assert log
> lowest dest=00000002 mask=1/ G/1
>> (XEN) [2015-06-25 10:46:31.820] MSI-X 87 vec=c2 lowest edge assert log
> lowest dest=00000002 mask=1/ G/1
>> (XEN) [2015-06-25 10:46:31.820] MSI-X 88 vec=ca lowest edge assert log
> lowest dest=00000002 mask=1/ G/1
>
>> I.e. they didn't get unmasked by the guest.
Attached a first debugging patch.
Jan
[-- Attachment #2: Sander-MSI-X.patch --]
[-- Type: text/plain, Size: 2610 bytes --]
--- unstable.orig/xen/arch/x86/hvm/vmsi.c 2015-06-22 11:50:41.000000000 +0200
+++ unstable/xen/arch/x86/hvm/vmsi.c 2015-06-26 11:50:44.000000000 +0200
@@ -267,18 +267,30 @@ static int msixtbl_write(struct vcpu *v,
int r = X86EMUL_UNHANDLEABLE;
unsigned long flags;
struct irq_desc *desc;
+unsigned int seg, bus, slot, func;//temp
if ( (len != 4 && len != 8) || (address & (len - 1)) )
+{//temp
+ printk("MSI-X bad write (%lx,%lu)\n", address, len);//temp
return r;
+}
rcu_read_lock(&msixtbl_rcu_lock);
entry = msixtbl_find_entry(v, address);
if ( !entry )
+{//temp
+ printk("MSI-X not found (%lx,%lu)\n", address, len);//temp
goto out;
+}
nr_entry = (address - entry->gtable) / PCI_MSIX_ENTRY_SIZE;
offset = address & (PCI_MSIX_ENTRY_SIZE - 1);
+seg = entry->pdev->seg;
+bus = entry->pdev->bus;
+slot = PCI_SLOT(entry->pdev->devfn);
+func = PCI_FUNC(entry->pdev->devfn);
+printk("MSI-X write %04x:%02x:%02x.%u#%03x:%lx:%lu\n", seg, bus, slot, func, nr_entry, offset, len);//temp
if ( offset != PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET )
{
index = offset / sizeof(uint32_t);
@@ -302,25 +314,37 @@ static int msixtbl_write(struct vcpu *v,
if ( !(val & PCI_MSIX_VECTOR_BITMASK) &&
test_and_clear_bit(nr_entry, &entry->table_flags) )
{
+printk("MSI-X defer %04x:%02x:%02x.%u#%03x:%lx:%lu\n", seg, bus, slot, func, nr_entry, offset, len);//temp
v->arch.hvm_vcpu.hvm_io.msix_unmask_address = address;
goto out;
}
msi_desc = msixtbl_addr_to_desc(entry, address);
if ( !msi_desc || msi_desc->irq < 0 )
+{//temp
+ printk("MSI-X %04x:%02x:%02x.%u#%03x no IRQ (%d)\n", seg, bus, slot, func, nr_entry, msi_desc ? msi_desc->irq : INT_MIN);//temp
goto out;
+}
+ASSERT(entry->pdev == msi_desc->dev);//temp
desc = irq_to_desc(msi_desc->irq);
if ( !desc )
+{//temp
+ printk("MSI-X %04x:%02x:%02x.%u#%03x no IRQ%d desc\n", seg, bus, slot, func, nr_entry, msi_desc->irq);//temp
goto out;
+}
spin_lock_irqsave(&desc->lock, flags);
if ( !desc->msi_desc )
+{//temp
+ printk("MSI-X %04x:%02x:%02x.%u#%03x no IRQ%d MSI desc\n", seg, bus, slot, func, nr_entry, msi_desc->irq);//temp
goto unlock;
+}
ASSERT(msi_desc == desc->msi_desc);
+printk("MSI-X %04x:%02x:%02x.%u#%03x IRQ%d mask=%d\n", seg, bus, slot, func, nr_entry, msi_desc->irq, !!(val & PCI_MSIX_VECTOR_BITMASK));//temp
guest_mask_msi_irq(desc, !!(val & PCI_MSIX_VECTOR_BITMASK));
unlock:
[-- Attachment #3: Type: text/plain, Size: 126 bytes --]
_______________________________________________
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Xen-devel@lists.xen.org
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^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-26 9:56 ` Jan Beulich
@ 2015-06-26 11:02 ` linux
2015-06-26 12:41 ` Jan Beulich
0 siblings, 1 reply; 23+ messages in thread
From: linux @ 2015-06-26 11:02 UTC (permalink / raw)
To: Jan Beulich; +Cc: andrew.cooper3, xen-devel
[-- Attachment #1: Type: text/plain, Size: 1440 bytes --]
On 2015-06-26 11:56, Jan Beulich wrote:
>>>> On 25.06.15 at 14:02, <linux@eikelenboom.it> wrote:
>> Thursday, June 25, 2015, 1:29:39 PM, you wrote:
>>>>>> On 25.06.15 at 12:51, <linux@eikelenboom.it> wrote:
>>>> Attached is the xl-dmesg output of:
>>>>
>>>> - debug-keys M and i before guest boot
>>>> - guest boot
>>>> - debug-keys M and i after lsusb in the guest that hangs.
>>
>>> Interesting:
>>
>>> (XEN) [2015-06-25 10:46:31.820] MSI-X 84 vec=aa lowest edge
>>> assert log
>> lowest dest=00000002 mask=1/ G/1
>>> (XEN) [2015-06-25 10:46:31.820] MSI-X 85 vec=b2 lowest edge
>>> assert log
>> lowest dest=00000002 mask=1/ G/1
>>> (XEN) [2015-06-25 10:46:31.820] MSI-X 86 vec=ba lowest edge
>>> assert log
>> lowest dest=00000002 mask=1/ G/1
>>> (XEN) [2015-06-25 10:46:31.820] MSI-X 87 vec=c2 lowest edge
>>> assert log
>> lowest dest=00000002 mask=1/ G/1
>>> (XEN) [2015-06-25 10:46:31.820] MSI-X 88 vec=ca lowest edge
>>> assert log
>> lowest dest=00000002 mask=1/ G/1
>>
>>> I.e. they didn't get unmasked by the guest.
>
> Attached a first debugging patch.
>
> Jan
Hi Jan,
Strange, i don't see *any* of your printk's being hit ... (xl dmesg
attached).
(What i do notice is that it looks like he xhci controller is
initialized early by seabios instead of the guest kernel, but it that
should also be true in the "working case" since the seabios version
didn't change.)
--
Sander
[-- Attachment #2: xl-dmesg.txt --]
[-- Type: text/plain, Size: 49801 bytes --]
__ __ _ _ __ _ _ _
\ \/ /___ _ __ | || | / /_ _ _ _ __ ___| |_ __ _| |__ | | ___
\ // _ \ '_ \ | || |_| '_ \ __| | | | '_ \/ __| __/ _` | '_ \| |/ _ \
/ \ __/ | | | |__ _| (_) |__| |_| | | | \__ \ || (_| | |_) | | __/
/_/\_\___|_| |_| |_|(_)___/ \__,_|_| |_|___/\__\__,_|_.__/|_|\___|
(XEN) Xen version 4.6-unstable (root@dyndns.org) (gcc-4.9.real (Debian 4.9.2-10) 4.9.2) debug=y Fri Jun 26 12:31:35 CEST 2015
(XEN) Latest ChangeSet: Thu Jun 25 14:58:39 2015 +0200 git:ca7f96c-dirty
(XEN) Bootloader: GRUB 2.02~beta2-22
(XEN) Command line: dom0_mem=1536M,max:1536M loglvl=all loglvl_guest=all console_timestamps=datems vga=gfx-1280x1024x32 cpuidle cpufreq=xen com1=38400,8n1 console=vga,com1 ivrs_ioapic[6]=00:14.0 iommu=on,verbose,debug,amd-iommu-debug
(XEN) Video information:
(XEN) VGA is graphics mode 1280x1024, 32 bpp
(XEN) VBE/DDC methods: V2; EDID transfer time: 1 seconds
(XEN) EDID info not retrieved because of reasons unknown
(XEN) Disc information:
(XEN) Found 2 MBR signatures
(XEN) Found 2 EDD information structures
(XEN) Xen-e820 RAM map:
(XEN) 0000000000000000 - 0000000000099400 (usable)
(XEN) 0000000000099400 - 00000000000a0000 (reserved)
(XEN) 00000000000e4000 - 0000000000100000 (reserved)
(XEN) 0000000000100000 - 000000009ff90000 (usable)
(XEN) 000000009ff90000 - 000000009ff9e000 (ACPI data)
(XEN) 000000009ff9e000 - 000000009ffe0000 (ACPI NVS)
(XEN) 000000009ffe0000 - 00000000a0000000 (reserved)
(XEN) 00000000ffe00000 - 0000000100000000 (reserved)
(XEN) 0000000100000000 - 0000000560000000 (usable)
(XEN) ACPI: RSDP 000FB100, 0014 (r0 ACPIAM)
(XEN) ACPI: RSDT 9FF90000, 0048 (r1 MSI OEMSLIC 20100913 MSFT 97)
(XEN) ACPI: FACP 9FF90200, 0084 (r1 7640MS A7640100 20100913 MSFT 97)
(XEN) ACPI: DSDT 9FF905E0, 9427 (r1 A7640 A7640100 100 INTL 20051117)
(XEN) ACPI: FACS 9FF9E000, 0040
(XEN) ACPI: APIC 9FF90390, 0088 (r1 7640MS A7640100 20100913 MSFT 97)
(XEN) ACPI: MCFG 9FF90420, 003C (r1 7640MS OEMMCFG 20100913 MSFT 97)
(XEN) ACPI: SLIC 9FF90460, 0176 (r1 MSI OEMSLIC 20100913 MSFT 97)
(XEN) ACPI: OEMB 9FF9E040, 0072 (r1 7640MS A7640100 20100913 MSFT 97)
(XEN) ACPI: SRAT 9FF9A5E0, 0108 (r3 AMD FAM_F_10 2 AMD 1)
(XEN) ACPI: HPET 9FF9A6F0, 0038 (r1 7640MS OEMHPET 20100913 MSFT 97)
(XEN) ACPI: IVRS 9FF9A730, 0110 (r1 AMD RD890S 202031 AMD 0)
(XEN) ACPI: SSDT 9FF9A840, 0DA4 (r1 A M I POWERNOW 1 AMD 1)
(XEN) System RAM: 20479MB (20970660kB)
(XEN) SRAT: PXM 0 -> APIC 0 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 1 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 2 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 3 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 4 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 5 -> Node 0
(XEN) SRAT: Node 0 PXM 0 0-a0000
(XEN) SRAT: Node 0 PXM 0 100000-a0000000
(XEN) SRAT: Node 0 PXM 0 100000000-560000000
(XEN) NUMA: Allocated memnodemap from 55c873000 - 55c879000
(XEN) NUMA: Using 8 for the hash shift.
(XEN) Domain heap initialised
(XEN) vesafb: framebuffer at 0xd0000000, mapped to 0xffff82c000201000, using 6144k, total 16384k
(XEN) vesafb: mode is 1280x1024x32, linelength=5120, font 8x16
(XEN) vesafb: Truecolor: size=0:8:8:8, shift=0:16:8:0
(XEN) found SMP MP-table at 000ff780
(XEN) DMI present.
(XEN) Using APIC driver default
(XEN) ACPI: PM-Timer IO Port: 0x808
(XEN) ACPI: SLEEP INFO: pm1x_cnt[1:804,1:0], pm1x_evt[1:800,1:0]
(XEN) ACPI: wakeup_vec[9ff9e00c], vec_size[20]
(XEN) ACPI: Local APIC address 0xfee00000
(XEN) ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
(XEN) Processor #0 0:10 APIC version 16
(XEN) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01] enabled)
(XEN) Processor #1 0:10 APIC version 16
(XEN) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x02] enabled)
(XEN) Processor #2 0:10 APIC version 16
(XEN) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x03] enabled)
(XEN) Processor #3 0:10 APIC version 16
(XEN) ACPI: LAPIC (acpi_id[0x05] lapic_id[0x04] enabled)
(XEN) Processor #4 0:10 APIC version 16
(XEN) ACPI: LAPIC (acpi_id[0x06] lapic_id[0x05] enabled)
(XEN) Processor #5 0:10 APIC version 16
(XEN) ACPI: IOAPIC (id[0x06] address[0xfec00000] gsi_base[0])
(XEN) IOAPIC[0]: apic_id 6, version 33, address 0xfec00000, GSI 0-23
(XEN) ACPI: IOAPIC (id[0x07] address[0xfec20000] gsi_base[24])
(XEN) IOAPIC[1]: apic_id 7, version 33, address 0xfec20000, GSI 24-55
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
(XEN) ACPI: IRQ0 used by override.
(XEN) ACPI: IRQ2 used by override.
(XEN) ACPI: IRQ9 used by override.
(XEN) Enabling APIC mode: Flat. Using 2 I/O APICs
(XEN) ACPI: HPET id: 0x8300 base: 0xfed00000
(XEN) ERST table was not found
(XEN) Using ACPI (MADT) for SMP configuration information
(XEN) SMP: Allowing 6 CPUs (0 hotplug CPUs)
(XEN) IRQ limits: 56 GSI, 1112 MSI/MSI-X
(XEN) AMD Fam10h machine check reporting enabled
(XEN) Using scheduler: SMP Credit Scheduler (credit)
(XEN) Detected 3200.172 MHz processor.
(XEN) Initing memory sharing.
(XEN) alt table ffff82d0802e1510 -> ffff82d0802e27b8
(XEN) PCI: MCFG configuration 0: base e0000000 segment 0000 buses 00 - ff
(XEN) PCI: Not using MCFG for segment 0000 bus 00-ff
(XEN) AMD-Vi: Found MSI capability block at 0x54
(XEN) AMD-Vi: ACPI Table:
(XEN) AMD-Vi: Signature IVRS
(XEN) AMD-Vi: Length 0x110
(XEN) AMD-Vi: Revision 0x1
(XEN) AMD-Vi: CheckSum 0x8f
(XEN) AMD-Vi: OEM_Id AMD
(XEN) AMD-Vi: OEM_Table_Id RD890S
(XEN) AMD-Vi: OEM_Revision 0x202031
(XEN) AMD-Vi: Creator_Id AMD
(XEN) AMD-Vi: Creator_Revision 0
(XEN) AMD-Vi: IVRS Block: type 0x10 flags 0x3e len 0xe0 id 0x2
(XEN) AMD-Vi: IVHD Device Entry: type 0x3 id 0 flags 0
(XEN) AMD-Vi: Dev_Id Range: 0 -> 0x2
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x10 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x3 id 0xf00 flags 0
(XEN) AMD-Vi: Dev_Id Range: 0xf00 -> 0xf01
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x18 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x3 id 0xe00 flags 0
(XEN) AMD-Vi: Dev_Id Range: 0xe00 -> 0xe01
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x28 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0xd00 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x30 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0xc00 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x48 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0xb00 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x50 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0xa00 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x58 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x3 id 0x900 flags 0
(XEN) AMD-Vi: Dev_Id Range: 0x900 -> 0x901
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x60 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x500 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x608 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x800 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x610 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x700 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x68 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x400 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x88 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x3 id 0x90 flags 0
(XEN) AMD-Vi: Dev_Id Range: 0x90 -> 0x92
(XEN) AMD-Vi: IVHD Device Entry: type 0x3 id 0x98 flags 0
(XEN) AMD-Vi: Dev_Id Range: 0x98 -> 0x9a
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0xa0 flags 0xd7
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0xa3 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0xa4 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0 id 0 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x43 id 0x300 flags 0
(XEN) AMD-Vi: Dev_Id Range: 0x300 -> 0x3ff alias 0xa4
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0xa5 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0xa8 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0xa9 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x2 id 0x100 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x3 id 0xb0 flags 0
(XEN) AMD-Vi: Dev_Id Range: 0xb0 -> 0xb2
(XEN) AMD-Vi: IVHD Device Entry: type 0 id 0 flags 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x48 id 0 flags 0xd7
(XEN) AMD-Vi: IVHD Special: 0000:00:14.0 variety 0x2 handle 0
(XEN) AMD-Vi: IVHD Device Entry: type 0x48 id 0 flags 0
(XEN) AMD-Vi: IVHD Special: 0000:00:00.1 variety 0x1 handle 0x7
(XEN) AMD-Vi: Disabled HAP memory map sharing with IOMMU
(XEN) AMD-Vi: IOMMU 0 Enabled.
(XEN) I/O virtualisation enabled
(XEN) - Dom0 mode: Relaxed
(XEN) Interrupt remapping enabled
(XEN) ENABLING IO-APIC IRQs
(XEN) -> Using new ACK method
(XEN) ..TIMER: vector=0xF0 apic1=0 pin1=2 apic2=-1 pin2=-1
(XEN) [2015-06-26 10:41:32.248] Platform timer is 14.318MHz HPET
(XEN) [2015-06-26 10:41:32.271] Allocated console ring of 64 KiB.
(XEN) [2015-06-26 10:41:32.279] mwait-idle: does not run on family 16 model 10
(XEN) [2015-06-26 10:41:32.286] HVM: ASIDs enabled.
(XEN) [2015-06-26 10:41:32.294] SVM: Supported advanced features:
(XEN) [2015-06-26 10:41:32.302] - Nested Page Tables (NPT)
(XEN) [2015-06-26 10:41:32.310] - Last Branch Record (LBR) Virtualisation
(XEN) [2015-06-26 10:41:32.317] - Next-RIP Saved on #VMEXIT
(XEN) [2015-06-26 10:41:32.325] - Pause-Intercept Filter
(XEN) [2015-06-26 10:41:32.333] HVM: SVM enabled
(XEN) [2015-06-26 10:41:32.341] HVM: Hardware Assisted Paging (HAP) detected
(XEN) [2015-06-26 10:41:32.349] HVM: HAP page sizes: 4kB, 2MB, 1GB
(XEN) [2015-06-26 10:41:32.357] HVM: PVH mode not supported on this platform
(XEN) [2015-06-26 10:41:32.467] Brought up 6 CPUs
(XEN) [2015-06-26 10:41:32.479] AMD-Vi: Failed to setup HPET MSI remapping. Wrong HPET.
(XEN) [2015-06-26 10:41:32.487] AMD-Vi: Failed to setup HPET MSI remapping. Wrong HPET.
(XEN) [2015-06-26 10:41:32.495] AMD-Vi: Failed to setup HPET MSI remapping. Wrong HPET.
(XEN) [2015-06-26 10:41:32.503] HPET: 3 timers usable for broadcast (3 total)
(XEN) [2015-06-26 10:41:32.532] ACPI sleep modes: S3
(XEN) [2015-06-26 10:41:32.540] MCA: Use hw thresholding to adjust polling frequency
(XEN) [2015-06-26 10:41:32.549] mcheck_poll: Machine check polling timer started.
(XEN) [2015-06-26 10:41:32.558] Xenoprofile: Failed to setup IBS LVT offset, IBSCTL = 0xffffffff
(XEN) [2015-06-26 10:41:32.566] Dom0 has maximum 632 PIRQs
(XEN) [2015-06-26 10:41:32.575] NX (Execute Disable) protection active
(XEN) [2015-06-26 10:41:32.584] *** LOADING DOMAIN 0 ***
(XEN) [2015-06-26 10:41:32.759] elf_parse_binary: phdr: paddr=0x1000000 memsz=0x107d000
(XEN) [2015-06-26 10:41:32.767] elf_parse_binary: phdr: paddr=0x2200000 memsz=0xfd000
(XEN) [2015-06-26 10:41:32.776] elf_parse_binary: phdr: paddr=0x22fd000 memsz=0x163a8
(XEN) [2015-06-26 10:41:32.785] elf_parse_binary: phdr: paddr=0x2314000 memsz=0x30f000
(XEN) [2015-06-26 10:41:32.794] elf_parse_binary: memory: 0x1000000 -> 0x2623000
(XEN) [2015-06-26 10:41:32.803] elf_xen_parse_note: GUEST_OS = "linux"
(XEN) [2015-06-26 10:41:32.812] elf_xen_parse_note: GUEST_VERSION = "2.6"
(XEN) [2015-06-26 10:41:32.821] elf_xen_parse_note: XEN_VERSION = "xen-3.0"
(XEN) [2015-06-26 10:41:32.830] elf_xen_parse_note: VIRT_BASE = 0xffffffff80000000
(XEN) [2015-06-26 10:41:32.839] elf_xen_parse_note: ENTRY = 0xffffffff823141f0
(XEN) [2015-06-26 10:41:32.849] elf_xen_parse_note: HYPERCALL_PAGE = 0xffffffff81001000
(XEN) [2015-06-26 10:41:32.858] elf_xen_parse_note: FEATURES = "!writable_page_tables|pae_pgdir_above_4gb|writable_descriptor_tables|auto_translated_physmap|supervisor_mode_kernel"
(XEN) [2015-06-26 10:41:32.877] elf_xen_parse_note: SUPPORTED_FEATURES = 0x90d
(XEN) [2015-06-26 10:41:32.886] elf_xen_parse_note: PAE_MODE = "yes"
(XEN) [2015-06-26 10:41:32.896] elf_xen_parse_note: LOADER = "generic"
(XEN) [2015-06-26 10:41:32.906] elf_xen_parse_note: unknown xen elf note (0xd)
(XEN) [2015-06-26 10:41:32.916] elf_xen_parse_note: SUSPEND_CANCEL = 0x1
(XEN) [2015-06-26 10:41:32.925] elf_xen_parse_note: MOD_START_PFN = 0x1
(XEN) [2015-06-26 10:41:32.935] elf_xen_parse_note: HV_START_LOW = 0xffff800000000000
(XEN) [2015-06-26 10:41:32.945] elf_xen_parse_note: PADDR_OFFSET = 0x0
(XEN) [2015-06-26 10:41:32.955] elf_xen_addr_calc_check: addresses:
(XEN) [2015-06-26 10:41:32.965] virt_base = 0xffffffff80000000
(XEN) [2015-06-26 10:41:32.975] elf_paddr_offset = 0x0
(XEN) [2015-06-26 10:41:32.985] virt_offset = 0xffffffff80000000
(XEN) [2015-06-26 10:41:32.995] virt_kstart = 0xffffffff81000000
(XEN) [2015-06-26 10:41:33.005] virt_kend = 0xffffffff82623000
(XEN) [2015-06-26 10:41:33.016] virt_entry = 0xffffffff823141f0
(XEN) [2015-06-26 10:41:33.026] p2m_base = 0xffffffffffffffff
(XEN) [2015-06-26 10:41:33.036] Xen kernel: 64-bit, lsb, compat32
(XEN) [2015-06-26 10:41:33.046] Dom0 kernel: 64-bit, PAE, lsb, paddr 0x1000000 -> 0x2623000
(XEN) [2015-06-26 10:41:33.057] PHYSICAL MEMORY ARRANGEMENT:
(XEN) [2015-06-26 10:41:33.068] Dom0 alloc.: 0000000548000000->000000054c000000 (370800 pages to be allocated)
(XEN) [2015-06-26 10:41:33.079] Init. ramdisk: 000000055e870000->000000055ffff800
(XEN) [2015-06-26 10:41:33.090] VIRTUAL MEMORY ARRANGEMENT:
(XEN) [2015-06-26 10:41:33.100] Loaded kernel: ffffffff81000000->ffffffff82623000
(XEN) [2015-06-26 10:41:33.111] Init. ramdisk: 0000000000000000->0000000000000000
(XEN) [2015-06-26 10:41:33.123] Phys-Mach map: ffffffff82623000->ffffffff82923000
(XEN) [2015-06-26 10:41:33.134] Start info: ffffffff82923000->ffffffff829234b4
(XEN) [2015-06-26 10:41:33.145] Page tables: ffffffff82924000->ffffffff8293d000
(XEN) [2015-06-26 10:41:33.156] Boot stack: ffffffff8293d000->ffffffff8293e000
(XEN) [2015-06-26 10:41:33.167] TOTAL: ffffffff80000000->ffffffff82c00000
(XEN) [2015-06-26 10:41:33.179] ENTRY ADDRESS: ffffffff823141f0
(XEN) [2015-06-26 10:41:33.191] Dom0 has maximum 6 VCPUs
(XEN) [2015-06-26 10:41:33.202] elf_load_binary: phdr 0 at 0xffffffff81000000 -> 0xffffffff8207d000
(XEN) [2015-06-26 10:41:33.220] elf_load_binary: phdr 1 at 0xffffffff82200000 -> 0xffffffff822fd000
(XEN) [2015-06-26 10:41:33.232] elf_load_binary: phdr 2 at 0xffffffff822fd000 -> 0xffffffff823133a8
(XEN) [2015-06-26 10:41:33.243] elf_load_binary: phdr 3 at 0xffffffff82314000 -> 0xffffffff8241a000
(XEN) [2015-06-26 10:41:34.360] AMD-Vi: Setup I/O page table: device id = 0, type = 0x6, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.372] AMD-Vi: Setup I/O page table: device id = 0x2, type = 0x7, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.384] AMD-Vi: Setup I/O page table: device id = 0x10, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.397] AMD-Vi: Setup I/O page table: device id = 0x18, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.409] AMD-Vi: Setup I/O page table: device id = 0x28, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.422] AMD-Vi: Setup I/O page table: device id = 0x30, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.435] AMD-Vi: Setup I/O page table: device id = 0x48, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.448] AMD-Vi: Setup I/O page table: device id = 0x50, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.461] AMD-Vi: Setup I/O page table: device id = 0x58, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.474] AMD-Vi: Setup I/O page table: device id = 0x60, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.488] AMD-Vi: Setup I/O page table: device id = 0x68, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.502] AMD-Vi: Setup I/O page table: device id = 0x88, type = 0x7, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.515] AMD-Vi: Setup I/O page table: device id = 0x90, type = 0x7, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.529] AMD-Vi: Setup I/O page table: device id = 0x92, type = 0x7, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.543] AMD-Vi: Setup I/O page table: device id = 0x98, type = 0x7, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.558] AMD-Vi: Setup I/O page table: device id = 0x9a, type = 0x7, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.572] AMD-Vi: Setup I/O page table: device id = 0xa0, type = 0x7, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.587] AMD-Vi: Setup I/O page table: device id = 0xa3, type = 0x7, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.602] AMD-Vi: Setup I/O page table: device id = 0xa4, type = 0x5, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.616] AMD-Vi: Setup I/O page table: device id = 0xa5, type = 0x7, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.631] AMD-Vi: Setup I/O page table: device id = 0xa8, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.647] AMD-Vi: Setup I/O page table: device id = 0xb0, type = 0x7, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.662] AMD-Vi: Setup I/O page table: device id = 0xb2, type = 0x7, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.678] AMD-Vi: Skipping host bridge 0000:00:18.0
(XEN) [2015-06-26 10:41:34.693] AMD-Vi: Skipping host bridge 0000:00:18.1
(XEN) [2015-06-26 10:41:34.708] AMD-Vi: Skipping host bridge 0000:00:18.2
(XEN) [2015-06-26 10:41:34.724] AMD-Vi: Skipping host bridge 0000:00:18.3
(XEN) [2015-06-26 10:41:34.739] AMD-Vi: Skipping host bridge 0000:00:18.4
(XEN) [2015-06-26 10:41:34.754] AMD-Vi: Setup I/O page table: device id = 0x400, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.769] AMD-Vi: Setup I/O page table: device id = 0x500, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.785] AMD-Vi: Setup I/O page table: device id = 0x608, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.801] AMD-Vi: Setup I/O page table: device id = 0x610, type = 0x2, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.817] AMD-Vi: Setup I/O page table: device id = 0x700, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.833] AMD-Vi: Setup I/O page table: device id = 0x800, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.849] AMD-Vi: Setup I/O page table: device id = 0x900, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.866] AMD-Vi: Setup I/O page table: device id = 0x901, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.883] AMD-Vi: Setup I/O page table: device id = 0xa00, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.900] AMD-Vi: Setup I/O page table: device id = 0xb00, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.917] AMD-Vi: Setup I/O page table: device id = 0xc00, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.934] AMD-Vi: Setup I/O page table: device id = 0xd00, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.951] AMD-Vi: Setup I/O page table: device id = 0xe00, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.969] AMD-Vi: Setup I/O page table: device id = 0xe01, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:34.987] AMD-Vi: Setup I/O page table: device id = 0xf00, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:35.004] AMD-Vi: Setup I/O page table: device id = 0xf01, type = 0x1, root table = 0x54e69d000, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:41:35.027] Scrubbing Free RAM on 1 nodes using 6 CPUs
(XEN) [2015-06-26 10:41:35.138] .............................done.
(XEN) [2015-06-26 10:41:38.236] Initial low memory virq threshold set at 0x4000 pages.
(XEN) [2015-06-26 10:41:38.254] Std. Loglevel: All
(XEN) [2015-06-26 10:41:38.272] Guest Loglevel: All
(XEN) [2015-06-26 10:41:38.290] Xen is relinquishing VGA console.
(XEN) [2015-06-26 10:41:38.392] *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)
(XEN) [2015-06-26 10:41:38.392] Freed 296kB init memory.
(XEN) [2015-06-26 10:41:38.480] traps.c:2655:d0v0 Domain attempted WRMSR 00000000c0000081 from 0xe023e00800000000 to 0x0023001000000000.
(XEN) [2015-06-26 10:41:38.480] traps.c:2655:d0v0 Domain attempted WRMSR 00000000c0000082 from 0xffff82d0bffff000 to 0xffffffff81b2f010.
(XEN) [2015-06-26 10:41:38.480] traps.c:2655:d0v0 Domain attempted WRMSR 00000000c0000083 from 0xffff82d0bffff020 to 0xffffffff81b30f10.
(XEN) [2015-06-26 10:41:38.480] traps.c:2655:d0v0 Domain attempted WRMSR 0000000000000174 from 0x0000000000000000 to 0x0000000000000010.
(XEN) [2015-06-26 10:41:38.480] traps.c:2655:d0v0 Domain attempted WRMSR 0000000000000176 from 0x0000000000000000 to 0xffffffff81b30dc0.
(XEN) [2015-06-26 10:41:38.480] traps.c:2655:d0v0 Domain attempted WRMSR 00000000c0000084 from 0x0000000000074700 to 0x0000000000047700.
(XEN) [2015-06-26 10:41:38.559] traps.c:2655:d0v0 Domain attempted WRMSR 00000000c0010007 from 0x0000000000000000 to 0x000000000000ffff.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v1 Domain attempted WRMSR 00000000c0000081 from 0xe023e00800000000 to 0x0023001000000000.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v1 Domain attempted WRMSR 00000000c0000082 from 0xffff82d0bfffe080 to 0xffffffff81b2f010.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v1 Domain attempted WRMSR 00000000c0000083 from 0xffff82d0bfffe0a0 to 0xffffffff81b30f10.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v1 Domain attempted WRMSR 0000000000000174 from 0x0000000000000000 to 0x0000000000000010.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v1 Domain attempted WRMSR 0000000000000176 from 0x0000000000000000 to 0xffffffff81b30dc0.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v1 Domain attempted WRMSR 00000000c0000084 from 0x0000000000074700 to 0x0000000000047700.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v2 Domain attempted WRMSR 00000000c0000081 from 0xe023e00800000000 to 0x0023001000000000.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v2 Domain attempted WRMSR 00000000c0000082 from 0xffff82d0bfffd100 to 0xffffffff81b2f010.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v2 Domain attempted WRMSR 00000000c0000083 from 0xffff82d0bfffd120 to 0xffffffff81b30f10.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v2 Domain attempted WRMSR 0000000000000174 from 0x0000000000000000 to 0x0000000000000010.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v2 Domain attempted WRMSR 0000000000000176 from 0x0000000000000000 to 0xffffffff81b30dc0.
(XEN) [2015-06-26 10:41:38.560] traps.c:2655:d0v2 Domain attempted WRMSR 00000000c0000084 from 0x0000000000074700 to 0x0000000000047700.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v3 Domain attempted WRMSR 00000000c0000081 from 0xe023e00800000000 to 0x0023001000000000.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v3 Domain attempted WRMSR 00000000c0000082 from 0xffff82d0bfffc180 to 0xffffffff81b2f010.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v3 Domain attempted WRMSR 00000000c0000083 from 0xffff82d0bfffc1a0 to 0xffffffff81b30f10.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v3 Domain attempted WRMSR 0000000000000174 from 0x0000000000000000 to 0x0000000000000010.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v3 Domain attempted WRMSR 0000000000000176 from 0x0000000000000000 to 0xffffffff81b30dc0.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v3 Domain attempted WRMSR 00000000c0000084 from 0x0000000000074700 to 0x0000000000047700.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v4 Domain attempted WRMSR 00000000c0000081 from 0xe023e00800000000 to 0x0023001000000000.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v4 Domain attempted WRMSR 00000000c0000082 from 0xffff82d0bfffb200 to 0xffffffff81b2f010.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v4 Domain attempted WRMSR 00000000c0000083 from 0xffff82d0bfffb220 to 0xffffffff81b30f10.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v4 Domain attempted WRMSR 0000000000000174 from 0x0000000000000000 to 0x0000000000000010.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v4 Domain attempted WRMSR 0000000000000176 from 0x0000000000000000 to 0xffffffff81b30dc0.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v4 Domain attempted WRMSR 00000000c0000084 from 0x0000000000074700 to 0x0000000000047700.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v5 Domain attempted WRMSR 00000000c0000081 from 0xe023e00800000000 to 0x0023001000000000.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v5 Domain attempted WRMSR 00000000c0000082 from 0xffff82d0bfffa280 to 0xffffffff81b2f010.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v5 Domain attempted WRMSR 00000000c0000083 from 0xffff82d0bfffa2a0 to 0xffffffff81b30f10.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v5 Domain attempted WRMSR 0000000000000174 from 0x0000000000000000 to 0x0000000000000010.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v5 Domain attempted WRMSR 0000000000000176 from 0x0000000000000000 to 0xffffffff81b30dc0.
(XEN) [2015-06-26 10:41:38.561] traps.c:2655:d0v5 Domain attempted WRMSR 00000000c0000084 from 0x0000000000074700 to 0x0000000000047700.
(XEN) [2015-06-26 10:41:39.019] PCI add device 0000:00:00.0
(XEN) [2015-06-26 10:41:39.019] PCI add device 0000:00:00.2
(XEN) [2015-06-26 10:41:39.020] PCI add device 0000:00:02.0
(XEN) [2015-06-26 10:41:39.020] PCI add device 0000:00:03.0
(XEN) [2015-06-26 10:41:39.020] PCI add device 0000:00:05.0
(XEN) [2015-06-26 10:41:39.020] PCI add device 0000:00:06.0
(XEN) [2015-06-26 10:41:39.020] PCI add device 0000:00:09.0
(XEN) [2015-06-26 10:41:39.021] PCI add device 0000:00:0a.0
(XEN) [2015-06-26 10:41:39.021] PCI add device 0000:00:0b.0
(XEN) [2015-06-26 10:41:39.021] PCI add device 0000:00:0c.0
(XEN) [2015-06-26 10:41:39.021] PCI add device 0000:00:0d.0
(XEN) [2015-06-26 10:41:39.021] PCI add device 0000:00:11.0
(XEN) [2015-06-26 10:41:39.022] PCI add device 0000:00:12.0
(XEN) [2015-06-26 10:41:39.022] PCI add device 0000:00:12.2
(XEN) [2015-06-26 10:41:39.022] PCI add device 0000:00:13.0
(XEN) [2015-06-26 10:41:39.022] PCI add device 0000:00:13.2
(XEN) [2015-06-26 10:41:39.023] PCI add device 0000:00:14.0
(XEN) [2015-06-26 10:41:39.023] PCI add device 0000:00:14.3
(XEN) [2015-06-26 10:41:39.023] PCI add device 0000:00:14.4
(XEN) [2015-06-26 10:41:39.023] PCI add device 0000:00:14.5
(XEN) [2015-06-26 10:41:39.023] PCI add device 0000:00:15.0
(XEN) [2015-06-26 10:41:39.023] PCI add device 0000:00:16.0
(XEN) [2015-06-26 10:41:39.024] PCI add device 0000:00:16.2
(XEN) [2015-06-26 10:41:39.024] PCI add device 0000:00:18.0
(XEN) [2015-06-26 10:41:39.024] PCI add device 0000:00:18.1
(XEN) [2015-06-26 10:41:39.024] PCI add device 0000:00:18.2
(XEN) [2015-06-26 10:41:39.024] PCI add device 0000:00:18.3
(XEN) [2015-06-26 10:41:39.024] PCI add device 0000:00:18.4
(XEN) [2015-06-26 10:41:39.025] PCI add device 0000:0f:00.0
(XEN) [2015-06-26 10:41:39.025] PCI add device 0000:0f:00.1
(XEN) [2015-06-26 10:41:39.032] PCI add device 0000:0e:00.0
(XEN) [2015-06-26 10:41:39.032] PCI add device 0000:0e:00.1
(XEN) [2015-06-26 10:41:39.039] PCI add device 0000:0d:00.0
(XEN) [2015-06-26 10:41:39.045] PCI add device 0000:0c:00.0
(XEN) [2015-06-26 10:41:39.052] PCI add device 0000:0b:00.0
(XEN) [2015-06-26 10:41:39.059] PCI add device 0000:0a:00.0
(XEN) [2015-06-26 10:41:39.066] PCI add device 0000:09:00.0
(XEN) [2015-06-26 10:41:39.066] PCI add device 0000:09:00.1
(XEN) [2015-06-26 10:41:39.072] PCI add device 0000:05:00.0
(XEN) [2015-06-26 10:41:39.079] PCI add device 0000:06:01.0
(XEN) [2015-06-26 10:41:39.079] PCI add device 0000:06:02.0
(XEN) [2015-06-26 10:41:39.080] PCI add device 0000:08:00.0
(XEN) [2015-06-26 10:41:39.086] PCI add device 0000:07:00.0
(XEN) [2015-06-26 10:41:39.093] PCI add device 0000:04:00.0
(XEN) [2015-06-26 10:41:39.099] PCI add device 0000:03:06.0
(XEN) [2015-06-26 10:41:39.113] PCI: Using MCFG for segment 0000 bus 00-ff
(XEN) [2015-06-26 10:41:39.442] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-26 10:41:39.442] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-26 10:41:39.442] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-26 10:41:39.442] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-26 10:41:39.442] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-26 10:41:39.442] traps.c:3227: GPF (0000): ffff82d080194a4d -> ffff82d080239d85
(XEN) [2015-06-26 10:41:43.779] mm.c:798: d0: Forcing read-only access to MFN fed00
(XEN) [2015-06-26 10:41:45.683] d0 attempted to change d0v2's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-26 10:41:46.092] d0 attempted to change d0v3's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-26 10:41:45.541] d0 attempted to change d0v5's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-26 10:41:45.548] d0 attempted to change d0v0's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-26 10:41:45.551] d0 attempted to change d0v1's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-26 10:41:45.578] d0 attempted to change d0v4's CR4 flags 00000660 -> 00000760
(XEN) [2015-06-26 10:50:25.146] io.c:429: d1: bind: m_gsi=37 g_gsi=36 dev=00.00.5 intx=0
(XEN) [2015-06-26 10:50:25.543] AMD-Vi: Disable: device id = 0x800, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:50:25.543] AMD-Vi: Setup I/O page table: device id = 0x800, type = 0x1, root table = 0x4b514a000, domain = 1, paging mode = 3
(XEN) [2015-06-26 10:50:25.543] AMD-Vi: Re-assign 0000:08:00.0 from dom0 to dom1
(XEN) [2015-06-26 10:50:27.582] io.c:429: d1: bind: m_gsi=47 g_gsi=40 dev=00.00.6 intx=0
(XEN) [2015-06-26 10:50:27.595] AMD-Vi: Disable: device id = 0xa00, domain = 0, paging mode = 3
(XEN) [2015-06-26 10:50:27.595] AMD-Vi: Setup I/O page table: device id = 0xa00, type = 0x1, root table = 0x4b514a000, domain = 1, paging mode = 3
(XEN) [2015-06-26 10:50:27.595] AMD-Vi: Re-assign 0000:0a:00.0 from dom0 to dom1
(d1) [2015-06-26 10:50:27.636] HVM Loader
(d1) [2015-06-26 10:50:27.636] Detected Xen v4.6-unstable
(d1) [2015-06-26 10:50:27.636] Xenbus rings @0xfeffc000, event channel 1
(d1) [2015-06-26 10:50:27.636] System requested SeaBIOS
(d1) [2015-06-26 10:50:27.636] CPU speed is 3200 MHz
(d1) [2015-06-26 10:50:27.636] Relocating guest memory for lowmem MMIO space disabled
(XEN) [2015-06-26 10:50:27.637] irq.c:276: Dom1 PCI link 0 changed 0 -> 5
(d1) [2015-06-26 10:50:27.637] PCI-ISA link 0 routed to IRQ5
(XEN) [2015-06-26 10:50:27.637] irq.c:276: Dom1 PCI link 1 changed 0 -> 10
(d1) [2015-06-26 10:50:27.637] PCI-ISA link 1 routed to IRQ10
(XEN) [2015-06-26 10:50:27.637] irq.c:276: Dom1 PCI link 2 changed 0 -> 11
(d1) [2015-06-26 10:50:27.637] PCI-ISA link 2 routed to IRQ11
(XEN) [2015-06-26 10:50:27.637] irq.c:276: Dom1 PCI link 3 changed 0 -> 5
(d1) [2015-06-26 10:50:27.637] PCI-ISA link 3 routed to IRQ5
(d1) [2015-06-26 10:50:27.647] pci dev 01:3 INTA->IRQ10
(d1) [2015-06-26 10:50:27.649] pci dev 02:0 INTA->IRQ11
(d1) [2015-06-26 10:50:27.654] pci dev 04:0 INTA->IRQ5
(d1) [2015-06-26 10:50:27.657] pci dev 05:0 INTA->IRQ10
(d1) [2015-06-26 10:50:27.661] pci dev 06:0 INTA->IRQ11
(d1) [2015-06-26 10:50:27.672] No RAM in high memory; setting high_mem resource base to 100000000
(d1) [2015-06-26 10:50:27.672] pci dev 03:0 bar 10 size 002000000: 0f0000008
(d1) [2015-06-26 10:50:27.674] pci dev 02:0 bar 14 size 001000000: 0f2000008
(d1) [2015-06-26 10:50:27.676] pci dev 06:0 bar 10 size 000200000: 0f3000004
(XEN) [2015-06-26 10:50:27.676] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:27.678] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:27.680] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:27.682] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:27.684] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:27.687] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:27.689] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:27.691] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(d1) [2015-06-26 10:50:27.695] pci dev 04:0 bar 30 size 000040000: 0f3200000
(d1) [2015-06-26 10:50:27.696] pci dev 04:0 bar 10 size 000020000: 0f3240000
(d1) [2015-06-26 10:50:27.697] pci dev 03:0 bar 30 size 000010000: 0f3260000
(d1) [2015-06-26 10:50:27.697] pci dev 05:0 bar 10 size 000002000: 0f3270004
(XEN) [2015-06-26 10:50:27.697] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(d1) [2015-06-26 10:50:27.702] pci dev 03:0 bar 14 size 000001000: 0f3272000
(d1) [2015-06-26 10:50:27.703] pci dev 02:0 bar 10 size 000000100: 00000c001
(d1) [2015-06-26 10:50:27.704] pci dev 04:0 bar 14 size 000000040: 00000c101
(d1) [2015-06-26 10:50:27.706] pci dev 01:1 bar 20 size 000000010: 00000c141
(d1) [2015-06-26 10:50:27.708] Multiprocessor initialisation:
(d1) [2015-06-26 10:50:27.734] - CPU0 ... 48-bit phys ... fixed MTRRs ... var MTRRs [1/8] ... done.
(d1) [2015-06-26 10:50:27.759] - CPU1 ... 48-bit phys ... fixed MTRRs ... var MTRRs [1/8] ... done.
(d1) [2015-06-26 10:50:27.785] - CPU2 ... 48-bit phys ... fixed MTRRs ... var MTRRs [1/8] ... done.
(d1) [2015-06-26 10:50:27.811] - CPU3 ... 48-bit phys ... fixed MTRRs ... var MTRRs [1/8] ... done.
(d1) [2015-06-26 10:50:27.811] Testing HVM environment:
(d1) [2015-06-26 10:50:27.827] - REP INSB across page boundaries ... passed
(d1) [2015-06-26 10:50:27.839] - GS base MSRs and SWAPGS ... passed
(d1) [2015-06-26 10:50:27.839] Passed 2 of 2 tests
(d1) [2015-06-26 10:50:27.839] Writing SMBIOS tables ...
(d1) [2015-06-26 10:50:27.840] Loading SeaBIOS ...
(d1) [2015-06-26 10:50:27.840] Creating MP tables ...
(d1) [2015-06-26 10:50:27.840] Loading ACPI ...
(d1) [2015-06-26 10:50:27.841] vm86 TSS at fc00a200
(d1) [2015-06-26 10:50:27.841] BIOS map:
(d1) [2015-06-26 10:50:27.841] 10000-100d3: Scratch space
(d1) [2015-06-26 10:50:27.841] c0000-fffff: Main BIOS
(d1) [2015-06-26 10:50:27.841] E820 table:
(d1) [2015-06-26 10:50:27.841] [00]: 00000000:00000000 - 00000000:000a0000: RAM
(d1) [2015-06-26 10:50:27.841] HOLE: 00000000:000a0000 - 00000000:000c0000
(d1) [2015-06-26 10:50:27.841] [01]: 00000000:000c0000 - 00000000:00100000: RESERVED
(d1) [2015-06-26 10:50:27.841] [02]: 00000000:00100000 - 00000000:3f800000: RAM
(d1) [2015-06-26 10:50:27.841] HOLE: 00000000:3f800000 - 00000000:fc000000
(d1) [2015-06-26 10:50:27.841] [03]: 00000000:fc000000 - 00000001:00000000: RESERVED
(d1) [2015-06-26 10:50:27.841] Invoking SeaBIOS ...
(d1) [2015-06-26 10:50:27.842] SeaBIOS (version rel-1.8.0-0-g4c59f5d-20150626_122101-serveerstertje)
(d1) [2015-06-26 10:50:27.842]
(d1) [2015-06-26 10:50:27.842] Found Xen hypervisor signature at 40000000
(d1) [2015-06-26 10:50:27.843] Running on QEMU (i440fx)
(d1) [2015-06-26 10:50:27.843] xen: copy e820...
(d1) [2015-06-26 10:50:27.843] Relocating init from 0x000df4c0 to 0x3f7af5a0 (size 68000)
(d1) [2015-06-26 10:50:27.845] CPU Mhz=3201
(d1) [2015-06-26 10:50:27.847] Found 9 PCI devices (max PCI bus is 00)
(d1) [2015-06-26 10:50:27.847] Allocated Xen hypercall page at 3f7ff000
(d1) [2015-06-26 10:50:27.847] Detected Xen v4.6-unstable
(d1) [2015-06-26 10:50:27.847] xen: copy BIOS tables...
(d1) [2015-06-26 10:50:27.847] Copying SMBIOS entry point from 0x00010010 to 0x000f66f0
(d1) [2015-06-26 10:50:27.847] Copying MPTABLE from 0xfc0011b0/fc0011c0 to 0x000f65d0
(d1) [2015-06-26 10:50:27.847] Copying PIR from 0x00010030 to 0x000f6550
(d1) [2015-06-26 10:50:27.847] Copying ACPI RSDP from 0x000100b0 to 0x000f6520
(d1) [2015-06-26 10:50:27.847] Using pmtimer, ioport 0xb008
(d1) [2015-06-26 10:50:27.847] Scan for VGA option rom
(d1) [2015-06-26 10:50:27.857] Running option rom at c000:0003
(XEN) [2015-06-26 10:50:27.861] stdvga.c:147:d1v0 entering stdvga and caching modes
(d1) [2015-06-26 10:50:27.883] pmm call arg1=0
(d1) [2015-06-26 10:50:27.884] Turning on vga text mode console
(d1) [2015-06-26 10:50:27.925] SeaBIOS (version rel-1.8.0-0-g4c59f5d-20150626_122101-serveerstertje)
(d1) [2015-06-26 10:50:27.931] Machine UUID afb6715a-bc31-44d8-a756-6b5390c093bd
(d1) [2015-06-26 10:50:27.932] XHCI init on dev 00:05.0: regs @ 0xf3270000, 4 ports, 32 slots, 32 byte context
(d1) [2015-06-26 10:50:27.932] s
(d1) [2015-06-26 10:50:27.932] XHCI extcap 0x1 @ f3270500
(d1) [2015-06-26 10:50:27.932] XHCI protocol USB 3.00, 2 ports (offset 1), def 0
(d1) [2015-06-26 10:50:27.932] XHCI protocol USB 2.00, 2 ports (offset 3), def 0
(d1) [2015-06-26 10:50:27.932] Found 0 lpt ports
(d1) [2015-06-26 10:50:27.932] Found 1 serial ports
(d1) [2015-06-26 10:50:27.933] ATA controller 1 at 1f0/3f4/0 (irq 14 dev 9)
(d1) [2015-06-26 10:50:27.933] ATA controller 2 at 170/374/0 (irq 15 dev 9)
(d1) [2015-06-26 10:50:27.936] ata0-0: QEMU HARDDISK ATA-7 Hard-Disk (10240 MiBytes)
(d1) [2015-06-26 10:50:27.936] Searching bootorder for: /pci@i0cf8/*@1,1/drive@0/disk@0
(d1) [2015-06-26 10:50:27.937] ata0-1: QEMU HARDDISK ATA-7 Hard-Disk (300 GiBytes)
(d1) [2015-06-26 10:50:27.937] Searching bootorder for: /pci@i0cf8/*@1,1/drive@0/disk@1
(d1) [2015-06-26 10:50:28.034] PS2 keyboard initialized
(d1) [2015-06-26 10:50:28.058] XHCI port #4: 0x00200a03, powered, enabled, pls 0, speed 2 [Low]
(d1) [2015-06-26 10:50:28.088] XHCI no devices found
(d1) [2015-06-26 10:50:28.094] All threads complete.
(d1) [2015-06-26 10:50:28.094] Scan for option roms
(d1) [2015-06-26 10:50:28.110] Running option rom at c980:0003
(d1) [2015-06-26 10:50:28.113] pmm call arg1=1
(d1) [2015-06-26 10:50:28.113] pmm call arg1=0
(d1) [2015-06-26 10:50:28.114] pmm call arg1=1
(d1) [2015-06-26 10:50:28.114] pmm call arg1=0
(d1) [2015-06-26 10:50:28.123] Searching bootorder for: /pci@i0cf8/*@4
(d1) [2015-06-26 10:50:28.123]
(d1) [2015-06-26 10:50:28.126] Press F12 for boot menu.
(d1) [2015-06-26 10:50:28.126]
(d1) [2015-06-26 10:50:30.704] Searching bootorder for: HALT
(d1) [2015-06-26 10:50:30.705] drive 0x000f64d0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=20971520
(d1) [2015-06-26 10:50:30.705] drive 0x000f64a0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=629145600
(d1) [2015-06-26 10:50:30.705]
(d1) [2015-06-26 10:50:30.706] Space available for UMB: ca800-ef000, f5f10-f64a0
(d1) [2015-06-26 10:50:30.706] Returned 253952 bytes of ZoneHigh
(d1) [2015-06-26 10:50:30.706] e820 map has 6 items:
(d1) [2015-06-26 10:50:30.706] 0: 0000000000000000 - 000000000009fc00 = 1 RAM
(d1) [2015-06-26 10:50:30.706] 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
(d1) [2015-06-26 10:50:30.706] 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
(d1) [2015-06-26 10:50:30.706] 3: 0000000000100000 - 000000003f7fe000 = 1 RAM
(d1) [2015-06-26 10:50:30.706] 4: 000000003f7fe000 - 000000003f800000 = 2 RESERVED
(d1) [2015-06-26 10:50:30.706] 5: 00000000fc000000 - 0000000100000000 = 2 RESERVED
(d1) [2015-06-26 10:50:30.710] enter handle_19:
(d1) [2015-06-26 10:50:30.710] NULL
(d1) [2015-06-26 10:50:30.723] Booting from Hard Disk...
(d1) [2015-06-26 10:50:30.726] Booting from 0000:7c00
(XEN) [2015-06-26 10:50:33.130] stdvga.c:151:d1v0 leaving stdvga
(XEN) [2015-06-26 10:50:54.674] stdvga.c:147:d1v0 entering stdvga and caching modes
(XEN) [2015-06-26 10:50:55.150] irq.c:386: Dom1 callback via changed to Direct Vector 0xf3
(XEN) [2015-06-26 10:50:57.006] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.011] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.014] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.018] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.022] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.026] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.030] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.034] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.038] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.041] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.045] memory_map:remove: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.049] memory_map:add: dom1 gfn=f3270 mfn=fe0fe nr=1
(XEN) [2015-06-26 10:50:57.056] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.058] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.060] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.063] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.065] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.067] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.069] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.071] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.076] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.078] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.080] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.082] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.084] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.086] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.088] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.091] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.095] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.097] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.099] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.101] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.103] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.105] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.107] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.109] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.114] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.116] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.118] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.120] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.122] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.124] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.126] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.128] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.132] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.135] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.137] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.139] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.141] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.143] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.145] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.147] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.152] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.154] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.156] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.158] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.160] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.162] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.164] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.166] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.170] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.173] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.175] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.177] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.179] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.181] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.184] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.186] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.190] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.192] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.194] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.196] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.199] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.201] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.203] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.205] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.209] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.211] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.213] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.215] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.218] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.220] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.222] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.224] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.228] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.230] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.232] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.235] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.237] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.239] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.241] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.243] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.247] memory_map:remove: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.249] memory_map:remove: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.252] memory_map:remove: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.254] memory_map:remove: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.256] memory_map:remove: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.258] memory_map:remove: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.260] memory_map:remove: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.262] memory_map:remove: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.267] memory_map:add: dom1 gfn=f3000 mfn=fe200 nr=40
(XEN) [2015-06-26 10:50:57.269] memory_map:add: dom1 gfn=f3040 mfn=fe240 nr=40
(XEN) [2015-06-26 10:50:57.271] memory_map:add: dom1 gfn=f3080 mfn=fe280 nr=40
(XEN) [2015-06-26 10:50:57.273] memory_map:add: dom1 gfn=f30c0 mfn=fe2c0 nr=40
(XEN) [2015-06-26 10:50:57.275] memory_map:add: dom1 gfn=f3100 mfn=fe300 nr=40
(XEN) [2015-06-26 10:50:57.278] memory_map:add: dom1 gfn=f3140 mfn=fe340 nr=40
(XEN) [2015-06-26 10:50:57.280] memory_map:add: dom1 gfn=f3180 mfn=fe380 nr=40
(XEN) [2015-06-26 10:50:57.282] memory_map:add: dom1 gfn=f31c0 mfn=fe3c0 nr=40
(XEN) [2015-06-26 10:50:57.294] irq.c:276: Dom1 PCI link 0 changed 5 -> 0
(XEN) [2015-06-26 10:50:57.301] irq.c:276: Dom1 PCI link 1 changed 10 -> 0
(XEN) [2015-06-26 10:50:57.308] irq.c:276: Dom1 PCI link 2 changed 11 -> 0
(XEN) [2015-06-26 10:50:57.315] irq.c:276: Dom1 PCI link 3 changed 5 -> 0
(XEN) [2015-06-26 10:50:57.565] traps.c:3227: GPF (0000): ffff82d0801d8402 -> ffff82d080239eec
(XEN) [2015-06-26 10:50:57.565] traps.c:3227: GPF (0000): ffff82d0801d8402 -> ffff82d080239eec
(XEN) [2015-06-26 10:50:57.565] traps.c:3227: GPF (0000): ffff82d0801d8402 -> ffff82d080239eec
(XEN) [2015-06-26 10:50:57.565] traps.c:3227: GPF (0000): ffff82d0801d8402 -> ffff82d080239eec
(XEN) [2015-06-26 10:50:58.030] grant_table.c:1486:d1v2 Expanding dom (1) grant table from (4) to (5) frames.
(XEN) [2015-06-26 10:52:49.756] grant_table.c:1486:d1v1 Expanding dom (1) grant table from (5) to (6) frames.
[-- Attachment #3: Type: text/plain, Size: 126 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-26 11:02 ` linux
@ 2015-06-26 12:41 ` Jan Beulich
[not found] ` <7313712fe189fd010bfb65d62df37527@eikelenboom.it>
0 siblings, 1 reply; 23+ messages in thread
From: Jan Beulich @ 2015-06-26 12:41 UTC (permalink / raw)
To: linux; +Cc: andrew.cooper3, xen-devel
>>> On 26.06.15 at 13:02, <linux@eikelenboom.it> wrote:
> Strange, i don't see *any* of your printk's being hit ... (xl dmesg
> attached).
So does the guest (in the working case) use MSI-X at all for the
device? I.e. it might be worth comparing the guest's /proc/interrupts
from both cases, as the lack of any of the debug messages clearly
suggests that such interrupts aren#t being set up.
Jan
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
[not found] ` <7313712fe189fd010bfb65d62df37527@eikelenboom.it>
@ 2015-06-26 15:04 ` Jan Beulich
2015-06-26 15:16 ` Konrad Rzeszutek Wilk
` (2 more replies)
0 siblings, 3 replies; 23+ messages in thread
From: Jan Beulich @ 2015-06-26 15:04 UTC (permalink / raw)
To: linux; +Cc: xen-devel
(re-adding xen-devel)
>>> On 26.06.15 at 15:38, <linux@eikelenboom.it> wrote:
> On 2015-06-26 14:41, Jan Beulich wrote:
>>>>> On 26.06.15 at 13:02, <linux@eikelenboom.it> wrote:
>>> Strange, i don't see *any* of your printk's being hit ... (xl dmesg
>>> attached).
>>
>> So does the guest (in the working case) use MSI-X at all for the
>> device? I.e. it might be worth comparing the guest's /proc/interrupts
>> from both cases, as the lack of any of the debug messages clearly
>> suggests that such interrupts aren#t being set up.
>
> In the good case it uses one of them.
> (probably one per port and it has only one usb device connected at
> present)
>
> --
> Sander
>
> CPU0 CPU1 CPU2 CPU3
> 0: 42 0 0 0 IO-APIC 2-edge timer
>[...]
> 83: 8 0 0 0 xen-dyn-event eth0-q3-rx
> 84: 2101 0 0 0 xen-pirq-msi-x xhci_hcd
I think this explains it - you're running in PVHVM mode, which I
never tried with those patches. I'd even have to go dig to see how
they drive MSI-X in the first place in that case. Nor do I immediately
know whether there's an option to make a guest become a normal
HVM one again.
Jan
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-26 15:04 ` Jan Beulich
@ 2015-06-26 15:16 ` Konrad Rzeszutek Wilk
2015-06-26 15:43 ` Jan Beulich
2015-06-26 15:20 ` linux
2015-06-26 15:22 ` Jan Beulich
2 siblings, 1 reply; 23+ messages in thread
From: Konrad Rzeszutek Wilk @ 2015-06-26 15:16 UTC (permalink / raw)
To: Jan Beulich; +Cc: linux, xen-devel
On Fri, Jun 26, 2015 at 04:04:30PM +0100, Jan Beulich wrote:
> (re-adding xen-devel)
>
> >>> On 26.06.15 at 15:38, <linux@eikelenboom.it> wrote:
> > On 2015-06-26 14:41, Jan Beulich wrote:
> >>>>> On 26.06.15 at 13:02, <linux@eikelenboom.it> wrote:
> >>> Strange, i don't see *any* of your printk's being hit ... (xl dmesg
> >>> attached).
> >>
> >> So does the guest (in the working case) use MSI-X at all for the
> >> device? I.e. it might be worth comparing the guest's /proc/interrupts
> >> from both cases, as the lack of any of the debug messages clearly
> >> suggests that such interrupts aren#t being set up.
> >
> > In the good case it uses one of them.
> > (probably one per port and it has only one usb device connected at
> > present)
> >
> > --
> > Sander
> >
> > CPU0 CPU1 CPU2 CPU3
> > 0: 42 0 0 0 IO-APIC 2-edge timer
> >[...]
> > 83: 8 0 0 0 xen-dyn-event eth0-q3-rx
> > 84: 2101 0 0 0 xen-pirq-msi-x xhci_hcd
>
> I think this explains it - you're running in PVHVM mode, which I
> never tried with those patches. I'd even have to go dig to see how
> they drive MSI-X in the first place in that case. Nor do I immediately
> know whether there's an option to make a guest become a normal
> HVM one again.
xen_nopv
>
> Jan
>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-26 15:04 ` Jan Beulich
2015-06-26 15:16 ` Konrad Rzeszutek Wilk
@ 2015-06-26 15:20 ` linux
2015-06-26 15:42 ` Jan Beulich
2015-06-26 15:22 ` Jan Beulich
2 siblings, 1 reply; 23+ messages in thread
From: linux @ 2015-06-26 15:20 UTC (permalink / raw)
To: Jan Beulich; +Cc: xen-devel
On 2015-06-26 17:04, Jan Beulich wrote:
> (re-adding xen-devel)
>
Sorry mist the reply-all button.
>>>> On 26.06.15 at 15:38, <linux@eikelenboom.it> wrote:
>> On 2015-06-26 14:41, Jan Beulich wrote:
>>>>>> On 26.06.15 at 13:02, <linux@eikelenboom.it> wrote:
>>>> Strange, i don't see *any* of your printk's being hit ... (xl dmesg
>>>> attached).
>>>
>>> So does the guest (in the working case) use MSI-X at all for the
>>> device? I.e. it might be worth comparing the guest's /proc/interrupts
>>> from both cases, as the lack of any of the debug messages clearly
>>> suggests that such interrupts aren#t being set up.
>>
>> In the good case it uses one of them.
>> (probably one per port and it has only one usb device connected at
>> present)
>>
>> --
>> Sander
>>
>> CPU0 CPU1 CPU2 CPU3
>> 0: 42 0 0 0 IO-APIC 2-edge
>> timer
>> [...]
>> 83: 8 0 0 0 xen-dyn-event
>> eth0-q3-rx
>> 84: 2101 0 0 0 xen-pirq-msi-x
>> xhci_hcd
>
> I think this explains it - you're running in PVHVM mode, which I
> never tried with those patches. I'd even have to go dig to see how
> they drive MSI-X in the first place in that case. Nor do I immediately
> know whether there's an option to make a guest become a normal
> HVM one again.
>
> Jan
Hmm i had to read up on the difference ..
http://wiki.xen.org/wiki/Virtualization_Spectrum#Paravirtualizing_little_by_little:_PVHVM_mode
But doesn't it almost always do that on linux guests (since most kernels
will have need Xen stuff enabled) ?
--
Sander
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-26 15:04 ` Jan Beulich
2015-06-26 15:16 ` Konrad Rzeszutek Wilk
2015-06-26 15:20 ` linux
@ 2015-06-26 15:22 ` Jan Beulich
2015-06-26 15:48 ` linux
2015-06-29 11:46 ` Stefano Stabellini
2 siblings, 2 replies; 23+ messages in thread
From: Jan Beulich @ 2015-06-26 15:22 UTC (permalink / raw)
To: linux; +Cc: xen-devel, Stefano Stabellini
>>> On 26.06.15 at 17:04, <JBeulich@suse.com> wrote:
>>>> On 26.06.15 at 15:38, <linux@eikelenboom.it> wrote:
>> On 2015-06-26 14:41, Jan Beulich wrote:
>>>>>> On 26.06.15 at 13:02, <linux@eikelenboom.it> wrote:
>>>> Strange, i don't see *any* of your printk's being hit ... (xl dmesg
>>>> attached).
>>>
>>> So does the guest (in the working case) use MSI-X at all for the
>>> device? I.e. it might be worth comparing the guest's /proc/interrupts
>>> from both cases, as the lack of any of the debug messages clearly
>>> suggests that such interrupts aren#t being set up.
>>
>> In the good case it uses one of them.
>> (probably one per port and it has only one usb device connected at
>> present)
>>
>> --
>> Sander
>>
>> CPU0 CPU1 CPU2 CPU3
>> 0: 42 0 0 0 IO-APIC 2-edge
> timer
>>[...]
>> 83: 8 0 0 0 xen-dyn-event eth0-q3-rx
>> 84: 2101 0 0 0 xen-pirq-msi-x xhci_hcd
>
> I think this explains it - you're running in PVHVM mode, which I
> never tried with those patches. I'd even have to go dig to see how
> they drive MSI-X in the first place in that case.
I have an idea: In
static unsigned int startup_msi_irq(struct irq_desc *desc)
{
bool_t guest_masked = (desc->status & IRQ_GUEST) &&
is_hvm_domain(desc->msi_desc->dev->domain);
if ( unlikely(!msi_set_mask_bit(desc, 0, guest_masked)) )
WARN();
return 0;
}
I think we need to also exclude the emuirq case (which is what I
understand backs the pvhvm interrupt in the guest - Stefano,
please confirm). For testing purposes, could you try simply passing
zero instead of guest_masked here?
Jan
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-26 15:20 ` linux
@ 2015-06-26 15:42 ` Jan Beulich
0 siblings, 0 replies; 23+ messages in thread
From: Jan Beulich @ 2015-06-26 15:42 UTC (permalink / raw)
To: linux; +Cc: xen-devel
>>> On 26.06.15 at 17:20, <linux@eikelenboom.it> wrote:
> On 2015-06-26 17:04, Jan Beulich wrote:
>> I think this explains it - you're running in PVHVM mode, which I
>> never tried with those patches. I'd even have to go dig to see how
>> they drive MSI-X in the first place in that case. Nor do I immediately
>> know whether there's an option to make a guest become a normal
>> HVM one again.
>
> Hmm i had to read up on the difference ..
> http://wiki.xen.org/wiki/Virtualization_Spectrum#Paravirtualizing_little_by_
> little:_PVHVM_mode
>
> But doesn't it almost always do that on linux guests (since most kernels
> will have need Xen stuff enabled) ?
No on ours, which (still) aren't pv-ops based.
Jan
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-26 15:16 ` Konrad Rzeszutek Wilk
@ 2015-06-26 15:43 ` Jan Beulich
0 siblings, 0 replies; 23+ messages in thread
From: Jan Beulich @ 2015-06-26 15:43 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: linux, xen-devel
>>> On 26.06.15 at 17:16, <konrad.wilk@oracle.com> wrote:
> On Fri, Jun 26, 2015 at 04:04:30PM +0100, Jan Beulich wrote:
>> I think this explains it - you're running in PVHVM mode, which I
>> never tried with those patches. I'd even have to go dig to see how
>> they drive MSI-X in the first place in that case. Nor do I immediately
>> know whether there's an option to make a guest become a normal
>> HVM one again.
>
> xen_nopv
I had found this, but couldn't convince myself it would affect the
way IRQs get set up and handled.
Jan
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-26 15:22 ` Jan Beulich
@ 2015-06-26 15:48 ` linux
2015-07-07 16:08 ` Jan Beulich
2015-06-29 11:46 ` Stefano Stabellini
1 sibling, 1 reply; 23+ messages in thread
From: linux @ 2015-06-26 15:48 UTC (permalink / raw)
To: Jan Beulich; +Cc: xen-devel, Stefano Stabellini
On 2015-06-26 17:22, Jan Beulich wrote:
>>>> On 26.06.15 at 17:04, <JBeulich@suse.com> wrote:
>>>>> On 26.06.15 at 15:38, <linux@eikelenboom.it> wrote:
>>> On 2015-06-26 14:41, Jan Beulich wrote:
>>>>>>> On 26.06.15 at 13:02, <linux@eikelenboom.it> wrote:
>>>>> Strange, i don't see *any* of your printk's being hit ... (xl dmesg
>>>>> attached).
>>>>
>>>> So does the guest (in the working case) use MSI-X at all for the
>>>> device? I.e. it might be worth comparing the guest's
>>>> /proc/interrupts
>>>> from both cases, as the lack of any of the debug messages clearly
>>>> suggests that such interrupts aren#t being set up.
>>>
>>> In the good case it uses one of them.
>>> (probably one per port and it has only one usb device connected at
>>> present)
>>>
>>> --
>>> Sander
>>>
>>> CPU0 CPU1 CPU2 CPU3
>>> 0: 42 0 0 0 IO-APIC 2-edge
>> timer
>>> [...]
>>> 83: 8 0 0 0 xen-dyn-event
>>> eth0-q3-rx
>>> 84: 2101 0 0 0 xen-pirq-msi-x
>>> xhci_hcd
>>
>> I think this explains it - you're running in PVHVM mode, which I
>> never tried with those patches. I'd even have to go dig to see how
>> they drive MSI-X in the first place in that case.
>
> I have an idea: In
>
> static unsigned int startup_msi_irq(struct irq_desc *desc)
> {
> bool_t guest_masked = (desc->status & IRQ_GUEST) &&
> is_hvm_domain(desc->msi_desc->dev->domain);
>
> if ( unlikely(!msi_set_mask_bit(desc, 0, guest_masked)) )
> WARN();
> return 0;
> }
>
> I think we need to also exclude the emuirq case (which is what I
> understand backs the pvhvm interrupt in the guest - Stefano,
> please confirm). For testing purposes, could you try simply passing
> zero instead of guest_masked here?
>
> Jan
I can confirm, with 0 it works !
--
Sander
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-26 15:22 ` Jan Beulich
2015-06-26 15:48 ` linux
@ 2015-06-29 11:46 ` Stefano Stabellini
2015-07-06 10:17 ` Jan Beulich
1 sibling, 1 reply; 23+ messages in thread
From: Stefano Stabellini @ 2015-06-29 11:46 UTC (permalink / raw)
To: Jan Beulich; +Cc: linux, xen-devel, Stefano Stabellini
On Fri, 26 Jun 2015, Jan Beulich wrote:
> >>> On 26.06.15 at 17:04, <JBeulich@suse.com> wrote:
> >>>> On 26.06.15 at 15:38, <linux@eikelenboom.it> wrote:
> >> On 2015-06-26 14:41, Jan Beulich wrote:
> >>>>>> On 26.06.15 at 13:02, <linux@eikelenboom.it> wrote:
> >>>> Strange, i don't see *any* of your printk's being hit ... (xl dmesg
> >>>> attached).
> >>>
> >>> So does the guest (in the working case) use MSI-X at all for the
> >>> device? I.e. it might be worth comparing the guest's /proc/interrupts
> >>> from both cases, as the lack of any of the debug messages clearly
> >>> suggests that such interrupts aren#t being set up.
> >>
> >> In the good case it uses one of them.
> >> (probably one per port and it has only one usb device connected at
> >> present)
> >>
> >> --
> >> Sander
> >>
> >> CPU0 CPU1 CPU2 CPU3
> >> 0: 42 0 0 0 IO-APIC 2-edge
> > timer
> >>[...]
> >> 83: 8 0 0 0 xen-dyn-event eth0-q3-rx
> >> 84: 2101 0 0 0 xen-pirq-msi-x xhci_hcd
> >
> > I think this explains it - you're running in PVHVM mode, which I
> > never tried with those patches. I'd even have to go dig to see how
> > they drive MSI-X in the first place in that case.
>
> I have an idea: In
>
> static unsigned int startup_msi_irq(struct irq_desc *desc)
> {
> bool_t guest_masked = (desc->status & IRQ_GUEST) &&
> is_hvm_domain(desc->msi_desc->dev->domain);
>
> if ( unlikely(!msi_set_mask_bit(desc, 0, guest_masked)) )
> WARN();
> return 0;
> }
>
> I think we need to also exclude the emuirq case (which is what I
> understand backs the pvhvm interrupt in the guest - Stefano,
> please confirm). For testing purposes, could you try simply passing
> zero instead of guest_masked here?
emuirq is an irq (or msi) that is generated by an emulated device.
Obviously a guest cannot tell whether a device is emulated or
passthrough, as a consequence when the guest remaps irqs (and msis) into
event channels (arch/x86/pci/xen.c:acpi_register_gsi_xen_hvm and
arch/x86/pci/xen.c:xen_hvm_setup_msi_irqs), some of the irqs (and msis)
might actually be emulated.
Xen uses the concept of "emuirq" to distinguish irqs (and msis) of a
passthrough device from those belonging to an emulated device. However
you should know that in a default configuration, without virtio, there
are no emulated msis. Maybe emuirqs are not really the problem here.
In the case of passthrough devices that generate MSI-X, the guest remaps
MSIs into event channels by writing a magic number and the desired pirq
in the MSI-X table (xen_hvm_setup_msi_irqs), then QEMU retrieves the
pirq and calls xc_physdev_map_pirq_msi & friends on its behalf.
Afterwards Linux uses the regular xen_pirq_chip functions to
enable/disable the pirq. Specifically masking the MSI, is done by
masking the event channel.
In the quoted function above, if the issue is finding out whether the
msi is masked from the guest point of view, then you also need to check
if it has been remapped into an event channel (you can use
domain_irq_to_pirq for that), then check its status.
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-29 11:46 ` Stefano Stabellini
@ 2015-07-06 10:17 ` Jan Beulich
0 siblings, 0 replies; 23+ messages in thread
From: Jan Beulich @ 2015-07-06 10:17 UTC (permalink / raw)
To: Stefano Stabellini; +Cc: linux, xen-devel
>>> On 29.06.15 at 13:46, <stefano.stabellini@eu.citrix.com> wrote:
> On Fri, 26 Jun 2015, Jan Beulich wrote:
>> >>> On 26.06.15 at 17:04, <JBeulich@suse.com> wrote:
>> >>>> On 26.06.15 at 15:38, <linux@eikelenboom.it> wrote:
>> >> On 2015-06-26 14:41, Jan Beulich wrote:
>> >>>>>> On 26.06.15 at 13:02, <linux@eikelenboom.it> wrote:
>> >>>> Strange, i don't see *any* of your printk's being hit ... (xl dmesg
>> >>>> attached).
>> >>>
>> >>> So does the guest (in the working case) use MSI-X at all for the
>> >>> device? I.e. it might be worth comparing the guest's /proc/interrupts
>> >>> from both cases, as the lack of any of the debug messages clearly
>> >>> suggests that such interrupts aren#t being set up.
>> >>
>> >> In the good case it uses one of them.
>> >> (probably one per port and it has only one usb device connected at
>> >> present)
>> >>
>> >> --
>> >> Sander
>> >>
>> >> CPU0 CPU1 CPU2 CPU3
>> >> 0: 42 0 0 0 IO-APIC 2-edge
>> > timer
>> >>[...]
>> >> 83: 8 0 0 0 xen-dyn-event eth0-q3-rx
>> >> 84: 2101 0 0 0 xen-pirq-msi-x xhci_hcd
>> >
>> > I think this explains it - you're running in PVHVM mode, which I
>> > never tried with those patches. I'd even have to go dig to see how
>> > they drive MSI-X in the first place in that case.
>>
>> I have an idea: In
>>
>> static unsigned int startup_msi_irq(struct irq_desc *desc)
>> {
>> bool_t guest_masked = (desc->status & IRQ_GUEST) &&
>> is_hvm_domain(desc->msi_desc->dev->domain);
>>
>> if ( unlikely(!msi_set_mask_bit(desc, 0, guest_masked)) )
>> WARN();
>> return 0;
>> }
>>
>> I think we need to also exclude the emuirq case (which is what I
>> understand backs the pvhvm interrupt in the guest - Stefano,
>> please confirm). For testing purposes, could you try simply passing
>> zero instead of guest_masked here?
>
> emuirq is an irq (or msi) that is generated by an emulated device.
>
> Obviously a guest cannot tell whether a device is emulated or
> passthrough, as a consequence when the guest remaps irqs (and msis) into
> event channels (arch/x86/pci/xen.c:acpi_register_gsi_xen_hvm and
> arch/x86/pci/xen.c:xen_hvm_setup_msi_irqs), some of the irqs (and msis)
> might actually be emulated.
>
> Xen uses the concept of "emuirq" to distinguish irqs (and msis) of a
> passthrough device from those belonging to an emulated device. However
> you should know that in a default configuration, without virtio, there
> are no emulated msis. Maybe emuirqs are not really the problem here.
>
> In the case of passthrough devices that generate MSI-X, the guest remaps
> MSIs into event channels by writing a magic number and the desired pirq
> in the MSI-X table (xen_hvm_setup_msi_irqs), then QEMU retrieves the
> pirq and calls xc_physdev_map_pirq_msi & friends on its behalf.
> Afterwards Linux uses the regular xen_pirq_chip functions to
> enable/disable the pirq. Specifically masking the MSI, is done by
> masking the event channel.
>
> In the quoted function above, if the issue is finding out whether the
> msi is masked from the guest point of view, then you also need to check
> if it has been remapped into an event channel (you can use
> domain_irq_to_pirq for that), then check its status.
No, the question isn't whether the IRQ is masked from guest's pov,
but whether it should start out masked from the perspective of MSI
emulation code (i.e. whether the guest would subsequently be
expected to unmask it not just by unmasking an associated event
channel). I'll have to check whether domain_irq_to_pirq() can be
used for that at this point in time.
Jan
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-06-26 15:48 ` linux
@ 2015-07-07 16:08 ` Jan Beulich
2015-07-08 8:37 ` Sander Eikelenboom
0 siblings, 1 reply; 23+ messages in thread
From: Jan Beulich @ 2015-07-07 16:08 UTC (permalink / raw)
To: linux; +Cc: xen-devel, Stefano Stabellini
[-- Attachment #1: Type: text/plain, Size: 3535 bytes --]
>>> On 26.06.15 at 17:48, <linux@eikelenboom.it> wrote:
> On 2015-06-26 17:22, Jan Beulich wrote:
>> I have an idea: In
>>
>> static unsigned int startup_msi_irq(struct irq_desc *desc)
>> {
>> bool_t guest_masked = (desc->status & IRQ_GUEST) &&
>> is_hvm_domain(desc->msi_desc->dev->domain);
>>
>> if ( unlikely(!msi_set_mask_bit(desc, 0, guest_masked)) )
>> WARN();
>> return 0;
>> }
>>
>> I think we need to also exclude the emuirq case (which is what I
>> understand backs the pvhvm interrupt in the guest - Stefano,
>> please confirm). For testing purposes, could you try simply passing
>> zero instead of guest_masked here?
>
> I can confirm, with 0 it works !
Okay, here's something that hopefully could go in (provided of
course it too works for you).
Jan
--- unstable.orig/xen/arch/x86/irq.c 2015-07-07 17:56:52.000000000 +0200
+++ unstable/xen/arch/x86/irq.c 2015-07-07 17:04:08.000000000 +0200
@@ -2502,6 +2502,25 @@ int unmap_domain_pirq_emuirq(struct doma
return ret;
}
+void arch_evtchn_bind_pirq(struct domain *d, int pirq)
+{
+ int irq = domain_pirq_to_irq(d, pirq);
+ struct irq_desc *desc;
+ unsigned long flags;
+
+ if ( irq <= 0 )
+ return;
+
+ if ( is_hvm_domain(d) )
+ map_domain_emuirq_pirq(d, pirq, IRQ_PT);
+
+ desc = irq_to_desc(irq);
+ spin_lock_irqsave(&desc->lock, flags);
+ if ( desc->msi_desc )
+ guest_mask_msi_irq(desc, 0);
+ spin_unlock_irqrestore(&desc->lock, flags);
+}
+
bool_t hvm_domain_use_pirq(const struct domain *d, const struct pirq *pirq)
{
return is_hvm_domain(d) && pirq &&
--- unstable.orig/xen/arch/x86/msi.c 2015-07-07 17:56:53.000000000 +0200
+++ unstable/xen/arch/x86/msi.c 2015-07-07 16:50:02.000000000 +0200
@@ -422,10 +422,7 @@ void guest_mask_msi_irq(struct irq_desc
static unsigned int startup_msi_irq(struct irq_desc *desc)
{
- bool_t guest_masked = (desc->status & IRQ_GUEST) &&
- is_hvm_domain(desc->msi_desc->dev->domain);
-
- msi_set_mask_bit(desc, 0, guest_masked);
+ msi_set_mask_bit(desc, 0, !!(desc->status & IRQ_GUEST));
return 0;
}
--- unstable.orig/xen/common/event_channel.c 2015-07-07 17:56:51.000000000 +0200
+++ unstable/xen/common/event_channel.c 2015-07-07 16:53:47.000000000 +0200
@@ -456,10 +456,7 @@ static long evtchn_bind_pirq(evtchn_bind
bind->port = port;
-#ifdef CONFIG_X86
- if ( is_hvm_domain(d) && domain_pirq_to_irq(d, pirq) > 0 )
- map_domain_emuirq_pirq(d, pirq, IRQ_PT);
-#endif
+ arch_evtchn_bind_pirq(d, pirq);
out:
spin_unlock(&d->event_lock);
--- unstable.orig/xen/include/asm-arm/irq.h 2015-07-07 17:56:49.000000000 +0200
+++ unstable/xen/include/asm-arm/irq.h 2015-07-07 17:02:00.000000000 +0200
@@ -48,6 +48,8 @@ int release_guest_irq(struct domain *d,
void arch_move_irqs(struct vcpu *v);
+#define arch_evtchn_bind_pirq(d, pirq) ((void)((d) + (pirq)))
+
/* Set IRQ type for an SPI */
int irq_set_spi_type(unsigned int spi, unsigned int type);
--- unstable.orig/xen/include/xen/irq.h 2015-07-07 17:56:49.000000000 +0200
+++ unstable/xen/include/xen/irq.h 2015-07-07 17:02:49.000000000 +0200
@@ -172,4 +172,8 @@ unsigned int set_desc_affinity(struct ir
unsigned int arch_hwdom_irqs(domid_t);
#endif
+#ifndef arch_evtchn_bind_pirq
+void arch_evtchn_bind_pirq(struct domain *, int pirq);
+#endif
+
#endif /* __XEN_IRQ_H__ */
[-- Attachment #2: x86-MSI-pv-unmask.patch --]
[-- Type: text/plain, Size: 2689 bytes --]
--- unstable.orig/xen/arch/x86/irq.c 2015-07-07 17:56:52.000000000 +0200
+++ unstable/xen/arch/x86/irq.c 2015-07-07 17:04:08.000000000 +0200
@@ -2502,6 +2502,25 @@ int unmap_domain_pirq_emuirq(struct doma
return ret;
}
+void arch_evtchn_bind_pirq(struct domain *d, int pirq)
+{
+ int irq = domain_pirq_to_irq(d, pirq);
+ struct irq_desc *desc;
+ unsigned long flags;
+
+ if ( irq <= 0 )
+ return;
+
+ if ( is_hvm_domain(d) )
+ map_domain_emuirq_pirq(d, pirq, IRQ_PT);
+
+ desc = irq_to_desc(irq);
+ spin_lock_irqsave(&desc->lock, flags);
+ if ( desc->msi_desc )
+ guest_mask_msi_irq(desc, 0);
+ spin_unlock_irqrestore(&desc->lock, flags);
+}
+
bool_t hvm_domain_use_pirq(const struct domain *d, const struct pirq *pirq)
{
return is_hvm_domain(d) && pirq &&
--- unstable.orig/xen/arch/x86/msi.c 2015-07-07 17:56:53.000000000 +0200
+++ unstable/xen/arch/x86/msi.c 2015-07-07 16:50:02.000000000 +0200
@@ -422,10 +422,7 @@ void guest_mask_msi_irq(struct irq_desc
static unsigned int startup_msi_irq(struct irq_desc *desc)
{
- bool_t guest_masked = (desc->status & IRQ_GUEST) &&
- is_hvm_domain(desc->msi_desc->dev->domain);
-
- msi_set_mask_bit(desc, 0, guest_masked);
+ msi_set_mask_bit(desc, 0, !!(desc->status & IRQ_GUEST));
return 0;
}
--- unstable.orig/xen/common/event_channel.c 2015-07-07 17:56:51.000000000 +0200
+++ unstable/xen/common/event_channel.c 2015-07-07 16:53:47.000000000 +0200
@@ -456,10 +456,7 @@ static long evtchn_bind_pirq(evtchn_bind
bind->port = port;
-#ifdef CONFIG_X86
- if ( is_hvm_domain(d) && domain_pirq_to_irq(d, pirq) > 0 )
- map_domain_emuirq_pirq(d, pirq, IRQ_PT);
-#endif
+ arch_evtchn_bind_pirq(d, pirq);
out:
spin_unlock(&d->event_lock);
--- unstable.orig/xen/include/asm-arm/irq.h 2015-07-07 17:56:49.000000000 +0200
+++ unstable/xen/include/asm-arm/irq.h 2015-07-07 17:02:00.000000000 +0200
@@ -48,6 +48,8 @@ int release_guest_irq(struct domain *d,
void arch_move_irqs(struct vcpu *v);
+#define arch_evtchn_bind_pirq(d, pirq) ((void)((d) + (pirq)))
+
/* Set IRQ type for an SPI */
int irq_set_spi_type(unsigned int spi, unsigned int type);
--- unstable.orig/xen/include/xen/irq.h 2015-07-07 17:56:49.000000000 +0200
+++ unstable/xen/include/xen/irq.h 2015-07-07 17:02:49.000000000 +0200
@@ -172,4 +172,8 @@ unsigned int set_desc_affinity(struct ir
unsigned int arch_hwdom_irqs(domid_t);
#endif
+#ifndef arch_evtchn_bind_pirq
+void arch_evtchn_bind_pirq(struct domain *, int pirq);
+#endif
+
#endif /* __XEN_IRQ_H__ */
[-- Attachment #3: Type: text/plain, Size: 126 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately
2015-07-07 16:08 ` Jan Beulich
@ 2015-07-08 8:37 ` Sander Eikelenboom
0 siblings, 0 replies; 23+ messages in thread
From: Sander Eikelenboom @ 2015-07-08 8:37 UTC (permalink / raw)
To: Jan Beulich; +Cc: xen-devel, Stefano Stabellini
Tuesday, July 7, 2015, 6:08:25 PM, you wrote:
>>>> On 26.06.15 at 17:48, <linux@eikelenboom.it> wrote:
>> On 2015-06-26 17:22, Jan Beulich wrote:
>>> I have an idea: In
>>>
>>> static unsigned int startup_msi_irq(struct irq_desc *desc)
>>> {
>>> bool_t guest_masked = (desc->status & IRQ_GUEST) &&
>>> is_hvm_domain(desc->msi_desc->dev->domain);
>>>
>>> if ( unlikely(!msi_set_mask_bit(desc, 0, guest_masked)) )
>>> WARN();
>>> return 0;
>>> }
>>>
>>> I think we need to also exclude the emuirq case (which is what I
>>> understand backs the pvhvm interrupt in the guest - Stefano,
>>> please confirm). For testing purposes, could you try simply passing
>>> zero instead of guest_masked here?
>>
>> I can confirm, with 0 it works !
> Okay, here's something that hopefully could go in (provided of
> course it too works for you).
Hi Jan,
Just tested and it works fine :-)
--
Sander
> Jan
> --- unstable.orig/xen/arch/x86/irq.c 2015-07-07 17:56:52.000000000 +0200
> +++ unstable/xen/arch/x86/irq.c 2015-07-07 17:04:08.000000000 +0200
> @@ -2502,6 +2502,25 @@ int unmap_domain_pirq_emuirq(struct doma
> return ret;
> }
>
> +void arch_evtchn_bind_pirq(struct domain *d, int pirq)
> +{
> + int irq = domain_pirq_to_irq(d, pirq);
> + struct irq_desc *desc;
> + unsigned long flags;
> +
> + if ( irq <= 0 )
> + return;
> +
> + if ( is_hvm_domain(d) )
> + map_domain_emuirq_pirq(d, pirq, IRQ_PT);
> +
> + desc = irq_to_desc(irq);
> + spin_lock_irqsave(&desc->lock, flags);
+ if ( desc->>msi_desc )
> + guest_mask_msi_irq(desc, 0);
> + spin_unlock_irqrestore(&desc->lock, flags);
> +}
> +
> bool_t hvm_domain_use_pirq(const struct domain *d, const struct pirq *pirq)
> {
> return is_hvm_domain(d) && pirq &&
> --- unstable.orig/xen/arch/x86/msi.c 2015-07-07 17:56:53.000000000 +0200
> +++ unstable/xen/arch/x86/msi.c 2015-07-07 16:50:02.000000000 +0200
> @@ -422,10 +422,7 @@ void guest_mask_msi_irq(struct irq_desc
>
> static unsigned int startup_msi_irq(struct irq_desc *desc)
> {
> - bool_t guest_masked = (desc->status & IRQ_GUEST) &&
> - is_hvm_domain(desc->msi_desc->dev->domain);
> -
> - msi_set_mask_bit(desc, 0, guest_masked);
> + msi_set_mask_bit(desc, 0, !!(desc->status & IRQ_GUEST));
> return 0;
> }
>
> --- unstable.orig/xen/common/event_channel.c 2015-07-07 17:56:51.000000000 +0200
> +++ unstable/xen/common/event_channel.c 2015-07-07 16:53:47.000000000 +0200
> @@ -456,10 +456,7 @@ static long evtchn_bind_pirq(evtchn_bind
>
> bind->port = port;
>
> -#ifdef CONFIG_X86
> - if ( is_hvm_domain(d) && domain_pirq_to_irq(d, pirq) > 0 )
> - map_domain_emuirq_pirq(d, pirq, IRQ_PT);
> -#endif
> + arch_evtchn_bind_pirq(d, pirq);
>
> out:
> spin_unlock(&d->event_lock);
> --- unstable.orig/xen/include/asm-arm/irq.h 2015-07-07 17:56:49.000000000 +0200
> +++ unstable/xen/include/asm-arm/irq.h 2015-07-07 17:02:00.000000000 +0200
> @@ -48,6 +48,8 @@ int release_guest_irq(struct domain *d,
>
> void arch_move_irqs(struct vcpu *v);
>
> +#define arch_evtchn_bind_pirq(d, pirq) ((void)((d) + (pirq)))
> +
> /* Set IRQ type for an SPI */
> int irq_set_spi_type(unsigned int spi, unsigned int type);
>
> --- unstable.orig/xen/include/xen/irq.h 2015-07-07 17:56:49.000000000 +0200
> +++ unstable/xen/include/xen/irq.h 2015-07-07 17:02:49.000000000 +0200
> @@ -172,4 +172,8 @@ unsigned int set_desc_affinity(struct ir
> unsigned int arch_hwdom_irqs(domid_t);
> #endif
>
> +#ifndef arch_evtchn_bind_pirq
> +void arch_evtchn_bind_pirq(struct domain *, int pirq);
> +#endif
> +
> #endif /* __XEN_IRQ_H__ */
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2015-07-08 8:37 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz / follow: Atom feed)
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2015-06-24 19:38 Xen-unstable: pci-passthrough of device using MSI-X interrupts not working after commit x86/MSI: track host and guest masking separately Sander Eikelenboom
2015-06-25 8:48 ` Jan Beulich
2015-06-25 10:51 ` Sander Eikelenboom
2015-06-25 11:29 ` Jan Beulich
2015-06-25 12:02 ` Sander Eikelenboom
2015-06-25 12:40 ` Jan Beulich
2015-06-25 13:16 ` Sander Eikelenboom
2015-06-25 13:37 ` Jan Beulich
2015-06-25 13:42 ` linux
2015-06-26 9:56 ` Jan Beulich
2015-06-26 11:02 ` linux
2015-06-26 12:41 ` Jan Beulich
[not found] ` <7313712fe189fd010bfb65d62df37527@eikelenboom.it>
2015-06-26 15:04 ` Jan Beulich
2015-06-26 15:16 ` Konrad Rzeszutek Wilk
2015-06-26 15:43 ` Jan Beulich
2015-06-26 15:20 ` linux
2015-06-26 15:42 ` Jan Beulich
2015-06-26 15:22 ` Jan Beulich
2015-06-26 15:48 ` linux
2015-07-07 16:08 ` Jan Beulich
2015-07-08 8:37 ` Sander Eikelenboom
2015-06-29 11:46 ` Stefano Stabellini
2015-07-06 10:17 ` Jan Beulich
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