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From: Pu Wen <puwen@hygon.cn>
To: xen-devel@lists.xenproject.org
Cc: "Pu Wen" <puwen@hygon.cn>,
	"Roger Pau Monné" <roger.pau@citrix.com>,
	"Wei Liu" <wei.liu2@citrix.com>,
	"Jan Beulich" <jbeulich@suse.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>
Subject: [PATCH v5 08/15] x86/acpi: Add Hygon Dhyana support
Date: Thu, 4 Apr 2019 21:46:52 +0800	[thread overview]
Message-ID: <897064c54f7bef6c996217494232806dd05f11e9.1554382869.git.puwen@hygon.cn> (raw)
In-Reply-To: <cover.1554382869.git.puwen@hygon.cn>

Add Hygon Dhyana support to the acpi cpufreq and cpuidle subsystems by
using the code path of AMD.

Signed-off-by: Pu Wen <puwen@hygon.cn>
Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/acpi/cpu_idle.c         | 3 ++-
 xen/arch/x86/acpi/cpufreq/cpufreq.c  | 8 +++++---
 xen/arch/x86/acpi/cpufreq/powernow.c | 3 ++-
 3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
index 654de24..02e4873 100644
--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -796,7 +796,8 @@ void acpi_dead_idle(void)
             __mwait(cx->address, 0);
         }
     }
-    else if ( current_cpu_data.x86_vendor == X86_VENDOR_AMD &&
+    else if ( (current_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+               current_cpu_data.x86_vendor == X86_VENDOR_HYGON) &&
               cx->entry_method == ACPI_CSTATE_EM_SYSIO )
     {
         /* Intel prefers not to use SYSIO */
diff --git a/xen/arch/x86/acpi/cpufreq/cpufreq.c b/xen/arch/x86/acpi/cpufreq/cpufreq.c
index 844ab85..14c18bd 100644
--- a/xen/arch/x86/acpi/cpufreq/cpufreq.c
+++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c
@@ -649,7 +649,8 @@ static int __init cpufreq_driver_init(void)
         (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL))
         ret = cpufreq_register_driver(&acpi_cpufreq_driver);
     else if ((cpufreq_controller == FREQCTL_xen) &&
-        (boot_cpu_data.x86_vendor == X86_VENDOR_AMD))
+        (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+         boot_cpu_data.x86_vendor == X86_VENDOR_HYGON))
         ret = powernow_register_driver();
 
     return ret;
@@ -660,9 +661,10 @@ int cpufreq_cpu_init(unsigned int cpuid)
 {
     int ret;
 
-    /* Currently we only handle Intel and AMD processor */
+    /* Currently we only handle Intel, AMD and Hygon processor */
     if ( (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) ||
-         (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) )
+         (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) ||
+         (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON ) )
         ret = cpufreq_add_cpu(cpuid);
     else
         ret = -EFAULT;
diff --git a/xen/arch/x86/acpi/cpufreq/powernow.c b/xen/arch/x86/acpi/cpufreq/powernow.c
index 025b37d..f245908 100644
--- a/xen/arch/x86/acpi/cpufreq/powernow.c
+++ b/xen/arch/x86/acpi/cpufreq/powernow.c
@@ -360,7 +360,8 @@ unsigned int __init powernow_register_driver()
 
     for_each_online_cpu(i) {
         struct cpuinfo_x86 *c = &cpu_data[i];
-        if (c->x86_vendor != X86_VENDOR_AMD)
+        if (c->x86_vendor != X86_VENDOR_AMD &&
+            c->x86_vendor != X86_VENDOR_HYGON)
             ret = -ENODEV;
         else
         {
-- 
2.7.4


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  parent reply	other threads:[~2019-04-04 13:50 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-04 13:44 [PATCH v5 00/15] Add support for Hygon Dhyana Family 18h processor Pu Wen
2019-04-04 13:45 ` [PATCH v5 01/15] x86/cpu: Create Hygon Dhyana architecture support file Pu Wen
2019-04-04 14:02   ` Andrew Cooper
2019-04-04 16:39     ` Pu Wen
2019-04-05  7:49       ` Jan Beulich
2019-04-05  7:49         ` [Xen-devel] " Jan Beulich
2019-04-12 16:14         ` Pu Wen
2019-04-12 16:14           ` [Xen-devel] " Pu Wen
2019-04-17 15:03           ` Wei Liu
2019-04-17 15:03             ` [Xen-devel] " Wei Liu
2019-04-18  2:15             ` Pu Wen
2019-04-18  2:15               ` [Xen-devel] " Pu Wen
2019-04-18  9:14               ` Wei Liu
2019-04-18  9:14                 ` [Xen-devel] " Wei Liu
2019-04-04 13:45 ` [PATCH v5 02/15] x86/cpu: Fix common cpuid faulting probing for AMD and Hygon Pu Wen
2019-04-04 13:45 ` [PATCH v5 03/15] x86/cpu/mtrr: Add Hygon Dhyana support to get TOP_MEM2 Pu Wen
2019-04-04 13:46 ` [PATCH v5 04/15] x86/cpu/vpmu: Add Hygon Dhyana and AMD Zen support for vPMU Pu Wen
2019-04-04 13:46 ` [PATCH v5 05/15] x86/cpu/mce: Add Hygon Dhyana support to the MCA infrastructure Pu Wen
2019-04-04 13:46 ` [PATCH v5 06/15] x86/spec_ctrl: Add Hygon Dhyana to the respective mitigation machinery Pu Wen
2019-04-04 13:46 ` [PATCH v5 07/15] x86/apic: Add Hygon Dhyana support Pu Wen
2019-04-04 13:46 ` Pu Wen [this message]
2019-04-04 13:47 ` [PATCH v5 09/15] x86/iommu: " Pu Wen
2019-04-04 13:47 ` [PATCH v5 10/15] x86/pv: Add Hygon Dhyana support to emulate MSRs access Pu Wen
2019-04-04 13:47 ` [PATCH v5 11/15] x86/domain: Add Hygon Dhyana support Pu Wen
2019-04-04 13:47 ` [PATCH v5 12/15] x86/domctl: " Pu Wen
2019-04-04 13:47 ` [PATCH v5 13/15] x86/traps: " Pu Wen
2019-04-04 13:48 ` [PATCH v5 14/15] x86/cpuid: " Pu Wen
2019-04-04 13:48 ` [PATCH v5 15/15] tools/libxc: " Pu Wen
2019-04-04 16:26   ` Wei Liu
2019-04-04 16:40     ` Pu Wen
2019-04-04 13:53 ` [PATCH v5 00/15] Add support for Hygon Dhyana Family 18h processor Julien Grall
2019-04-04 16:47   ` Pu Wen
2019-04-04 17:00     ` Julien Grall
2019-06-06 16:31 ` [Xen-devel] " Andrew Cooper
     [not found] ` <201906070115.x571Fd9j014046@spam1.hygon.cn>
2019-06-07 15:54   ` Pu Wen
2019-06-12 15:10   ` Pu Wen
2019-06-12 15:58     ` Andrew Cooper

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