From: Stefano Stabellini <sstabellini@kernel.org>
To: Julien Grall <julien.grall@arm.com>
Cc: sstabellini@kernel.org, steve.capper@arm.com,
shankerd@codeaurora.org, xen-devel@lists.xen.org
Subject: Re: [PATCH v2 2/9] xen/arm: gic: Do not configure affinity during routing
Date: Tue, 19 Jul 2016 16:08:09 -0700 (PDT) [thread overview]
Message-ID: <alpine.DEB.2.10.1607191608010.6667@sstabellini-ThinkPad-X260> (raw)
In-Reply-To: <1468513325-29492-3-git-send-email-julien.grall@arm.com>
On Thu, 14 Jul 2016, Julien Grall wrote:
> The affinity of a guest IRQ is set every time the guest enable it (see
> vgic_enable_irqs).
>
> It is not necessary to set the affinity when the IRQ is routed to the
> guest because Xen will never receive the IRQ until it hass been enabled
> by the guest.
>
> To keep gic_route_irq_to_{xen,guest} behaving the same way (i.e just
> setting up the routing), the affinity of IRQ routed to Xen is moved into
> __setup_irq.
>
> Signed-off-by: Julien grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> ---
> Changes in v2:
> - Patch renamed
> - Set the affinity for IRQ routed to Xen in __setup_irq
> ---
> xen/arch/arm/gic.c | 11 +++--------
> xen/arch/arm/irq.c | 4 ++--
> xen/include/asm-arm/gic.h | 3 +--
> 3 files changed, 6 insertions(+), 12 deletions(-)
>
> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
> index 5726a05..bc814a0 100644
> --- a/xen/arch/arm/gic.c
> +++ b/xen/arch/arm/gic.c
> @@ -97,24 +97,19 @@ void gic_restore_state(struct vcpu *v)
> }
>
> /*
> - * needs to be called with a valid cpu_mask, ie each cpu in the mask has
> - * already called gic_cpu_init
> * - desc.lock must be held
> * - arch.type must be valid (i.e != IRQ_TYPE_INVALID)
> */
> static void gic_set_irq_properties(struct irq_desc *desc,
> - const cpumask_t *cpu_mask,
> unsigned int priority)
> {
> gic_hw_ops->set_irq_properties(desc, priority);
> - desc->handler->set_affinity(desc, cpu_mask);
> }
>
> /* Program the GIC to route an interrupt to the host (i.e. Xen)
> * - needs to be called with desc.lock held
> */
> -void gic_route_irq_to_xen(struct irq_desc *desc, const cpumask_t *cpu_mask,
> - unsigned int priority)
> +void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
> {
> ASSERT(priority <= 0xff); /* Only 8 bits of priority */
> ASSERT(desc->irq < gic_number_lines());/* Can't route interrupts that don't exist */
> @@ -123,7 +118,7 @@ void gic_route_irq_to_xen(struct irq_desc *desc, const cpumask_t *cpu_mask,
>
> desc->handler = gic_hw_ops->gic_host_irq_type;
>
> - gic_set_irq_properties(desc, cpu_mask, priority);
> + gic_set_irq_properties(desc, priority);
> }
>
> /* Program the GIC to route an interrupt to a guest
> @@ -155,7 +150,7 @@ int gic_route_irq_to_guest(struct domain *d, unsigned int virq,
> desc->handler = gic_hw_ops->gic_guest_irq_type;
> set_bit(_IRQ_GUEST, &desc->status);
>
> - gic_set_irq_properties(desc, cpumask_of(v_target->processor), priority);
> + gic_set_irq_properties(desc, priority);
>
> p->desc = desc;
> res = 0;
> diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
> index 2f8af72..3fc22f2 100644
> --- a/xen/arch/arm/irq.c
> +++ b/xen/arch/arm/irq.c
> @@ -370,6 +370,7 @@ int setup_irq(unsigned int irq, unsigned int irqflags, struct irqaction *new)
> /* First time the IRQ is setup */
> if ( disabled )
> {
> + gic_route_irq_to_xen(desc, GIC_PRI_IRQ);
> /* It's fine to use smp_processor_id() because:
> * For PPI: irq_desc is banked
> * For SPI: we don't care for now which CPU will receive the
> @@ -377,8 +378,7 @@ int setup_irq(unsigned int irq, unsigned int irqflags, struct irqaction *new)
> * TODO: Handle case where SPI is setup on different CPU than
> * the targeted CPU and the priority.
> */
> - gic_route_irq_to_xen(desc, cpumask_of(smp_processor_id()),
> - GIC_PRI_IRQ);
> + irq_set_affinity(desc, cpumask_of(smp_processor_id()));
> desc->handler->startup(desc);
> }
>
> diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
> index 2fc6126..7ba3846 100644
> --- a/xen/include/asm-arm/gic.h
> +++ b/xen/include/asm-arm/gic.h
> @@ -223,8 +223,7 @@ enum gic_version {
> extern enum gic_version gic_hw_version(void);
>
> /* Program the GIC to route an interrupt */
> -extern void gic_route_irq_to_xen(struct irq_desc *desc, const cpumask_t *cpu_mask,
> - unsigned int priority);
> +extern void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority);
> extern int gic_route_irq_to_guest(struct domain *, unsigned int virq,
> struct irq_desc *desc,
> unsigned int priority);
> --
> 1.9.1
>
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next prev parent reply other threads:[~2016-07-19 23:08 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-14 16:21 [PATCH v2 0/9] xen/arm: Support SPIs routing Julien Grall
2016-07-14 16:21 ` [PATCH v2 1/9] xen/arm: gic: Consolidate the IRQ affinity set in a single place Julien Grall
2016-07-14 16:21 ` [PATCH v2 2/9] xen/arm: gic: Do not configure affinity during routing Julien Grall
2016-07-19 23:08 ` Stefano Stabellini [this message]
2016-07-14 16:21 ` [PATCH v2 3/9] xen/arm: gic: split set_irq_properties Julien Grall
2016-07-14 16:22 ` [PATCH v2 4/9] xen/arm: gic: set_type: Pass the type in parameter rather than in desc->arch.type Julien Grall
2016-07-19 23:11 ` Stefano Stabellini
2016-07-14 16:22 ` [PATCH v2 5/9] xen/arm: gic: Document how gic_set_irq_type should be called Julien Grall
2016-07-14 16:22 ` [PATCH v2 6/9] Revert "xen/arm: warn the user that we cannot route SPIs to Dom0 on ACPI" Julien Grall
2016-07-14 16:24 ` Julien Grall
2016-07-14 16:22 ` [PATCH v2 7/9] xen/arm: Allow DOM0 to set the IRQ type Julien Grall
2016-07-19 23:43 ` Stefano Stabellini
2016-07-20 8:38 ` Julien Grall
2016-07-20 17:20 ` Stefano Stabellini
2016-07-14 16:22 ` [PATCH v2 8/9] xen/arm: acpi: route all unused IRQs to DOM0 Julien Grall
2016-07-19 23:49 ` Stefano Stabellini
2016-07-14 16:22 ` [PATCH v2 9/9] xen/arm: Fix coding style and update comment in acpi_route_spis Julien Grall
2016-07-19 23:46 ` Stefano Stabellini
2016-07-14 18:17 ` [PATCH v2 0/9] xen/arm: Support SPIs routing Shanker Donthineni
2016-07-27 13:30 ` Julien Grall
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