From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Petre Pircalabu" <ppircalabu@bitdefender.com>,
"Kevin Tian" <kevin.tian@intel.com>,
"Tamas K Lengyel" <tamas@tklengyel.com>,
"Razvan Cojocaru" <rcojocaru@bitdefender.com>,
"Wei Liu" <wl@xen.org>, "Paul Durrant" <paul@xen.org>,
"George Dunlap" <George.Dunlap@eu.citrix.com>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Suravee Suthikulpanit" <suravee.suthikulpanit@amd.com>,
"Jun Nakajima" <jun.nakajima@intel.com>,
"Alexandru Isaila" <aisaila@bitdefender.com>,
"Boris Ostrovsky" <boris.ostrovsky@oracle.com>,
"Roger Pau Monné" <roger.pau@citrix.com>
Subject: [Xen-devel] [PATCH v3 3/5] x86/HVM: move NOFLUSH handling out of hvm_set_cr3()
Date: Wed, 25 Sep 2019 17:25:14 +0200 [thread overview]
Message-ID: <b461a8a6-8a36-4cec-341a-7730f249b3c4@suse.com> (raw)
In-Reply-To: <3ce4ab2c-8cb6-1482-6ce9-3d5b019e10c1@suse.com>
The bit is meaningful only for MOV-to-CR3 insns, not anywhere else, in
particular not when loading nested guest state.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul@xen.org>
---
v3: Further restrict "noflush" local variable scopes. Remove (now
redundant) zapping of X86_CR3_NOFLUSH from hvm_monitor_cr().
---
xen/arch/x86/hvm/emulate.c | 8 +++++++-
xen/arch/x86/hvm/hvm.c | 20 ++++++++++----------
xen/arch/x86/hvm/monitor.c | 3 ---
xen/arch/x86/hvm/svm/nestedsvm.c | 6 +++---
xen/arch/x86/hvm/vm_event.c | 2 +-
xen/arch/x86/hvm/vmx/vvmx.c | 4 ++--
xen/include/asm-x86/domain.h | 2 ++
xen/include/asm-x86/hvm/support.h | 2 +-
8 files changed, 26 insertions(+), 21 deletions(-)
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -2123,8 +2123,14 @@ static int hvmemul_write_cr(
break;
case 3:
- rc = hvm_set_cr3(val, true);
+ {
+ bool noflush = hvm_pcid_enabled(current) && (val & X86_CR3_NOFLUSH);
+
+ if ( noflush )
+ val &= ~X86_CR3_NOFLUSH;
+ rc = hvm_set_cr3(val, noflush, true);
break;
+ }
case 4:
rc = hvm_set_cr4(val, true);
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -2076,8 +2076,14 @@ int hvm_mov_to_cr(unsigned int cr, unsig
break;
case 3:
- rc = hvm_set_cr3(val, true);
+ {
+ bool noflush = hvm_pcid_enabled(curr) && (val & X86_CR3_NOFLUSH);
+
+ if ( noflush )
+ val &= ~X86_CR3_NOFLUSH;
+ rc = hvm_set_cr3(val, noflush, true);
break;
+ }
case 4:
rc = hvm_set_cr4(val, true);
@@ -2294,12 +2300,11 @@ int hvm_set_cr0(unsigned long value, boo
return X86EMUL_OKAY;
}
-int hvm_set_cr3(unsigned long value, bool may_defer)
+int hvm_set_cr3(unsigned long value, bool noflush, bool may_defer)
{
struct vcpu *v = current;
struct page_info *page;
unsigned long old = v->arch.hvm.guest_cr[3];
- bool noflush = false;
if ( may_defer && unlikely(v->domain->arch.monitor.write_ctrlreg_enabled &
monitor_ctrlreg_bitmask(VM_EVENT_X86_CR3)) )
@@ -2311,17 +2316,12 @@ int hvm_set_cr3(unsigned long value, boo
/* The actual write will occur in hvm_do_resume(), if permitted. */
v->arch.vm_event->write_data.do_write.cr3 = 1;
v->arch.vm_event->write_data.cr3 = value;
+ v->arch.vm_event->write_data.cr3_noflush = noflush;
return X86EMUL_OKAY;
}
}
- if ( hvm_pcid_enabled(v) ) /* Clear the noflush bit. */
- {
- noflush = value & X86_CR3_NOFLUSH;
- value &= ~X86_CR3_NOFLUSH;
- }
-
if ( hvm_paging_enabled(v) && !paging_mode_hap(v->domain) &&
((value ^ v->arch.hvm.guest_cr[3]) >> PAGE_SHIFT) )
{
@@ -3016,7 +3016,7 @@ void hvm_task_switch(
if ( task_switch_load_seg(x86_seg_ldtr, tss.ldt, new_cpl, 0) )
goto out;
- rc = hvm_set_cr3(tss.cr3, true);
+ rc = hvm_set_cr3(tss.cr3, false, true);
if ( rc == X86EMUL_EXCEPTION )
hvm_inject_hw_exception(TRAP_gp_fault, 0);
if ( rc != X86EMUL_OKAY )
--- a/xen/arch/x86/hvm/monitor.c
+++ b/xen/arch/x86/hvm/monitor.c
@@ -38,9 +38,6 @@ bool hvm_monitor_cr(unsigned int index,
struct arch_domain *ad = &curr->domain->arch;
unsigned int ctrlreg_bitmask = monitor_ctrlreg_bitmask(index);
- if ( index == VM_EVENT_X86_CR3 && hvm_pcid_enabled(curr) )
- value &= ~X86_CR3_NOFLUSH; /* Clear the noflush bit. */
-
if ( (ad->monitor.write_ctrlreg_enabled & ctrlreg_bitmask) &&
(!(ad->monitor.write_ctrlreg_onchangeonly & ctrlreg_bitmask) ||
value != old) &&
--- a/xen/arch/x86/hvm/svm/nestedsvm.c
+++ b/xen/arch/x86/hvm/svm/nestedsvm.c
@@ -324,7 +324,7 @@ static int nsvm_vcpu_hostrestore(struct
v->arch.guest_table = pagetable_null();
/* hvm_set_cr3() below sets v->arch.hvm.guest_cr[3] for us. */
}
- rc = hvm_set_cr3(n1vmcb->_cr3, true);
+ rc = hvm_set_cr3(n1vmcb->_cr3, false, true);
if ( rc == X86EMUL_EXCEPTION )
hvm_inject_hw_exception(TRAP_gp_fault, 0);
if (rc != X86EMUL_OKAY)
@@ -584,7 +584,7 @@ static int nsvm_vmcb_prepare4vmrun(struc
nestedsvm_vmcb_set_nestedp2m(v, ns_vmcb, n2vmcb);
/* hvm_set_cr3() below sets v->arch.hvm.guest_cr[3] for us. */
- rc = hvm_set_cr3(ns_vmcb->_cr3, true);
+ rc = hvm_set_cr3(ns_vmcb->_cr3, false, true);
if ( rc == X86EMUL_EXCEPTION )
hvm_inject_hw_exception(TRAP_gp_fault, 0);
if (rc != X86EMUL_OKAY)
@@ -598,7 +598,7 @@ static int nsvm_vmcb_prepare4vmrun(struc
* we assume it intercepts page faults.
*/
/* hvm_set_cr3() below sets v->arch.hvm.guest_cr[3] for us. */
- rc = hvm_set_cr3(ns_vmcb->_cr3, true);
+ rc = hvm_set_cr3(ns_vmcb->_cr3, false, true);
if ( rc == X86EMUL_EXCEPTION )
hvm_inject_hw_exception(TRAP_gp_fault, 0);
if (rc != X86EMUL_OKAY)
--- a/xen/arch/x86/hvm/vm_event.c
+++ b/xen/arch/x86/hvm/vm_event.c
@@ -110,7 +110,7 @@ void hvm_vm_event_do_resume(struct vcpu
if ( unlikely(w->do_write.cr3) )
{
- if ( hvm_set_cr3(w->cr3, false) == X86EMUL_EXCEPTION )
+ if ( hvm_set_cr3(w->cr3, w->cr3_noflush, false) == X86EMUL_EXCEPTION )
hvm_inject_hw_exception(TRAP_gp_fault, 0);
w->do_write.cr3 = 0;
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -1032,7 +1032,7 @@ static void load_shadow_guest_state(stru
if ( rc == X86EMUL_EXCEPTION )
hvm_inject_hw_exception(TRAP_gp_fault, 0);
- rc = hvm_set_cr3(get_vvmcs(v, GUEST_CR3), true);
+ rc = hvm_set_cr3(get_vvmcs(v, GUEST_CR3), false, true);
if ( rc == X86EMUL_EXCEPTION )
hvm_inject_hw_exception(TRAP_gp_fault, 0);
@@ -1246,7 +1246,7 @@ static void load_vvmcs_host_state(struct
if ( rc == X86EMUL_EXCEPTION )
hvm_inject_hw_exception(TRAP_gp_fault, 0);
- rc = hvm_set_cr3(get_vvmcs(v, HOST_CR3), true);
+ rc = hvm_set_cr3(get_vvmcs(v, HOST_CR3), false, true);
if ( rc == X86EMUL_EXCEPTION )
hvm_inject_hw_exception(TRAP_gp_fault, 0);
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -274,6 +274,8 @@ struct monitor_write_data {
unsigned int cr4 : 1;
} do_write;
+ bool cr3_noflush;
+
uint32_t msr;
uint64_t value;
uint64_t cr0;
--- a/xen/include/asm-x86/hvm/support.h
+++ b/xen/include/asm-x86/hvm/support.h
@@ -136,7 +136,7 @@ void hvm_shadow_handle_cd(struct vcpu *v
*/
int hvm_set_efer(uint64_t value);
int hvm_set_cr0(unsigned long value, bool may_defer);
-int hvm_set_cr3(unsigned long value, bool may_defer);
+int hvm_set_cr3(unsigned long value, bool noflush, bool may_defer);
int hvm_set_cr4(unsigned long value, bool may_defer);
int hvm_descriptor_access_intercept(uint64_t exit_info,
uint64_t vmx_exit_qualification,
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
next prev parent reply other threads:[~2019-09-25 15:25 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-25 15:19 [Xen-devel] [PATCH v3 0/5] (remaining) XSA-292 follow-up Jan Beulich
2019-09-25 15:23 ` [Xen-devel] [PATCH v3 1/5] x86: suppress XPTI-related TLB flushes when possible Jan Beulich
2020-05-18 17:09 ` Roger Pau Monné
2020-05-19 7:55 ` Jan Beulich
2020-05-19 9:15 ` Roger Pau Monné
2020-05-19 9:45 ` Jan Beulich
2020-05-22 11:00 ` Andrew Cooper
2020-05-22 11:13 ` Roger Pau Monné
2020-05-22 11:58 ` Andrew Cooper
2020-05-22 11:42 ` Jan Beulich
2019-09-25 15:23 ` [Xen-devel] [PATCH v3 2/5] x86/mm: honor opt_pcid also for 32-bit PV domains Jan Beulich
2020-05-22 11:40 ` Andrew Cooper
2019-09-25 15:25 ` Jan Beulich [this message]
2020-05-22 10:40 ` [PATCH v3 3/5] x86/HVM: move NOFLUSH handling out of hvm_set_cr3() Andrew Cooper
2019-09-25 15:25 ` [Xen-devel] [PATCH v3 4/5] x86/HVM: refuse CR3 loads with reserved (upper) bits set Jan Beulich
2019-09-25 15:26 ` [Xen-devel] [PATCH v3 5/5] x86/HVM: cosmetics to hvm_set_cr3() Jan Beulich
2020-04-28 7:59 ` Ping: [PATCH v3 0/5] (remaining) XSA-292 follow-up Jan Beulich
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=b461a8a6-8a36-4cec-341a-7730f249b3c4@suse.com \
--to=jbeulich@suse.com \
--cc=George.Dunlap@eu.citrix.com \
--cc=aisaila@bitdefender.com \
--cc=andrew.cooper3@citrix.com \
--cc=boris.ostrovsky@oracle.com \
--cc=jun.nakajima@intel.com \
--cc=kevin.tian@intel.com \
--cc=paul@xen.org \
--cc=ppircalabu@bitdefender.com \
--cc=rcojocaru@bitdefender.com \
--cc=roger.pau@citrix.com \
--cc=suravee.suthikulpanit@amd.com \
--cc=tamas@tklengyel.com \
--cc=wl@xen.org \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).