* [XEN PATCH v2 1/7] xen/spinlock: address violations of MISRA C Rule 20.7
2024-03-08 11:20 [XEN PATCH v2 0/7] address some violations of MISRA C Rule 20.7 Nicola Vetrini
@ 2024-03-08 11:20 ` Nicola Vetrini
2024-03-09 1:23 ` Stefano Stabellini
2024-03-08 11:20 ` [XEN PATCH v2 2/7] xen/include: " Nicola Vetrini
` (5 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Nicola Vetrini @ 2024-03-08 11:20 UTC (permalink / raw)
To: nicola.vetrini, xen-devel
Cc: sstabellini, michal.orzel, xenia.ragiadakou, ayan.kumar.halder,
consulting, bertrand.marquis, julien, Andrew Cooper,
George Dunlap, Jan Beulich, Wei Liu
MISRA C Rule 20.7 states: "Expressions resulting from the expansion
of macro parameters shall be enclosed in parentheses". Therefore, some
macro definitions should gain additional parentheses to ensure that all
current and future users will be safe with respect to expansions that
can possibly alter the semantics of the passed-in macro parameter.
No functional change.
Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
---
xen/include/xen/spinlock.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/include/xen/spinlock.h b/xen/include/xen/spinlock.h
index 1cd9120eac7a..0e6a083dfb9e 100644
--- a/xen/include/xen/spinlock.h
+++ b/xen/include/xen/spinlock.h
@@ -94,7 +94,7 @@ struct lock_profile_qhead {
int32_t idx; /* index for printout */
};
-#define _LOCK_PROFILE(lockname) { .name = #lockname, .lock = &lockname, }
+#define _LOCK_PROFILE(lockname) { .name = #lockname, .lock = &(lockname), }
#define _LOCK_PROFILE_PTR(name) \
static struct lock_profile * const __lock_profile_##name \
__used_section(".lockprofile.data") = \
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [XEN PATCH v2 1/7] xen/spinlock: address violations of MISRA C Rule 20.7
2024-03-08 11:20 ` [XEN PATCH v2 1/7] xen/spinlock: address " Nicola Vetrini
@ 2024-03-09 1:23 ` Stefano Stabellini
0 siblings, 0 replies; 17+ messages in thread
From: Stefano Stabellini @ 2024-03-09 1:23 UTC (permalink / raw)
To: Nicola Vetrini
Cc: xen-devel, sstabellini, michal.orzel, xenia.ragiadakou,
ayan.kumar.halder, consulting, bertrand.marquis, julien,
Andrew Cooper, George Dunlap, Jan Beulich, Wei Liu
On Fri, 8 Mar 2024, Nicola Vetrini wrote:
> MISRA C Rule 20.7 states: "Expressions resulting from the expansion
> of macro parameters shall be enclosed in parentheses". Therefore, some
> macro definitions should gain additional parentheses to ensure that all
> current and future users will be safe with respect to expansions that
> can possibly alter the semantics of the passed-in macro parameter.
>
> No functional change.
>
> Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [XEN PATCH v2 2/7] xen/include: address violations of MISRA C Rule 20.7
2024-03-08 11:20 [XEN PATCH v2 0/7] address some violations of MISRA C Rule 20.7 Nicola Vetrini
2024-03-08 11:20 ` [XEN PATCH v2 1/7] xen/spinlock: address " Nicola Vetrini
@ 2024-03-08 11:20 ` Nicola Vetrini
2024-03-09 1:26 ` Stefano Stabellini
2024-03-08 11:21 ` [XEN PATCH v2 3/7] xen/list: " Nicola Vetrini
` (4 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Nicola Vetrini @ 2024-03-08 11:20 UTC (permalink / raw)
To: nicola.vetrini, xen-devel
Cc: sstabellini, michal.orzel, xenia.ragiadakou, ayan.kumar.halder,
consulting, bertrand.marquis, julien, Andrew Cooper,
George Dunlap, Jan Beulich, Wei Liu
MISRA C Rule 20.7 states: "Expressions resulting from the expansion
of macro parameters shall be enclosed in parentheses". Therefore, some
macro definitions should gain additional parentheses to ensure that all
current and future users will be safe with respect to expansions that
can possibly alter the semantics of the passed-in macro parameter.
No functional change.
Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
---
Changes in v2:
- split from an earlier patch
---
xen/include/xen/bug.h | 2 +-
xen/include/xen/init.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/xen/include/xen/bug.h b/xen/include/xen/bug.h
index 2c45c462fc63..77fe1e1ba840 100644
--- a/xen/include/xen/bug.h
+++ b/xen/include/xen/bug.h
@@ -80,7 +80,7 @@ struct bug_frame {
[bf_type] "i" (type), \
[bf_ptr] "i" (ptr), \
[bf_msg] "i" (msg), \
- [bf_line_lo] "i" ((line & ((1 << BUG_LINE_LO_WIDTH) - 1)) \
+ [bf_line_lo] "i" (((line) & ((1 << BUG_LINE_LO_WIDTH) - 1)) \
<< BUG_DISP_WIDTH), \
[bf_line_hi] "i" (((line) >> BUG_LINE_LO_WIDTH) << BUG_DISP_WIDTH)
diff --git a/xen/include/xen/init.h b/xen/include/xen/init.h
index 1d7c0216bc80..0a4223833755 100644
--- a/xen/include/xen/init.h
+++ b/xen/include/xen/init.h
@@ -63,9 +63,9 @@ typedef int (*initcall_t)(void);
typedef void (*exitcall_t)(void);
#define presmp_initcall(fn) \
- const static initcall_t __initcall_##fn __init_call("presmp") = fn
+ const static initcall_t __initcall_##fn __init_call("presmp") = (fn)
#define __initcall(fn) \
- const static initcall_t __initcall_##fn __init_call("1") = fn
+ const static initcall_t __initcall_##fn __init_call("1") = (fn)
#define __exitcall(fn) \
static exitcall_t __exitcall_##fn __exit_call = fn
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [XEN PATCH v2 2/7] xen/include: address violations of MISRA C Rule 20.7
2024-03-08 11:20 ` [XEN PATCH v2 2/7] xen/include: " Nicola Vetrini
@ 2024-03-09 1:26 ` Stefano Stabellini
0 siblings, 0 replies; 17+ messages in thread
From: Stefano Stabellini @ 2024-03-09 1:26 UTC (permalink / raw)
To: Nicola Vetrini
Cc: xen-devel, sstabellini, michal.orzel, xenia.ragiadakou,
ayan.kumar.halder, consulting, bertrand.marquis, julien,
Andrew Cooper, George Dunlap, Jan Beulich, Wei Liu
On Fri, 8 Mar 2024, Nicola Vetrini wrote:
> MISRA C Rule 20.7 states: "Expressions resulting from the expansion
> of macro parameters shall be enclosed in parentheses". Therefore, some
> macro definitions should gain additional parentheses to ensure that all
> current and future users will be safe with respect to expansions that
> can possibly alter the semantics of the passed-in macro parameter.
>
> No functional change.
>
> Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [XEN PATCH v2 3/7] xen/list: address violations of MISRA C Rule 20.7
2024-03-08 11:20 [XEN PATCH v2 0/7] address some violations of MISRA C Rule 20.7 Nicola Vetrini
2024-03-08 11:20 ` [XEN PATCH v2 1/7] xen/spinlock: address " Nicola Vetrini
2024-03-08 11:20 ` [XEN PATCH v2 2/7] xen/include: " Nicola Vetrini
@ 2024-03-08 11:21 ` Nicola Vetrini
2024-03-09 1:29 ` Stefano Stabellini
2024-03-11 7:48 ` Jan Beulich
2024-03-08 11:21 ` [XEN PATCH v2 4/7] xen/param: " Nicola Vetrini
` (3 subsequent siblings)
6 siblings, 2 replies; 17+ messages in thread
From: Nicola Vetrini @ 2024-03-08 11:21 UTC (permalink / raw)
To: nicola.vetrini, xen-devel
Cc: sstabellini, michal.orzel, xenia.ragiadakou, ayan.kumar.halder,
consulting, bertrand.marquis, julien, Andrew Cooper,
George Dunlap, Jan Beulich, Wei Liu
MISRA C Rule 20.7 states: "Expressions resulting from the expansion
of macro parameters shall be enclosed in parentheses". Therefore, some
macro definitions should gain additional parentheses to ensure that all
current and future users will be safe with respect to expansions that
can possibly alter the semantics of the passed-in macro parameter.
No functional change.
Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
---
Changes in v2:
- changes to list.h are all in this patch;
- Parenthesized some instances of "pos" and "n" even when already
covered by the deviation on the lhs of an assingment for consistency.
---
xen/include/xen/list.h | 83 +++++++++++++++++++++---------------------
1 file changed, 41 insertions(+), 42 deletions(-)
diff --git a/xen/include/xen/list.h b/xen/include/xen/list.h
index b5eab3a1eb6c..27cafcce2c82 100644
--- a/xen/include/xen/list.h
+++ b/xen/include/xen/list.h
@@ -479,9 +479,9 @@ static inline void list_splice_init(struct list_head *list,
* @n: another &struct list_head to use as temporary storage
* @head: the head for your list.
*/
-#define list_for_each_backwards_safe(pos, n, head) \
- for ( pos = (head)->prev, n = pos->prev; pos != (head); \
- pos = n, n = pos->prev )
+#define list_for_each_backwards_safe(pos, n, head) \
+ for ( (pos) = (head)->prev, n = (pos)->prev; (pos) != (head); \
+ (pos) = n, n = (pos)->prev )
/**
* list_for_each_entry - iterate over list of given type
@@ -490,9 +490,9 @@ static inline void list_splice_init(struct list_head *list,
* @member: the name of the list_struct within the struct.
*/
#define list_for_each_entry(pos, head, member) \
- for (pos = list_entry((head)->next, typeof(*pos), member); \
- &pos->member != (head); \
- pos = list_entry(pos->member.next, typeof(*pos), member))
+ for ((pos) = list_entry((head)->next, typeof(*(pos)), member); \
+ &(pos)->member != (head); \
+ (pos) = list_entry((pos)->member.next, typeof(*(pos)), member))
/**
* list_for_each_entry_reverse - iterate backwards over list of given type.
@@ -501,9 +501,9 @@ static inline void list_splice_init(struct list_head *list,
* @member: the name of the list_struct within the struct.
*/
#define list_for_each_entry_reverse(pos, head, member) \
- for (pos = list_entry((head)->prev, typeof(*pos), member); \
- &pos->member != (head); \
- pos = list_entry(pos->member.prev, typeof(*pos), member))
+ for ((pos) = list_entry((head)->prev, typeof(*(pos)), member); \
+ &(pos)->member != (head); \
+ (pos) = list_entry((pos)->member.prev, typeof(*(pos)), member))
/**
* list_prepare_entry - prepare a pos entry for use in
@@ -516,7 +516,7 @@ static inline void list_splice_init(struct list_head *list,
* list_for_each_entry_continue.
*/
#define list_prepare_entry(pos, head, member) \
- ((pos) ? : list_entry(head, typeof(*pos), member))
+ ((pos) ? : list_entry(head, typeof(*(pos)), member))
/**
* list_for_each_entry_continue - continue iteration over list of given type
@@ -527,10 +527,10 @@ static inline void list_splice_init(struct list_head *list,
* Continue to iterate over list of given type, continuing after
* the current position.
*/
-#define list_for_each_entry_continue(pos, head, member) \
- for (pos = list_entry(pos->member.next, typeof(*pos), member); \
- &pos->member != (head); \
- pos = list_entry(pos->member.next, typeof(*pos), member))
+#define list_for_each_entry_continue(pos, head, member) \
+ for ((pos) = list_entry((pos)->member.next, typeof(*(pos)), member); \
+ &(pos)->member != (head); \
+ (pos) = list_entry((pos)->member.next, typeof(*(pos)), member))
/**
* list_for_each_entry_from - iterate over list of given type from the
@@ -542,8 +542,8 @@ static inline void list_splice_init(struct list_head *list,
* Iterate over list of given type, continuing from current position.
*/
#define list_for_each_entry_from(pos, head, member) \
- for (; &pos->member != (head); \
- pos = list_entry(pos->member.next, typeof(*pos), member))
+ for (; &(pos)->member != (head); \
+ (pos) = list_entry((pos)->member.next, typeof(*(pos)), member))
/**
* list_for_each_entry_safe - iterate over list of given type safe
@@ -554,10 +554,10 @@ static inline void list_splice_init(struct list_head *list,
* @member: the name of the list_struct within the struct.
*/
#define list_for_each_entry_safe(pos, n, head, member) \
- for (pos = list_entry((head)->next, typeof(*pos), member), \
- n = list_entry(pos->member.next, typeof(*pos), member); \
- &pos->member != (head); \
- pos = n, n = list_entry(n->member.next, typeof(*n), member))
+ for ((pos) = list_entry((head)->next, typeof(*(pos)), member), \
+ (n) = list_entry((pos)->member.next, typeof(*(pos)), member); \
+ &(pos)->member != (head); \
+ (pos) = (n), (n) = list_entry((n)->member.next, typeof(*(n)), member))
/**
* list_for_each_entry_safe_continue
@@ -569,11 +569,11 @@ static inline void list_splice_init(struct list_head *list,
* Iterate over list of given type, continuing after current point,
* safe against removal of list entry.
*/
-#define list_for_each_entry_safe_continue(pos, n, head, member) \
- for (pos = list_entry(pos->member.next, typeof(*pos), member), \
- n = list_entry(pos->member.next, typeof(*pos), member); \
- &pos->member != (head); \
- pos = n, n = list_entry(n->member.next, typeof(*n), member))
+#define list_for_each_entry_safe_continue(pos, n, head, member) \
+ for ((pos) = list_entry((pos)->member.next, typeof(*(pos)), member), \
+ (n) = list_entry((pos)->member.next, typeof(*(pos)), member); \
+ &(pos)->member != (head); \
+ (pos) = (n), (n) = list_entry((n)->member.next, typeof(*(n)), member))
/**
* list_for_each_entry_safe_from
@@ -586,9 +586,9 @@ static inline void list_splice_init(struct list_head *list,
* removal of list entry.
*/
#define list_for_each_entry_safe_from(pos, n, head, member) \
- for (n = list_entry(pos->member.next, typeof(*pos), member); \
- &pos->member != (head); \
- pos = n, n = list_entry(n->member.next, typeof(*n), member))
+ for ((n) = list_entry((pos)->member.next, typeof(*(pos)), member); \
+ &(pos)->member != (head); \
+ (pos) = (n), (n) = list_entry((n)->member.next, typeof(*(n)), member))
/**
* list_for_each_entry_safe_reverse
@@ -601,10 +601,10 @@ static inline void list_splice_init(struct list_head *list,
* of list entry.
*/
#define list_for_each_entry_safe_reverse(pos, n, head, member) \
- for (pos = list_entry((head)->prev, typeof(*pos), member), \
- n = list_entry(pos->member.prev, typeof(*pos), member); \
- &pos->member != (head); \
- pos = n, n = list_entry(n->member.prev, typeof(*n), member))
+ for ((pos) = list_entry((head)->prev, typeof(*(pos)), member), \
+ (n) = list_entry((pos)->member.prev, typeof(*(pos)), member); \
+ &(pos)->member != (head); \
+ (pos) = (n), (n) = list_entry((n)->member.prev, typeof(*(n)), member))
/**
* list_for_each_rcu - iterate over an rcu-protected list
@@ -616,14 +616,14 @@ static inline void list_splice_init(struct list_head *list,
* as long as the traversal is guarded by rcu_read_lock().
*/
#define list_for_each_rcu(pos, head) \
- for (pos = (head)->next; \
+ for ((pos) = (head)->next; \
rcu_dereference(pos) != (head); \
- pos = pos->next)
+ (pos) = (pos)->next)
#define __list_for_each_rcu(pos, head) \
- for (pos = (head)->next; \
+ for ((pos) = (head)->next; \
rcu_dereference(pos) != (head); \
- pos = pos->next)
+ (pos) = (pos)->next)
/**
* list_for_each_safe_rcu
@@ -638,9 +638,9 @@ static inline void list_splice_init(struct list_head *list,
* as long as the traversal is guarded by rcu_read_lock().
*/
#define list_for_each_safe_rcu(pos, n, head) \
- for (pos = (head)->next; \
- n = rcu_dereference(pos)->next, pos != (head); \
- pos = n)
+ for ((pos) = (head)->next; \
+ (n) = rcu_dereference(pos)->next, (pos) != (head); \
+ (pos) = (n))
/**
* list_for_each_entry_rcu - iterate over rcu list of given type
@@ -653,9 +653,9 @@ static inline void list_splice_init(struct list_head *list,
* as long as the traversal is guarded by rcu_read_lock().
*/
#define list_for_each_entry_rcu(pos, head, member) \
- for (pos = list_entry((head)->next, typeof(*pos), member); \
+ for ((pos) = list_entry((head)->next, typeof(*(pos)), member); \
&rcu_dereference(pos)->member != (head); \
- pos = list_entry(pos->member.next, typeof(*pos), member))
+ (pos) = list_entry((pos)->member.next, typeof(*(pos)), member))
/**
* list_for_each_continue_rcu
@@ -977,4 +977,3 @@ static inline void hlist_add_after_rcu(struct hlist_node *prev,
pos = pos->next)
#endif /* __XEN_LIST_H__ */
-
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [XEN PATCH v2 3/7] xen/list: address violations of MISRA C Rule 20.7
2024-03-08 11:21 ` [XEN PATCH v2 3/7] xen/list: " Nicola Vetrini
@ 2024-03-09 1:29 ` Stefano Stabellini
2024-03-11 7:48 ` Jan Beulich
1 sibling, 0 replies; 17+ messages in thread
From: Stefano Stabellini @ 2024-03-09 1:29 UTC (permalink / raw)
To: Nicola Vetrini
Cc: xen-devel, sstabellini, michal.orzel, xenia.ragiadakou,
ayan.kumar.halder, consulting, bertrand.marquis, julien,
Andrew Cooper, George Dunlap, Jan Beulich, Wei Liu
On Fri, 8 Mar 2024, Nicola Vetrini wrote:
> MISRA C Rule 20.7 states: "Expressions resulting from the expansion
> of macro parameters shall be enclosed in parentheses". Therefore, some
> macro definitions should gain additional parentheses to ensure that all
> current and future users will be safe with respect to expansions that
> can possibly alter the semantics of the passed-in macro parameter.
>
> No functional change.
>
> Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [XEN PATCH v2 3/7] xen/list: address violations of MISRA C Rule 20.7
2024-03-08 11:21 ` [XEN PATCH v2 3/7] xen/list: " Nicola Vetrini
2024-03-09 1:29 ` Stefano Stabellini
@ 2024-03-11 7:48 ` Jan Beulich
2024-03-11 8:19 ` Nicola Vetrini
1 sibling, 1 reply; 17+ messages in thread
From: Jan Beulich @ 2024-03-11 7:48 UTC (permalink / raw)
To: Nicola Vetrini
Cc: sstabellini, michal.orzel, xenia.ragiadakou, ayan.kumar.halder,
consulting, bertrand.marquis, julien, Andrew Cooper,
George Dunlap, Wei Liu, xen-devel
On 08.03.2024 12:21, Nicola Vetrini wrote:
> --- a/xen/include/xen/list.h
> +++ b/xen/include/xen/list.h
> @@ -479,9 +479,9 @@ static inline void list_splice_init(struct list_head *list,
> * @n: another &struct list_head to use as temporary storage
> * @head: the head for your list.
> */
> -#define list_for_each_backwards_safe(pos, n, head) \
> - for ( pos = (head)->prev, n = pos->prev; pos != (head); \
> - pos = n, n = pos->prev )
> +#define list_for_each_backwards_safe(pos, n, head) \
> + for ( (pos) = (head)->prev, n = (pos)->prev; (pos) != (head); \
> + (pos) = n, n = (pos)->prev )
I think this is worse than before and incomplete: At least the rhs use of n
also needs parenthesizing. Plus if pos is parenthesized even in lhs
instances, imo n ought to be, too.
Jan
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [XEN PATCH v2 3/7] xen/list: address violations of MISRA C Rule 20.7
2024-03-11 7:48 ` Jan Beulich
@ 2024-03-11 8:19 ` Nicola Vetrini
0 siblings, 0 replies; 17+ messages in thread
From: Nicola Vetrini @ 2024-03-11 8:19 UTC (permalink / raw)
To: Jan Beulich
Cc: sstabellini, michal.orzel, xenia.ragiadakou, ayan.kumar.halder,
consulting, bertrand.marquis, julien, Andrew Cooper,
George Dunlap, Wei Liu, xen-devel
On 2024-03-11 08:48, Jan Beulich wrote:
> On 08.03.2024 12:21, Nicola Vetrini wrote:
>> --- a/xen/include/xen/list.h
>> +++ b/xen/include/xen/list.h
>> @@ -479,9 +479,9 @@ static inline void list_splice_init(struct
>> list_head *list,
>> * @n: another &struct list_head to use as temporary storage
>> * @head: the head for your list.
>> */
>> -#define list_for_each_backwards_safe(pos, n, head) \
>> - for ( pos = (head)->prev, n = pos->prev; pos != (head); \
>> - pos = n, n = pos->prev )
>> +#define list_for_each_backwards_safe(pos, n, head) \
>> + for ( (pos) = (head)->prev, n = (pos)->prev; (pos) != (head); \
>> + (pos) = n, n = (pos)->prev )
>
> I think this is worse than before and incomplete: At least the rhs use
> of n
> also needs parenthesizing. Plus if pos is parenthesized even in lhs
> instances, imo n ought to be, too.
>
You are right: this was simply an oversight.
--
Nicola Vetrini, BSc
Software Engineer, BUGSENG srl (https://bugseng.com)
^ permalink raw reply [flat|nested] 17+ messages in thread
* [XEN PATCH v2 4/7] xen/param: address violations of MISRA C Rule 20.7
2024-03-08 11:20 [XEN PATCH v2 0/7] address some violations of MISRA C Rule 20.7 Nicola Vetrini
` (2 preceding siblings ...)
2024-03-08 11:21 ` [XEN PATCH v2 3/7] xen/list: " Nicola Vetrini
@ 2024-03-08 11:21 ` Nicola Vetrini
2024-03-09 1:32 ` Stefano Stabellini
2024-03-08 11:21 ` [XEN PATCH v2 5/7] xen/arm: address some " Nicola Vetrini
` (2 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Nicola Vetrini @ 2024-03-08 11:21 UTC (permalink / raw)
To: nicola.vetrini, xen-devel
Cc: sstabellini, michal.orzel, xenia.ragiadakou, ayan.kumar.halder,
consulting, bertrand.marquis, julien, Andrew Cooper,
George Dunlap, Jan Beulich, Wei Liu
MISRA C Rule 20.7 states: "Expressions resulting from the expansion
of macro parameters shall be enclosed in parentheses". Therefore, some
macro definitions should gain additional parentheses to ensure that all
current and future users will be safe with respect to expansions that
can possibly alter the semantics of the passed-in macro parameter.
No functional change.
Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
---
xen/include/xen/param.h | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/xen/include/xen/param.h b/xen/include/xen/param.h
index 13607e0e50e0..1bdbab34ab1f 100644
--- a/xen/include/xen/param.h
+++ b/xen/include/xen/param.h
@@ -45,42 +45,42 @@ extern const struct kernel_param __setup_start[], __setup_end[];
#define TEMP_NAME(base) _TEMP_NAME(base, __LINE__)
#define custom_param(_name, _var) \
- __setup_str __setup_str_##_var[] = _name; \
+ __setup_str __setup_str_##_var[] = (_name); \
__kparam __setup_##_var = \
{ .name = __setup_str_##_var, \
.type = OPT_CUSTOM, \
- .par.func = _var }
+ .par.func = (_var) }
#define boolean_param(_name, _var) \
- __setup_str __setup_str_##_var[] = _name; \
+ __setup_str __setup_str_##_var[] = (_name); \
__kparam __setup_##_var = \
{ .name = __setup_str_##_var, \
.type = OPT_BOOL, \
.len = sizeof(_var) + \
BUILD_BUG_ON_ZERO(sizeof(_var) != sizeof(bool)), \
- .par.var = &_var }
+ .par.var = &(_var) }
#define integer_param(_name, _var) \
- __setup_str __setup_str_##_var[] = _name; \
+ __setup_str __setup_str_##_var[] = (_name); \
__kparam __setup_##_var = \
{ .name = __setup_str_##_var, \
.type = OPT_UINT, \
.len = sizeof(_var), \
- .par.var = &_var }
+ .par.var = &(_var) }
#define size_param(_name, _var) \
- __setup_str __setup_str_##_var[] = _name; \
+ __setup_str __setup_str_##_var[] = (_name); \
__kparam __setup_##_var = \
{ .name = __setup_str_##_var, \
.type = OPT_SIZE, \
.len = sizeof(_var), \
- .par.var = &_var }
+ .par.var = &(_var) }
#define string_param(_name, _var) \
- __setup_str __setup_str_##_var[] = _name; \
+ __setup_str __setup_str_##_var[] = (_name); \
__kparam __setup_##_var = \
{ .name = __setup_str_##_var, \
.type = OPT_STR, \
.len = sizeof(_var), \
- .par.var = &_var }
+ .par.var = &(_var) }
#define ignore_param(_name) \
- __setup_str TEMP_NAME(__setup_str_ign)[] = _name; \
+ __setup_str TEMP_NAME(__setup_str_ign)[] = (_name); \
__kparam TEMP_NAME(__setup_ign) = \
{ .name = TEMP_NAME(__setup_str_ign), \
.type = OPT_IGNORE }
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [XEN PATCH v2 4/7] xen/param: address violations of MISRA C Rule 20.7
2024-03-08 11:21 ` [XEN PATCH v2 4/7] xen/param: " Nicola Vetrini
@ 2024-03-09 1:32 ` Stefano Stabellini
0 siblings, 0 replies; 17+ messages in thread
From: Stefano Stabellini @ 2024-03-09 1:32 UTC (permalink / raw)
To: Nicola Vetrini
Cc: xen-devel, sstabellini, michal.orzel, xenia.ragiadakou,
ayan.kumar.halder, consulting, bertrand.marquis, julien,
Andrew Cooper, George Dunlap, Jan Beulich, Wei Liu
On Fri, 8 Mar 2024, Nicola Vetrini wrote:
> MISRA C Rule 20.7 states: "Expressions resulting from the expansion
> of macro parameters shall be enclosed in parentheses". Therefore, some
> macro definitions should gain additional parentheses to ensure that all
> current and future users will be safe with respect to expansions that
> can possibly alter the semantics of the passed-in macro parameter.
>
> No functional change.
>
> Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [XEN PATCH v2 5/7] xen/arm: address some violations of MISRA C Rule 20.7
2024-03-08 11:20 [XEN PATCH v2 0/7] address some violations of MISRA C Rule 20.7 Nicola Vetrini
` (3 preceding siblings ...)
2024-03-08 11:21 ` [XEN PATCH v2 4/7] xen/param: " Nicola Vetrini
@ 2024-03-08 11:21 ` Nicola Vetrini
2024-03-09 1:53 ` Stefano Stabellini
2024-03-08 11:21 ` [XEN PATCH v2 6/7] x86/irq: parenthesize negative constants Nicola Vetrini
2024-03-08 11:21 ` [XEN PATCH v2 7/7] arm/smmu: address some violations of MISRA C Rule 20.7 Nicola Vetrini
6 siblings, 1 reply; 17+ messages in thread
From: Nicola Vetrini @ 2024-03-08 11:21 UTC (permalink / raw)
To: nicola.vetrini, xen-devel
Cc: sstabellini, michal.orzel, xenia.ragiadakou, ayan.kumar.halder,
consulting, bertrand.marquis, julien, Volodymyr Babchuk
MISRA C Rule 20.7 states: "Expressions resulting from the expansion
of macro parameters shall be enclosed in parentheses". Therefore, some
macro definitions should gain additional parentheses to ensure that all
current and future users will be safe with respect to expansions that
can possibly alter the semantics of the passed-in macro parameter.
No functional change.
Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
---
Style in arm64/cpufeature.c has not been amended, because this file seems
to be kept in sync with its Linux counterpart.
Changes in v2:
- Added parentheses for consistency
---
xen/arch/arm/arm64/cpufeature.c | 14 ++++-----
xen/arch/arm/cpuerrata.c | 8 +++---
xen/arch/arm/include/asm/arm64/sysregs.h | 2 +-
xen/arch/arm/include/asm/guest_atomics.h | 4 +--
xen/arch/arm/include/asm/mm.h | 2 +-
xen/arch/arm/include/asm/smccc.h | 36 ++++++++++++------------
xen/arch/arm/include/asm/vgic-emul.h | 8 +++---
xen/arch/arm/vcpreg.c | 5 ++--
8 files changed, 40 insertions(+), 39 deletions(-)
diff --git a/xen/arch/arm/arm64/cpufeature.c b/xen/arch/arm/arm64/cpufeature.c
index 864413d9cc03..6fb8974ade7f 100644
--- a/xen/arch/arm/arm64/cpufeature.c
+++ b/xen/arch/arm/arm64/cpufeature.c
@@ -78,13 +78,13 @@
#define __ARM64_FTR_BITS(SIGNED, VISIBLE, STRICT, TYPE, SHIFT, WIDTH, SAFE_VAL) \
{ \
- .sign = SIGNED, \
- .visible = VISIBLE, \
- .strict = STRICT, \
- .type = TYPE, \
- .shift = SHIFT, \
- .width = WIDTH, \
- .safe_val = SAFE_VAL, \
+ .sign = (SIGNED), \
+ .visible = (VISIBLE), \
+ .strict = (STRICT), \
+ .type = (TYPE), \
+ .shift = (SHIFT), \
+ .width = (WIDTH), \
+ .safe_val = (SAFE_VAL), \
}
/* Define a feature with unsigned values */
diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c
index a28fa6ac78cc..2b7101ea2524 100644
--- a/xen/arch/arm/cpuerrata.c
+++ b/xen/arch/arm/cpuerrata.c
@@ -461,13 +461,13 @@ static bool has_ssbd_mitigation(const struct arm_cpu_capabilities *entry)
#define MIDR_RANGE(model, min, max) \
.matches = is_affected_midr_range, \
- .midr_model = model, \
- .midr_range_min = min, \
- .midr_range_max = max
+ .midr_model = (model), \
+ .midr_range_min = (min), \
+ .midr_range_max = (max)
#define MIDR_ALL_VERSIONS(model) \
.matches = is_affected_midr_range, \
- .midr_model = model, \
+ .midr_model = (model), \
.midr_range_min = 0, \
.midr_range_max = (MIDR_VARIANT_MASK | MIDR_REVISION_MASK)
diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
index 3fdeb9d8cdef..b593e4028b53 100644
--- a/xen/arch/arm/include/asm/arm64/sysregs.h
+++ b/xen/arch/arm/include/asm/arm64/sysregs.h
@@ -465,7 +465,7 @@
/* Access to system registers */
#define WRITE_SYSREG64(v, name) do { \
- uint64_t _r = v; \
+ uint64_t _r = (v); \
asm volatile("msr "__stringify(name)", %0" : : "r" (_r)); \
} while (0)
#define READ_SYSREG64(name) ({ \
diff --git a/xen/arch/arm/include/asm/guest_atomics.h b/xen/arch/arm/include/asm/guest_atomics.h
index a1745f8613f6..8893eb9a55d7 100644
--- a/xen/arch/arm/include/asm/guest_atomics.h
+++ b/xen/arch/arm/include/asm/guest_atomics.h
@@ -32,7 +32,7 @@ static inline void guest_##name(struct domain *d, int nr, volatile void *p) \
perfc_incr(atomics_guest_paused); \
\
domain_pause_nosync(d); \
- name(nr, p); \
+ (name)(nr, p); \
domain_unpause(d); \
}
@@ -52,7 +52,7 @@ static inline int guest_##name(struct domain *d, int nr, volatile void *p) \
perfc_incr(atomics_guest_paused); \
\
domain_pause_nosync(d); \
- oldbit = name(nr, p); \
+ oldbit = (name)(nr, p); \
domain_unpause(d); \
\
return oldbit; \
diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index cbcf3bf14767..48538b5337aa 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -250,7 +250,7 @@ static inline void __iomem *ioremap_wc(paddr_t start, size_t len)
#define gaddr_to_gfn(ga) _gfn(paddr_to_pfn(ga))
#define mfn_to_maddr(mfn) pfn_to_paddr(mfn_x(mfn))
#define maddr_to_mfn(ma) _mfn(paddr_to_pfn(ma))
-#define vmap_to_mfn(va) maddr_to_mfn(virt_to_maddr((vaddr_t)va))
+#define vmap_to_mfn(va) maddr_to_mfn(virt_to_maddr((vaddr_t)(va)))
#define vmap_to_page(va) mfn_to_page(vmap_to_mfn(va))
/* Page-align address and convert to frame number format */
diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h
index 1adcd37443c7..a289c48b7ffd 100644
--- a/xen/arch/arm/include/asm/smccc.h
+++ b/xen/arch/arm/include/asm/smccc.h
@@ -122,56 +122,56 @@ struct arm_smccc_res {
#define __constraint_read_7 __constraint_read_6, "r" (r7)
#define __declare_arg_0(a0, res) \
- struct arm_smccc_res *___res = res; \
- register unsigned long r0 ASM_REG(0) = (uint32_t)a0; \
+ struct arm_smccc_res *___res = (res); \
+ register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \
register unsigned long r1 ASM_REG(1); \
register unsigned long r2 ASM_REG(2); \
register unsigned long r3 ASM_REG(3)
#define __declare_arg_1(a0, a1, res) \
- typeof(a1) __a1 = a1; \
- struct arm_smccc_res *___res = res; \
- register unsigned long r0 ASM_REG(0) = (uint32_t)a0; \
+ typeof(a1) __a1 = (a1); \
+ struct arm_smccc_res *___res = (res); \
+ register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \
register unsigned long r1 ASM_REG(1) = __a1; \
register unsigned long r2 ASM_REG(2); \
register unsigned long r3 ASM_REG(3)
#define __declare_arg_2(a0, a1, a2, res) \
- typeof(a1) __a1 = a1; \
- typeof(a2) __a2 = a2; \
- struct arm_smccc_res *___res = res; \
- register unsigned long r0 ASM_REG(0) = (uint32_t)a0; \
+ typeof(a1) __a1 = (a1); \
+ typeof(a2) __a2 = (a2); \
+ struct arm_smccc_res *___res = (res); \
+ register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \
register unsigned long r1 ASM_REG(1) = __a1; \
register unsigned long r2 ASM_REG(2) = __a2; \
register unsigned long r3 ASM_REG(3)
#define __declare_arg_3(a0, a1, a2, a3, res) \
- typeof(a1) __a1 = a1; \
- typeof(a2) __a2 = a2; \
- typeof(a3) __a3 = a3; \
- struct arm_smccc_res *___res = res; \
- register unsigned long r0 ASM_REG(0) = (uint32_t)a0; \
+ typeof(a1) __a1 = (a1); \
+ typeof(a2) __a2 = (a2); \
+ typeof(a3) __a3 = (a3); \
+ struct arm_smccc_res *___res = (res); \
+ register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \
register unsigned long r1 ASM_REG(1) = __a1; \
register unsigned long r2 ASM_REG(2) = __a2; \
register unsigned long r3 ASM_REG(3) = __a3
#define __declare_arg_4(a0, a1, a2, a3, a4, res) \
- typeof(a4) __a4 = a4; \
+ typeof(a4) __a4 = (a4); \
__declare_arg_3(a0, a1, a2, a3, res); \
register unsigned long r4 ASM_REG(4) = __a4
#define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \
- typeof(a5) __a5 = a5; \
+ typeof(a5) __a5 = (a5); \
__declare_arg_4(a0, a1, a2, a3, a4, res); \
register typeof(a5) r5 ASM_REG(5) = __a5
#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \
- typeof(a6) __a6 = a6; \
+ typeof(a6) __a6 = (a6); \
__declare_arg_5(a0, a1, a2, a3, a4, a5, res); \
register typeof(a6) r6 ASM_REG(6) = __a6
#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \
- typeof(a7) __a7 = a7; \
+ typeof(a7) __a7 = (a7); \
__declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \
register typeof(a7) r7 ASM_REG(7) = __a7
diff --git a/xen/arch/arm/include/asm/vgic-emul.h b/xen/arch/arm/include/asm/vgic-emul.h
index e52fbaa3ec04..fd0cfa2175fe 100644
--- a/xen/arch/arm/include/asm/vgic-emul.h
+++ b/xen/arch/arm/include/asm/vgic-emul.h
@@ -6,11 +6,11 @@
* a range of registers
*/
-#define VREG32(reg) reg ... reg + 3
-#define VREG64(reg) reg ... reg + 7
+#define VREG32(reg) (reg) ... ((reg) + 3)
+#define VREG64(reg) (reg) ... ((reg) + 7)
-#define VRANGE32(start, end) start ... end + 3
-#define VRANGE64(start, end) start ... end + 7
+#define VRANGE32(start, end) (start) ... ((end) + 3)
+#define VRANGE64(start, end) (start) ... ((end) + 7)
/*
* 64 bits registers can be accessible using 32-bit and 64-bit unless
diff --git a/xen/arch/arm/vcpreg.c b/xen/arch/arm/vcpreg.c
index a2d050070473..019cf34f003a 100644
--- a/xen/arch/arm/vcpreg.c
+++ b/xen/arch/arm/vcpreg.c
@@ -39,7 +39,8 @@
*/
#ifdef CONFIG_ARM_64
-#define WRITE_SYSREG_SZ(sz, val, sysreg) WRITE_SYSREG((uint##sz##_t)val, sysreg)
+#define WRITE_SYSREG_SZ(sz, val, sysreg) \
+ WRITE_SYSREG((uint##sz##_t)(val), sysreg)
#else
/*
* WRITE_SYSREG{32/64} on arm32 is defined as variadic macro which imposes
@@ -64,7 +65,7 @@ static bool func(struct cpu_user_regs *regs, type##sz##_t *r, bool read) \
bool cache_enabled = vcpu_has_cache_enabled(v); \
\
GUEST_BUG_ON(read); \
- WRITE_SYSREG_SZ(sz, *r, reg); \
+ WRITE_SYSREG_SZ(sz, *(r), reg); \
\
p2m_toggle_cache(v, cache_enabled); \
\
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [XEN PATCH v2 5/7] xen/arm: address some violations of MISRA C Rule 20.7
2024-03-08 11:21 ` [XEN PATCH v2 5/7] xen/arm: address some " Nicola Vetrini
@ 2024-03-09 1:53 ` Stefano Stabellini
0 siblings, 0 replies; 17+ messages in thread
From: Stefano Stabellini @ 2024-03-09 1:53 UTC (permalink / raw)
To: Nicola Vetrini
Cc: xen-devel, sstabellini, michal.orzel, xenia.ragiadakou,
ayan.kumar.halder, consulting, bertrand.marquis, julien,
Volodymyr Babchuk
On Fri, 8 Mar 2024, Nicola Vetrini wrote:
> MISRA C Rule 20.7 states: "Expressions resulting from the expansion
> of macro parameters shall be enclosed in parentheses". Therefore, some
> macro definitions should gain additional parentheses to ensure that all
> current and future users will be safe with respect to expansions that
> can possibly alter the semantics of the passed-in macro parameter.
>
> No functional change.
>
> Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
There are a couple of cases below where parentheses are not strictly
necessary but this patch is following the decided deviation pattern.
> ---
> Style in arm64/cpufeature.c has not been amended, because this file seems
> to be kept in sync with its Linux counterpart.
>
> Changes in v2:
> - Added parentheses for consistency
> ---
> xen/arch/arm/arm64/cpufeature.c | 14 ++++-----
> xen/arch/arm/cpuerrata.c | 8 +++---
> xen/arch/arm/include/asm/arm64/sysregs.h | 2 +-
> xen/arch/arm/include/asm/guest_atomics.h | 4 +--
> xen/arch/arm/include/asm/mm.h | 2 +-
> xen/arch/arm/include/asm/smccc.h | 36 ++++++++++++------------
> xen/arch/arm/include/asm/vgic-emul.h | 8 +++---
> xen/arch/arm/vcpreg.c | 5 ++--
> 8 files changed, 40 insertions(+), 39 deletions(-)
>
> diff --git a/xen/arch/arm/arm64/cpufeature.c b/xen/arch/arm/arm64/cpufeature.c
> index 864413d9cc03..6fb8974ade7f 100644
> --- a/xen/arch/arm/arm64/cpufeature.c
> +++ b/xen/arch/arm/arm64/cpufeature.c
> @@ -78,13 +78,13 @@
>
> #define __ARM64_FTR_BITS(SIGNED, VISIBLE, STRICT, TYPE, SHIFT, WIDTH, SAFE_VAL) \
> { \
> - .sign = SIGNED, \
> - .visible = VISIBLE, \
> - .strict = STRICT, \
> - .type = TYPE, \
> - .shift = SHIFT, \
> - .width = WIDTH, \
> - .safe_val = SAFE_VAL, \
> + .sign = (SIGNED), \
> + .visible = (VISIBLE), \
> + .strict = (STRICT), \
> + .type = (TYPE), \
> + .shift = (SHIFT), \
> + .width = (WIDTH), \
> + .safe_val = (SAFE_VAL), \
> }
>
> /* Define a feature with unsigned values */
> diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c
> index a28fa6ac78cc..2b7101ea2524 100644
> --- a/xen/arch/arm/cpuerrata.c
> +++ b/xen/arch/arm/cpuerrata.c
> @@ -461,13 +461,13 @@ static bool has_ssbd_mitigation(const struct arm_cpu_capabilities *entry)
>
> #define MIDR_RANGE(model, min, max) \
> .matches = is_affected_midr_range, \
> - .midr_model = model, \
> - .midr_range_min = min, \
> - .midr_range_max = max
> + .midr_model = (model), \
> + .midr_range_min = (min), \
> + .midr_range_max = (max)
>
> #define MIDR_ALL_VERSIONS(model) \
> .matches = is_affected_midr_range, \
> - .midr_model = model, \
> + .midr_model = (model), \
> .midr_range_min = 0, \
> .midr_range_max = (MIDR_VARIANT_MASK | MIDR_REVISION_MASK)
>
> diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
> index 3fdeb9d8cdef..b593e4028b53 100644
> --- a/xen/arch/arm/include/asm/arm64/sysregs.h
> +++ b/xen/arch/arm/include/asm/arm64/sysregs.h
> @@ -465,7 +465,7 @@
> /* Access to system registers */
>
> #define WRITE_SYSREG64(v, name) do { \
> - uint64_t _r = v; \
> + uint64_t _r = (v); \
> asm volatile("msr "__stringify(name)", %0" : : "r" (_r)); \
> } while (0)
> #define READ_SYSREG64(name) ({ \
> diff --git a/xen/arch/arm/include/asm/guest_atomics.h b/xen/arch/arm/include/asm/guest_atomics.h
> index a1745f8613f6..8893eb9a55d7 100644
> --- a/xen/arch/arm/include/asm/guest_atomics.h
> +++ b/xen/arch/arm/include/asm/guest_atomics.h
> @@ -32,7 +32,7 @@ static inline void guest_##name(struct domain *d, int nr, volatile void *p) \
> perfc_incr(atomics_guest_paused); \
> \
> domain_pause_nosync(d); \
> - name(nr, p); \
> + (name)(nr, p); \
> domain_unpause(d); \
> }
>
> @@ -52,7 +52,7 @@ static inline int guest_##name(struct domain *d, int nr, volatile void *p) \
> perfc_incr(atomics_guest_paused); \
> \
> domain_pause_nosync(d); \
> - oldbit = name(nr, p); \
> + oldbit = (name)(nr, p); \
> domain_unpause(d); \
> \
> return oldbit; \
> diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
> index cbcf3bf14767..48538b5337aa 100644
> --- a/xen/arch/arm/include/asm/mm.h
> +++ b/xen/arch/arm/include/asm/mm.h
> @@ -250,7 +250,7 @@ static inline void __iomem *ioremap_wc(paddr_t start, size_t len)
> #define gaddr_to_gfn(ga) _gfn(paddr_to_pfn(ga))
> #define mfn_to_maddr(mfn) pfn_to_paddr(mfn_x(mfn))
> #define maddr_to_mfn(ma) _mfn(paddr_to_pfn(ma))
> -#define vmap_to_mfn(va) maddr_to_mfn(virt_to_maddr((vaddr_t)va))
> +#define vmap_to_mfn(va) maddr_to_mfn(virt_to_maddr((vaddr_t)(va)))
> #define vmap_to_page(va) mfn_to_page(vmap_to_mfn(va))
>
> /* Page-align address and convert to frame number format */
> diff --git a/xen/arch/arm/include/asm/smccc.h b/xen/arch/arm/include/asm/smccc.h
> index 1adcd37443c7..a289c48b7ffd 100644
> --- a/xen/arch/arm/include/asm/smccc.h
> +++ b/xen/arch/arm/include/asm/smccc.h
> @@ -122,56 +122,56 @@ struct arm_smccc_res {
> #define __constraint_read_7 __constraint_read_6, "r" (r7)
>
> #define __declare_arg_0(a0, res) \
> - struct arm_smccc_res *___res = res; \
> - register unsigned long r0 ASM_REG(0) = (uint32_t)a0; \
> + struct arm_smccc_res *___res = (res); \
> + register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \
> register unsigned long r1 ASM_REG(1); \
> register unsigned long r2 ASM_REG(2); \
> register unsigned long r3 ASM_REG(3)
>
> #define __declare_arg_1(a0, a1, res) \
> - typeof(a1) __a1 = a1; \
> - struct arm_smccc_res *___res = res; \
> - register unsigned long r0 ASM_REG(0) = (uint32_t)a0; \
> + typeof(a1) __a1 = (a1); \
> + struct arm_smccc_res *___res = (res); \
> + register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \
> register unsigned long r1 ASM_REG(1) = __a1; \
> register unsigned long r2 ASM_REG(2); \
> register unsigned long r3 ASM_REG(3)
>
> #define __declare_arg_2(a0, a1, a2, res) \
> - typeof(a1) __a1 = a1; \
> - typeof(a2) __a2 = a2; \
> - struct arm_smccc_res *___res = res; \
> - register unsigned long r0 ASM_REG(0) = (uint32_t)a0; \
> + typeof(a1) __a1 = (a1); \
> + typeof(a2) __a2 = (a2); \
> + struct arm_smccc_res *___res = (res); \
> + register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \
> register unsigned long r1 ASM_REG(1) = __a1; \
> register unsigned long r2 ASM_REG(2) = __a2; \
> register unsigned long r3 ASM_REG(3)
>
> #define __declare_arg_3(a0, a1, a2, a3, res) \
> - typeof(a1) __a1 = a1; \
> - typeof(a2) __a2 = a2; \
> - typeof(a3) __a3 = a3; \
> - struct arm_smccc_res *___res = res; \
> - register unsigned long r0 ASM_REG(0) = (uint32_t)a0; \
> + typeof(a1) __a1 = (a1); \
> + typeof(a2) __a2 = (a2); \
> + typeof(a3) __a3 = (a3); \
> + struct arm_smccc_res *___res = (res); \
> + register unsigned long r0 ASM_REG(0) = (uint32_t)(a0); \
> register unsigned long r1 ASM_REG(1) = __a1; \
> register unsigned long r2 ASM_REG(2) = __a2; \
> register unsigned long r3 ASM_REG(3) = __a3
>
> #define __declare_arg_4(a0, a1, a2, a3, a4, res) \
> - typeof(a4) __a4 = a4; \
> + typeof(a4) __a4 = (a4); \
> __declare_arg_3(a0, a1, a2, a3, res); \
> register unsigned long r4 ASM_REG(4) = __a4
>
> #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \
> - typeof(a5) __a5 = a5; \
> + typeof(a5) __a5 = (a5); \
> __declare_arg_4(a0, a1, a2, a3, a4, res); \
> register typeof(a5) r5 ASM_REG(5) = __a5
>
> #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \
> - typeof(a6) __a6 = a6; \
> + typeof(a6) __a6 = (a6); \
> __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \
> register typeof(a6) r6 ASM_REG(6) = __a6
>
> #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \
> - typeof(a7) __a7 = a7; \
> + typeof(a7) __a7 = (a7); \
> __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \
> register typeof(a7) r7 ASM_REG(7) = __a7
>
> diff --git a/xen/arch/arm/include/asm/vgic-emul.h b/xen/arch/arm/include/asm/vgic-emul.h
> index e52fbaa3ec04..fd0cfa2175fe 100644
> --- a/xen/arch/arm/include/asm/vgic-emul.h
> +++ b/xen/arch/arm/include/asm/vgic-emul.h
> @@ -6,11 +6,11 @@
> * a range of registers
> */
>
> -#define VREG32(reg) reg ... reg + 3
> -#define VREG64(reg) reg ... reg + 7
> +#define VREG32(reg) (reg) ... ((reg) + 3)
> +#define VREG64(reg) (reg) ... ((reg) + 7)
>
> -#define VRANGE32(start, end) start ... end + 3
> -#define VRANGE64(start, end) start ... end + 7
> +#define VRANGE32(start, end) (start) ... ((end) + 3)
> +#define VRANGE64(start, end) (start) ... ((end) + 7)
>
> /*
> * 64 bits registers can be accessible using 32-bit and 64-bit unless
> diff --git a/xen/arch/arm/vcpreg.c b/xen/arch/arm/vcpreg.c
> index a2d050070473..019cf34f003a 100644
> --- a/xen/arch/arm/vcpreg.c
> +++ b/xen/arch/arm/vcpreg.c
> @@ -39,7 +39,8 @@
> */
>
> #ifdef CONFIG_ARM_64
> -#define WRITE_SYSREG_SZ(sz, val, sysreg) WRITE_SYSREG((uint##sz##_t)val, sysreg)
> +#define WRITE_SYSREG_SZ(sz, val, sysreg) \
> + WRITE_SYSREG((uint##sz##_t)(val), sysreg)
> #else
> /*
> * WRITE_SYSREG{32/64} on arm32 is defined as variadic macro which imposes
> @@ -64,7 +65,7 @@ static bool func(struct cpu_user_regs *regs, type##sz##_t *r, bool read) \
> bool cache_enabled = vcpu_has_cache_enabled(v); \
> \
> GUEST_BUG_ON(read); \
> - WRITE_SYSREG_SZ(sz, *r, reg); \
> + WRITE_SYSREG_SZ(sz, *(r), reg); \
> \
> p2m_toggle_cache(v, cache_enabled); \
> \
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [XEN PATCH v2 6/7] x86/irq: parenthesize negative constants
2024-03-08 11:20 [XEN PATCH v2 0/7] address some violations of MISRA C Rule 20.7 Nicola Vetrini
` (4 preceding siblings ...)
2024-03-08 11:21 ` [XEN PATCH v2 5/7] xen/arm: address some " Nicola Vetrini
@ 2024-03-08 11:21 ` Nicola Vetrini
2024-03-09 1:54 ` Stefano Stabellini
2024-03-08 11:21 ` [XEN PATCH v2 7/7] arm/smmu: address some violations of MISRA C Rule 20.7 Nicola Vetrini
6 siblings, 1 reply; 17+ messages in thread
From: Nicola Vetrini @ 2024-03-08 11:21 UTC (permalink / raw)
To: nicola.vetrini, xen-devel
Cc: sstabellini, michal.orzel, xenia.ragiadakou, ayan.kumar.halder,
consulting, bertrand.marquis, julien, Jan Beulich, Andrew Cooper,
Roger Pau Monné,
Wei Liu
These constants are parenthesized to avoid them from
possibly influencing the semantics of the constructs where it is used,
especially inside macros invocations.
This also resolves some violations of MISRA C Rule 20.7
("Expressions resulting from the expansion of macro parameters shall
be enclosed in parentheses").
No functional change.
Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
---
Changes in v2:
- dropped the controversial GUARD(1) hunk
---
xen/arch/x86/include/asm/irq.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 082a3d6bbc6a..7d49f3c1904a 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -172,16 +172,16 @@ void cleanup_domain_irq_mapping(struct domain *d);
void *__ret = radix_tree_lookup(&(d)->arch.irq_pirq, irq); \
__ret ? radix_tree_ptr_to_int(__ret) : 0; \
})
-#define PIRQ_ALLOCATED -1
+#define PIRQ_ALLOCATED (-1)
#define domain_pirq_to_emuirq(d, pirq) pirq_field(d, pirq, \
arch.hvm.emuirq, IRQ_UNBOUND)
#define domain_emuirq_to_pirq(d, emuirq) ({ \
void *__ret = radix_tree_lookup(&(d)->arch.hvm.emuirq_pirq, emuirq);\
__ret ? radix_tree_ptr_to_int(__ret) : IRQ_UNBOUND; \
})
-#define IRQ_UNBOUND -1
-#define IRQ_PT -2
-#define IRQ_MSI_EMU -3
+#define IRQ_UNBOUND (-1)
+#define IRQ_PT (-2)
+#define IRQ_MSI_EMU (-3)
bool cpu_has_pending_apic_eoi(void);
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [XEN PATCH v2 6/7] x86/irq: parenthesize negative constants
2024-03-08 11:21 ` [XEN PATCH v2 6/7] x86/irq: parenthesize negative constants Nicola Vetrini
@ 2024-03-09 1:54 ` Stefano Stabellini
2024-03-11 7:50 ` Jan Beulich
0 siblings, 1 reply; 17+ messages in thread
From: Stefano Stabellini @ 2024-03-09 1:54 UTC (permalink / raw)
To: Nicola Vetrini
Cc: xen-devel, sstabellini, michal.orzel, xenia.ragiadakou,
ayan.kumar.halder, consulting, bertrand.marquis, julien,
Jan Beulich, Andrew Cooper, Roger Pau Monné,
Wei Liu
On Fri, 8 Mar 2024, Nicola Vetrini wrote:
> These constants are parenthesized to avoid them from
> possibly influencing the semantics of the constructs where it is used,
> especially inside macros invocations.
>
> This also resolves some violations of MISRA C Rule 20.7
> ("Expressions resulting from the expansion of macro parameters shall
> be enclosed in parentheses").
>
> No functional change.
>
> Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [XEN PATCH v2 6/7] x86/irq: parenthesize negative constants
2024-03-09 1:54 ` Stefano Stabellini
@ 2024-03-11 7:50 ` Jan Beulich
0 siblings, 0 replies; 17+ messages in thread
From: Jan Beulich @ 2024-03-11 7:50 UTC (permalink / raw)
To: Nicola Vetrini
Cc: xen-devel, michal.orzel, xenia.ragiadakou, ayan.kumar.halder,
consulting, bertrand.marquis, julien, Andrew Cooper,
Roger Pau Monné,
Wei Liu, Stefano Stabellini
On 09.03.2024 02:54, Stefano Stabellini wrote:
> On Fri, 8 Mar 2024, Nicola Vetrini wrote:
>> These constants are parenthesized to avoid them from
>> possibly influencing the semantics of the constructs where it is used,
>> especially inside macros invocations.
>>
>> This also resolves some violations of MISRA C Rule 20.7
>> ("Expressions resulting from the expansion of macro parameters shall
>> be enclosed in parentheses").
>>
>> No functional change.
>>
>> Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
>
> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Jan Beulich <jbeulich@suse.com>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [XEN PATCH v2 7/7] arm/smmu: address some violations of MISRA C Rule 20.7
2024-03-08 11:20 [XEN PATCH v2 0/7] address some violations of MISRA C Rule 20.7 Nicola Vetrini
` (5 preceding siblings ...)
2024-03-08 11:21 ` [XEN PATCH v2 6/7] x86/irq: parenthesize negative constants Nicola Vetrini
@ 2024-03-08 11:21 ` Nicola Vetrini
6 siblings, 0 replies; 17+ messages in thread
From: Nicola Vetrini @ 2024-03-08 11:21 UTC (permalink / raw)
To: nicola.vetrini, xen-devel
Cc: sstabellini, michal.orzel, xenia.ragiadakou, ayan.kumar.halder,
consulting, bertrand.marquis, julien, Rahul Singh,
Volodymyr Babchuk
MISRA C Rule 20.7 states: "Expressions resulting from the expansion
of macro parameters shall be enclosed in parentheses". Therefore, some
macro definitions should gain additional parentheses to ensure that all
current and future users will be safe with respect to expansions that
can possibly alter the semantics of the passed-in macro parameter.
No functional change.
Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
xen/drivers/passthrough/arm/smmu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/arm/smmu.c
index 625ed0e41961..83196057a937 100644
--- a/xen/drivers/passthrough/arm/smmu.c
+++ b/xen/drivers/passthrough/arm/smmu.c
@@ -242,7 +242,7 @@ struct arm_smmu_xen_device {
struct iommu_group *group;
};
-#define dev_archdata(dev) ((struct arm_smmu_xen_device *)dev->iommu)
+#define dev_archdata(dev) ((struct arm_smmu_xen_device *)(dev)->iommu)
#define dev_iommu_domain(dev) (dev_archdata(dev)->domain)
#define dev_iommu_group(dev) (dev_archdata(dev)->group)
@@ -627,7 +627,7 @@ struct arm_smmu_master_cfg {
};
#define INVALID_SMENDX -1
#define for_each_cfg_sme(cfg, i, idx, num) \
- for (i = 0; idx = cfg->smendx[i], i < num; ++i)
+ for (i = 0; idx = (cfg)->smendx[i], (i) < (num); ++(i))
struct arm_smmu_master {
struct device_node *of_node;
--
2.34.1
^ permalink raw reply related [flat|nested] 17+ messages in thread