From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>,
xen-devel <xen-devel@lists.xenproject.org>
Cc: Wei Liu <wei.liu2@citrix.com>,
Razvan Cojocaru <rcojocaru@bitdefender.com>,
Roger Pau Monne <roger.pau@citrix.com>
Subject: Re: [PATCH] x86emul: add support for missing {, V}PMADDWD insns
Date: Wed, 15 May 2019 11:17:50 +0100 [thread overview]
Message-ID: <ecde9471-17e5-61b8-1c61-67cac1d54fc4@citrix.com> (raw)
In-Reply-To: <5CDBCC89020000780022F1DE@prv1-mh.provo.novell.com>
On 15/05/2019 09:23, Jan Beulich wrote:
> Their pre-AVX512 incarnations have clearly been overlooked during much
> earlier work. Their memory access pattern is entirely standard, so no
> specific tests get added to the harness.
>
> Reported-by: Razvan Cojocaru <rcojocaru@bitdefender.com>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -6624,6 +6624,8 @@ x86_emulate(
> case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
> case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
> + CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
> + case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
Nothing on this path checks for SSSE3, AFAICT.
~Andrew
> case X86EMUL_OPC_66(0x0f, 0xf6): /* psadbw xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf6): /* vpsadbw {x,y}mm/mem,{x,y}mm,{x,y}mm */
> CASE_SIMD_PACKED_INT(0x0f, 0xf8): /* psubb {,x}mm/mem,{,x}mm */
>
>
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WARNING: multiple messages have this Message-ID (diff)
From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>,
xen-devel <xen-devel@lists.xenproject.org>
Cc: Wei Liu <wei.liu2@citrix.com>,
Razvan Cojocaru <rcojocaru@bitdefender.com>,
Roger Pau Monne <roger.pau@citrix.com>
Subject: Re: [Xen-devel] [PATCH] x86emul: add support for missing {, V}PMADDWD insns
Date: Wed, 15 May 2019 11:17:50 +0100 [thread overview]
Message-ID: <ecde9471-17e5-61b8-1c61-67cac1d54fc4@citrix.com> (raw)
Message-ID: <20190515101750.xzhhdpz_e6K0I5atuaosuShwYM4TXFvIaLeBX5buNKo@z> (raw)
In-Reply-To: <5CDBCC89020000780022F1DE@prv1-mh.provo.novell.com>
On 15/05/2019 09:23, Jan Beulich wrote:
> Their pre-AVX512 incarnations have clearly been overlooked during much
> earlier work. Their memory access pattern is entirely standard, so no
> specific tests get added to the harness.
>
> Reported-by: Razvan Cojocaru <rcojocaru@bitdefender.com>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -6624,6 +6624,8 @@ x86_emulate(
> case X86EMUL_OPC_VEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,{x,y}mm,{x,y}mm */
> case X86EMUL_OPC_66(0x0f, 0xf4): /* pmuludq xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf4): /* vpmuludq {x,y}mm/mem,{x,y}mm,{x,y}mm */
> + CASE_SIMD_PACKED_INT(0x0f, 0xf5): /* pmaddwd {,x}mm/mem,{,x}mm */
> + case X86EMUL_OPC_VEX_66(0x0f, 0xf5): /* vpmaddwd {x,y}mm/mem,{x,y}mm,{x,y}mm */
Nothing on this path checks for SSSE3, AFAICT.
~Andrew
> case X86EMUL_OPC_66(0x0f, 0xf6): /* psadbw xmm/m128,xmm */
> case X86EMUL_OPC_VEX_66(0x0f, 0xf6): /* vpsadbw {x,y}mm/mem,{x,y}mm,{x,y}mm */
> CASE_SIMD_PACKED_INT(0x0f, 0xf8): /* psubb {,x}mm/mem,{,x}mm */
>
>
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next prev parent reply other threads:[~2019-05-15 10:17 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-15 8:23 [PATCH] x86emul: add support for missing {, V}PMADDWD insns Jan Beulich
2019-05-15 8:23 ` [Xen-devel] " Jan Beulich
2019-05-15 9:43 ` Alexandru Stefan ISAILA
2019-05-15 9:43 ` [Xen-devel] " Alexandru Stefan ISAILA
2019-05-15 10:17 ` Andrew Cooper [this message]
2019-05-15 10:17 ` Andrew Cooper
2019-05-15 11:50 ` Jan Beulich
2019-05-15 11:50 ` [Xen-devel] " Jan Beulich
2019-05-15 11:59 ` Andrew Cooper
2019-05-15 11:59 ` [Xen-devel] " Andrew Cooper
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