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From: Oleksandr Andrushchenko <Oleksandr_Andrushchenko@epam.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "julien@xen.org" <julien@xen.org>,
	"sstabellini@kernel.org" <sstabellini@kernel.org>,
	Oleksandr Tyshchenko <Oleksandr_Tyshchenko@epam.com>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
	Artem Mygaiev <Artem_Mygaiev@epam.com>,
	"roger.pau@citrix.com" <roger.pau@citrix.com>,
	"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
	"george.dunlap@citrix.com" <george.dunlap@citrix.com>,
	"paul@xen.org" <paul@xen.org>,
	Bertrand Marquis <bertrand.marquis@arm.com>,
	Rahul Singh <rahul.singh@arm.com>,
	"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Oleksandr Andrushchenko <Oleksandr_Andrushchenko@epam.com>
Subject: Re: [PATCH v6 10/13] vpci/header: reset the command register when adding devices
Date: Mon, 7 Feb 2022 14:17:36 +0000	[thread overview]
Message-ID: <f34cc940-7f5f-aebd-60d9-d1a3d85d1283@epam.com> (raw)
In-Reply-To: <dbef1c95-818c-427c-1963-75d584843cff@suse.com>



On 07.02.22 14:54, Jan Beulich wrote:
> On 07.02.2022 13:51, Oleksandr Andrushchenko wrote:
>>
>> On 07.02.22 14:38, Jan Beulich wrote:
>>> On 07.02.2022 12:27, Oleksandr Andrushchenko wrote:
>>>> On 07.02.22 09:29, Jan Beulich wrote:
>>>>> On 04.02.2022 15:37, Oleksandr Andrushchenko wrote:
>>>>>> On 04.02.22 16:30, Jan Beulich wrote:
>>>>>>> On 04.02.2022 07:34, Oleksandr Andrushchenko wrote:
>>>>>>>> Reset the command register when assigning a PCI device to a guest:
>>>>>>>> according to the PCI spec the PCI_COMMAND register is typically all 0's
>>>>>>>> after reset.
>>>>>>> It's not entirely clear to me whether setting the hardware register to
>>>>>>> zero is okay. What wants to be zero is the value the guest observes
>>>>>>> initially.
>>>>>> "the PCI spec says the PCI_COMMAND register is typically all 0's after reset."
>>>>>> Why wouldn't it be ok? What is the exact concern here?
>>>>> The concern is - as voiced is similar ways before, perhaps in other
>>>>> contexts - that you need to consider bit-by-bit whether overwriting
>>>>> with 0 what is currently there is okay. Xen and/or Dom0 may have put
>>>>> values there which they expect to remain unaltered. I guess
>>>>> PCI_COMMAND_SERR is a good example: While the guest's view of this
>>>>> will want to be zero initially, the host having set it to 1 may not
>>>>> easily be overwritten with 0, or else you'd effectively imply giving
>>>>> the guest control of the bit.
>>>> We have already discussed in great detail PCI_COMMAND emulation [1].
>>>> At the end you wrote [1]:
>>>> "Well, in order for the whole thing to be security supported it needs to
>>>> be explained for every bit why it is safe to allow the guest to drive it.
>>>> Until you mean vPCI to reach that state, leaving TODO notes in the code
>>>> for anything not investigated may indeed be good enough.
>>>>
>>>> Jan"
>>>>
>>>> So, this is why I left a TODO in the PCI_COMMAND emulation for now and only
>>>> care about INTx which is honored with the code in this patch.
>>> Right. The issue I see is that the description does not have any
>>> mention of this, but instead talks about simply writing zero.
>> How do you want that mentioned? Extended commit message or
>> just a link to the thread [1]?
> What I'd like you to describe is what the change does without
> fundamentally implying it'll end up being zero which gets written
> to the register. Stating as a conclusion that for the time being
> this means writing zero is certainly fine (and likely helpful if
> made explicit).
Xen and/or Dom0 may have put values in PCI_COMMAND which they expect
to remain unaltered. PCI_COMMAND_SERR bit is a good example: while the
guest's view of this will want to be zero initially, the host having set
it to 1 may not easily be overwritten with 0, or else we'd effectively
imply giving the guest control of the bit. Thus, PCI_COMMAND register needs
proper emulation in order to honor host's settings.

There are examples of emulators [1], [2] which already deal with PCI_COMMAND
register emulation and it seems that at most they care about the only INTX
bit (besides IO/memory enable and bus muster which are write through).
It could be because in order to properly emulate the PCI_COMMAND register
we need to know about the whole PCI topology, e.g. if any setting in device's
command register is aligned with the upstream port etc.
This makes me think that because of this complexity others just ignore that.
Neither I think this can be easily done in Xen case.

According to "PCI LOCAL BUS SPECIFICATION, REV. 3.0", section "6.2.2
Device Control" says that the reset state of the command register is
typically 0, so reset the command register when assigning a PCI device
to a guest t all 0's and for now only make sure INTx bit is set according
to if MSI/MSI-X enabled.

[1] https://github.com/qemu/qemu/blob/master/hw/xen/xen_pt_config_init.c#L310
[2] https://github.com/projectacrn/acrn-hypervisor/blob/master/hypervisor/hw/pci.c#L336

Will the above description be enough?

It also seems to be a good move to squash the following patches:
[PATCH v6 09/13] vpci/header: emulate PCI_COMMAND register for guests
[PATCH v6 10/13] vpci/header: reset the command register when adding devices

as they implement a single piece of functionality now.
>> With the above done, do you think that writing 0's is an acceptable
>> approach as of now?
> Well, yes, provided we have a sufficiently similar understanding
> of what "acceptable" here means.
>
> Jan
>
Thank you,
Oleksandr

  reply	other threads:[~2022-02-07 14:18 UTC|newest]

Thread overview: 138+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-04  6:34 [PATCH v6 00/13] PCI devices passthrough on Arm, part 3 Oleksandr Andrushchenko
2022-02-04  6:34 ` [PATCH v6 01/13] xen/pci: arm: add stub for is_memory_hole Oleksandr Andrushchenko
2022-02-04  8:51   ` Julien Grall
2022-02-04  9:01     ` Oleksandr Andrushchenko
2022-02-04  9:41       ` Julien Grall
2022-02-04  9:47         ` Oleksandr Andrushchenko
2022-02-04  9:57           ` Julien Grall
2022-02-04 10:35             ` Oleksandr Andrushchenko
2022-02-04 11:00               ` Julien Grall
2022-02-04 11:25                 ` Oleksandr Andrushchenko
2022-02-04  6:34 ` [PATCH v6 02/13] rangeset: add RANGESETF_no_print flag Oleksandr Andrushchenko
2022-02-04  6:34 ` [PATCH v6 03/13] vpci: move lock outside of struct vpci Oleksandr Andrushchenko
2022-02-04  7:52   ` Jan Beulich
2022-02-04  8:13     ` Oleksandr Andrushchenko
2022-02-04  8:36       ` Jan Beulich
2022-02-04  8:58     ` Oleksandr Andrushchenko
2022-02-04  9:15       ` Jan Beulich
2022-02-04 10:12         ` Oleksandr Andrushchenko
2022-02-04 10:49           ` Jan Beulich
2022-02-04 11:13             ` Roger Pau Monné
2022-02-04 11:37               ` Jan Beulich
2022-02-04 12:37                 ` Oleksandr Andrushchenko
2022-02-04 12:47                   ` Jan Beulich
2022-02-04 12:53                     ` Oleksandr Andrushchenko
2022-02-04 13:03                       ` Jan Beulich
2022-02-04 13:06                       ` Roger Pau Monné
2022-02-04 14:43                         ` Oleksandr Andrushchenko
2022-02-04 14:57                           ` Roger Pau Monné
2022-02-07 11:08                             ` Oleksandr Andrushchenko
2022-02-07 12:34                               ` Jan Beulich
2022-02-07 12:57                                 ` Oleksandr Andrushchenko
2022-02-07 13:02                                   ` Jan Beulich
2022-02-07 12:46                               ` Roger Pau Monné
2022-02-07 13:53                                 ` Oleksandr Andrushchenko
2022-02-07 14:11                                   ` Jan Beulich
2022-02-07 14:27                                     ` Roger Pau Monné
2022-02-07 14:33                                       ` Jan Beulich
2022-02-07 14:35                                       ` Oleksandr Andrushchenko
2022-02-07 15:11                                         ` Oleksandr Andrushchenko
2022-02-07 15:26                                           ` Jan Beulich
2022-02-07 16:07                                             ` Oleksandr Andrushchenko
2022-02-07 16:15                                               ` Jan Beulich
2022-02-07 16:21                                                 ` Oleksandr Andrushchenko
2022-02-07 16:37                                                   ` Jan Beulich
2022-02-07 16:44                                                     ` Oleksandr Andrushchenko
2022-02-08  7:35                                                       ` Oleksandr Andrushchenko
2022-02-08  8:57                                                         ` Jan Beulich
2022-02-08  9:03                                                           ` Oleksandr Andrushchenko
2022-02-08 10:50                                                         ` Roger Pau Monné
2022-02-08 11:13                                                           ` Oleksandr Andrushchenko
2022-02-08 13:38                                                             ` Roger Pau Monné
2022-02-08 13:52                                                               ` Oleksandr Andrushchenko
2022-02-08  8:53                                                       ` Jan Beulich
2022-02-08  9:00                                                         ` Oleksandr Andrushchenko
2022-02-08 10:11                                                     ` Roger Pau Monné
2022-02-08 10:32                                                       ` Oleksandr Andrushchenko
2022-02-07 16:08                                             ` Roger Pau Monné
2022-02-07 16:12                                               ` Jan Beulich
2022-02-07 14:28                                     ` Oleksandr Andrushchenko
2022-02-07 14:19                                   ` Roger Pau Monné
2022-02-07 14:27                                     ` Oleksandr Andrushchenko
2022-02-04 11:37               ` Oleksandr Andrushchenko
2022-02-04 12:15                 ` Roger Pau Monné
2022-02-04 10:57           ` Roger Pau Monné
2022-02-04  6:34 ` [PATCH v6 04/13] vpci: restrict unhandled read/write operations for guests Oleksandr Andrushchenko
2022-02-04 14:11   ` Jan Beulich
2022-02-04 14:24     ` Oleksandr Andrushchenko
2022-02-08  8:00       ` Oleksandr Andrushchenko
2022-02-08  9:04         ` Jan Beulich
2022-02-08  9:09           ` Oleksandr Andrushchenko
2022-02-08  9:05         ` Roger Pau Monné
2022-02-08  9:10           ` Oleksandr Andrushchenko
2022-02-04  6:34 ` [PATCH v6 05/13] vpci: add hooks for PCI device assign/de-assign Oleksandr Andrushchenko
2022-02-07 16:28   ` Jan Beulich
2022-02-08  8:32     ` Oleksandr Andrushchenko
2022-02-08  9:13       ` Jan Beulich
2022-02-08  9:27         ` Oleksandr Andrushchenko
2022-02-08  9:44           ` Jan Beulich
2022-02-08  9:55             ` Oleksandr Andrushchenko
2022-02-08 10:09               ` Jan Beulich
2022-02-08 10:22                 ` Oleksandr Andrushchenko
2022-02-08 10:29                   ` Jan Beulich
2022-02-08 10:52                     ` Oleksandr Andrushchenko
2022-02-08 11:00                       ` Jan Beulich
2022-02-08 11:25                         ` Oleksandr Andrushchenko
2022-02-10  8:21                           ` Oleksandr Andrushchenko
2022-02-10  9:22                             ` Jan Beulich
2022-02-10  9:33                               ` Oleksandr Andrushchenko
2022-02-04  6:34 ` [PATCH v6 06/13] vpci/header: implement guest BAR register handlers Oleksandr Andrushchenko
2022-02-07 17:06   ` Jan Beulich
2022-02-08  8:06     ` Oleksandr Andrushchenko
2022-02-08  9:16       ` Jan Beulich
2022-02-08  9:29         ` Roger Pau Monné
2022-02-08  9:25   ` Roger Pau Monné
2022-02-08  9:31     ` Oleksandr Andrushchenko
2022-02-08  9:48       ` Jan Beulich
2022-02-08  9:57         ` Oleksandr Andrushchenko
2022-02-08 10:15           ` Jan Beulich
2022-02-08 10:29             ` Oleksandr Andrushchenko
2022-02-08 13:58               ` Roger Pau Monné
2022-02-04  6:34 ` [PATCH v6 07/13] vpci/header: handle p2m range sets per BAR Oleksandr Andrushchenko
2022-02-04  6:34 ` [PATCH v6 08/13] vpci/header: program p2m with guest BAR view Oleksandr Andrushchenko
2022-02-04  6:34 ` [PATCH v6 09/13] vpci/header: emulate PCI_COMMAND register for guests Oleksandr Andrushchenko
2022-02-04 14:25   ` Jan Beulich
2022-02-08  8:13     ` Oleksandr Andrushchenko
2022-02-08  9:33       ` Jan Beulich
2022-02-08  9:38         ` Oleksandr Andrushchenko
2022-02-08  9:52           ` Jan Beulich
2022-02-08  9:58             ` Oleksandr Andrushchenko
2022-02-08 11:11               ` Roger Pau Monné
2022-02-08 11:29                 ` Oleksandr Andrushchenko
2022-02-08 14:09                   ` Roger Pau Monné
2022-02-08 14:13                     ` Oleksandr Andrushchenko
2022-02-04  6:34 ` [PATCH v6 10/13] vpci/header: reset the command register when adding devices Oleksandr Andrushchenko
2022-02-04 14:30   ` Jan Beulich
2022-02-04 14:37     ` Oleksandr Andrushchenko
2022-02-07  7:29       ` Jan Beulich
2022-02-07 11:27         ` Oleksandr Andrushchenko
2022-02-07 12:38           ` Jan Beulich
2022-02-07 12:51             ` Oleksandr Andrushchenko
2022-02-07 12:54               ` Jan Beulich
2022-02-07 14:17                 ` Oleksandr Andrushchenko [this message]
2022-02-07 14:31                   ` Jan Beulich
2022-02-07 14:46                     ` Oleksandr Andrushchenko
2022-02-07 15:05                       ` Jan Beulich
2022-02-07 15:14                         ` Oleksandr Andrushchenko
2022-02-07 15:28                           ` Jan Beulich
2022-02-07 15:59                             ` Oleksandr Andrushchenko
2022-02-10 12:54                     ` Oleksandr Andrushchenko
2022-02-10 13:36                       ` Jan Beulich
2022-02-10 13:56                         ` Oleksandr Andrushchenko
2022-02-10 12:59                     ` Oleksandr Andrushchenko
2022-02-04  6:34 ` [PATCH v6 11/13] vpci: add initial support for virtual PCI bus topology Oleksandr Andrushchenko
2022-02-04  6:34 ` [PATCH v6 12/13] xen/arm: translate virtual PCI bus topology for guests Oleksandr Andrushchenko
2022-02-04  7:56   ` Jan Beulich
2022-02-04  8:18     ` Oleksandr Andrushchenko
2022-02-04  6:34 ` [PATCH v6 13/13] xen/arm: account IO handlers for emulated PCI MSI-X Oleksandr Andrushchenko
2022-02-11 15:28   ` Julien Grall

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