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* [PATCH 1/2] pinctrl: intel: irq_pipeline: enable pipelined interrupt control for pintctrl-intel
@ 2023-09-04 10:25 Hongzhan Chen
  2023-09-04 10:25 ` [PATCH 2/2] pinctrl: intel: irq_pipeline: enable pipelined interrupt control for pinctrl-baytrail Hongzhan Chen
  0 siblings, 1 reply; 2+ messages in thread
From: Hongzhan Chen @ 2023-09-04 10:25 UTC (permalink / raw)
  To: xenomai

This is required to run the locking code from the pipeline
entry context and the out-of-band stage.

Signed-off-by: Hongzhan Chen <hongzhan.chen@intel.com>

diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index 2ef9e2d8fd9c..7797618a899b 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -1322,7 +1322,8 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
 	pctrl->irqchip.irq_unmask = intel_gpio_irq_unmask;
 	pctrl->irqchip.irq_set_type = intel_gpio_irq_type;
 	pctrl->irqchip.irq_set_wake = intel_gpio_irq_wake;
-	pctrl->irqchip.flags = IRQCHIP_MASK_ON_SUSPEND;
+	pctrl->irqchip.flags = IRQCHIP_MASK_ON_SUSPEND |
+			IRQCHIP_PIPELINE_SAFE;
 
 	/*
 	 * On some platforms several GPIO controllers share the same interrupt
diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h
index ad34b7a3f6ed..89ef4e37511f 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.h
+++ b/drivers/pinctrl/intel/pinctrl-intel.h
@@ -228,7 +228,7 @@ struct intel_pinctrl_context {
  */
 struct intel_pinctrl {
 	struct device *dev;
-	raw_spinlock_t lock;
+	hard_spinlock_t lock;
 	struct pinctrl_desc pctldesc;
 	struct pinctrl_dev *pctldev;
 	struct gpio_chip chip;
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* [PATCH 2/2] pinctrl: intel: irq_pipeline: enable pipelined interrupt control for pinctrl-baytrail
  2023-09-04 10:25 [PATCH 1/2] pinctrl: intel: irq_pipeline: enable pipelined interrupt control for pintctrl-intel Hongzhan Chen
@ 2023-09-04 10:25 ` Hongzhan Chen
  0 siblings, 0 replies; 2+ messages in thread
From: Hongzhan Chen @ 2023-09-04 10:25 UTC (permalink / raw)
  To: xenomai

This is required to run the locking code from the pipeline
entry context and the out-of-band stage.

Signed-off-by: Hongzhan Chen <hongzhan.chen@intel.com>

diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 394a421a19d5..6fae9ab9d913 100644
--- a/drivers/pinctrl/intel/pinctrl-baytrail.c
+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c
@@ -538,7 +538,7 @@ static const struct intel_pinctrl_soc_data *byt_soc_data[] = {
 	NULL
 };
 
-static DEFINE_RAW_SPINLOCK(byt_lock);
+static DEFINE_HARD_SPINLOCK(byt_lock);
 
 static struct intel_community *byt_get_community(struct intel_pinctrl *vg,
 						 unsigned int pin)
@@ -1580,7 +1580,8 @@ static int byt_gpio_probe(struct intel_pinctrl *vg)
 		vg->irqchip.irq_mask = byt_irq_mask,
 		vg->irqchip.irq_unmask = byt_irq_unmask,
 		vg->irqchip.irq_set_type = byt_irq_type,
-		vg->irqchip.flags = IRQCHIP_SKIP_SET_WAKE,
+		vg->irqchip.flags = IRQCHIP_SKIP_SET_WAKE |
+			IRQCHIP_PIPELINE_SAFE,
 
 		girq = &gc->irq;
 		girq->chip = &vg->irqchip;
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2023-09-04 10:53 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
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2023-09-04 10:25 [PATCH 1/2] pinctrl: intel: irq_pipeline: enable pipelined interrupt control for pintctrl-intel Hongzhan Chen
2023-09-04 10:25 ` [PATCH 2/2] pinctrl: intel: irq_pipeline: enable pipelined interrupt control for pinctrl-baytrail Hongzhan Chen

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