* [PATCH 1/3] arm-bsp: remove upstreamed cortex-m tunes
@ 2021-08-16 21:39 Jon Mason
2021-08-16 21:39 ` [PATCH 2/3] arm-bsp: cortex-r tunes Jon Mason
2021-08-16 21:39 ` [PATCH 3/3] qemu-cortex-r5: add support Jon Mason
0 siblings, 2 replies; 3+ messages in thread
From: Jon Mason @ 2021-08-16 21:39 UTC (permalink / raw)
To: meta-arm
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
.../conf/machine/include/arm/arch-armv7em.inc | 17 ---------
.../conf/machine/include/arm/arch-armv7m.inc | 17 ---------
.../include/arm/arch-armv8-1m-main.inc | 18 ----------
.../machine/include/arm/arch-armv8m-base.inc | 17 ---------
.../machine/include/arm/arch-armv8m-main.inc | 36 -------------------
.../include/arm/armv8-1m/tune-cortexm55.inc | 14 --------
.../include/arm/armv8-m/tune-cortexm23.inc | 14 --------
.../include/arm/armv8-m/tune-cortexm33.inc | 17 ---------
.../include/arm/armv8-m/tune-cortexm35p.inc | 17 ---------
.../machine/include/arm/tune-cortexm1.inc | 14 --------
.../machine/include/arm/tune-cortexm3.inc | 14 --------
.../machine/include/arm/tune-cortexm4.inc | 14 --------
.../machine/include/arm/tune-cortexm7.inc | 14 --------
13 files changed, 223 deletions(-)
delete mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc
delete mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc
delete mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc
delete mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc
delete mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/arm/armv8-1m/tune-cortexm55.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm23.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm33.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm35p.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/arm/tune-cortexm1.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/arm/tune-cortexm3.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/arm/tune-cortexm4.inc
delete mode 100644 meta-arm-bsp/conf/machine/include/arm/tune-cortexm7.inc
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc
deleted file mode 100755
index adcab27..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Defaults for ARMv7e-m
-#
-DEFAULTTUNE ?= "armv7em"
-
-TUNEVALID[armv7em] = "Enable instructions for ARMv7e-m"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv7em', ' -march=armv7e-m', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv7em', 'armv7em:', '', d)}"
-
-TUNECONFLICTS[armv7em] = "armv4 armv5 armv6 armv7a"
-
-require conf/machine/include/arm/arch-armv7m.inc
-
-AVAILTUNES += "armv7em"
-ARMPKGARCH:tune-armv7em = "armv7em"
-TUNE_FEATURES:tune-armv7em = "armv7em"
-PACKAGE_EXTRA_ARCHS:tune-armv7em = "armv7em"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc
deleted file mode 100755
index a36c265..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Defaults for ARMv7-m
-#
-DEFAULTTUNE ?= "armv7m"
-
-TUNEVALID[armv7m] = "Enable instructions for ARMv7-m"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv7m', ' -march=armv7-m', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv7m', 'armv7m:', '', d)}"
-
-TUNECONFLICTS[armv7m] = "armv4 armv5 armv6 armv7a"
-
-require conf/machine/include/arm/arch-armv6m.inc
-
-AVAILTUNES += "armv7m"
-ARMPKGARCH:tune-armv7m = "armv7m"
-TUNE_FEATURES:tune-armv7m = "armv7m"
-PACKAGE_EXTRA_ARCHS:tune-armv7m = "armv7m"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc
deleted file mode 100755
index 9171b31..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-#
-# Defaults for ARMv8.1-M.main
-#
-DEFAULTTUNE ?= "armv8-1m-main"
-
-TUNEVALID[armv8-1m-main] = "Enable instructions for ARMv8.1-m.main"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8-1m-main', ' -march=armv8.1-m.main', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8-1m-main', 'armv8-1m-main:', '', d)}"
-
-TUNECONFLICTS[armv8-1m-main] = "armv4 armv5 armv6 armv7a"
-
-require conf/machine/include/arm/arch-armv8m-main.inc
-
-AVAILTUNES += "armv8-1m-main"
-ARMPKGARCH:tune-armv8-1m-main = "armv8-1m-main"
-TUNE_FEATURES:tune-armv8-1m-main = "armv8-1m-main"
-PACKAGE_EXTRA_ARCHS:tune-armv8-1m-main = "armv8-1m-main"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc
deleted file mode 100755
index d9a341c..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Defaults for ARMv8-m.base
-#
-DEFAULTTUNE ?= "armv8m-base"
-
-TUNEVALID[armv8m-base] = "Enable instructions for ARMv8-m.base"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-base', ' -march=armv8-m.base', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-base', 'armv8m-base:', '', d)}"
-
-TUNECONFLICTS[armv8m-base] = "armv4 armv5 armv6 armv7a"
-
-require conf/machine/include/arm/arch-armv7m.inc
-
-AVAILTUNES += "armv8m-base"
-ARMPKGARCH:tune-armv8m-base = "armv8m-base"
-TUNE_FEATURES:tune-armv8m-base = "armv8m-base"
-PACKAGE_EXTRA_ARCHS:tune-armv8m-base = "armv8m-base"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc
deleted file mode 100755
index 27f552b..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# Defaults for ARMv8-m.main
-#
-DEFAULTTUNE ?= "armv8m-main"
-
-require conf/machine/include/arm/arch-armv8m-base.inc
-
-TUNEVALID[armv8m-main] = "Enable instructions for ARMv8-m.main"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-main', ' -march=armv8-m.main${MARCH_DSP}${MARCH_FPU}', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-main', 'armv8m-main:', '', d)}"
-
-TUNECONFLICTS[armv8m-main] = "armv4 armv5 armv6 armv7a"
-
-# FIXME - below taken from meta/conf/machine/include/arm/arch-armv5-dsp.inc and should be put into something more generic
-TUNEVALID[dsp] = "ARM DSP functionality"
-ARMPKGSFX_DSP = "${@bb.utils.contains('TUNE_FEATURES', [ 'dsp' ], 'e', '', d)}"
-MARCH_DSP = "${@bb.utils.contains('TUNE_FEATURES', [ 'dsp' ], '+dsp', '+nodsp', d)}"
-
-# FIXME - Below belongs in meta/conf/machine/include/arm/feature-arm-neon.inc
-TUNEVALID[vfpv5spd16] = "Enable Vector Floating Point Version 5, Single Precision. with 16 registers (fpv5-sp-d16) unit."
-TUNE_CCARGS_MFPU .= "${@bb.utils.contains('TUNE_FEATURES', 'vfpv5spd16', 'fpv5-sp-d16', '', d)}"
-MARCH_FPU = "${@bb.utils.contains('TUNE_FEATURES', [ 'vfpv5spd16' ], '+fp', '+nofp', d)}"
-
-AVAILTUNES += "armv8m-main armv8m-mainearmv8m-main-vfpv5spd16 armv8m-maine-vfpv5spd16"
-ARMPKGARCH:tune-armv8m-main = "armv8m-main"
-ARMPKGARCH:tune-armv8m-maine = "armv8m-main"
-ARMPKGARCH:tune-armv8m-main-vfpv5spd16 = "armv8m-main"
-ARMPKGARCH:tune-armv8m-maine-vfpv5spd16 = "armv8m-main"
-TUNE_FEATURES:tune-armv8m-main = "armv8m-main"
-TUNE_FEATURES:tune-armv8m-maine = "${TUNE_FEATURES:tune-armv8m-main} dsp"
-TUNE_FEATURES:tune-armv8m-main-vfpv5spd16 = "${TUNE_FEATURES:tune-armv8m-main} vfpv5spd16"
-TUNE_FEATURES:tune-armv8m-maine-vfpv5spd16 = "${TUNE_FEATURES:tune-armv8m-main-vfpv5spd16} dsp"
-PACKAGE_EXTRA_ARCHS:tune-armv8m-main = "armv8m-main"
-PACKAGE_EXTRA_ARCHS:tune-armv8m-maine = "${PACKAGE_EXTRA_ARCHS:tune-armv8m-main} armv8m-maine"
-PACKAGE_EXTRA_ARCHS:tune-armv8m-main-vfpv5spd16 = "${PACKAGE_EXTRA_ARCHS:tune-armv8m-main} armv8m-main-fpv5-spd16"
-PACKAGE_EXTRA_ARCHS:tune-armv8m-maine-vfpv5spd16 = "${PACKAGE_EXTRA_ARCHS:tune-armv8m-main} armv8m-maine-fpv5-spd16"
diff --git a/meta-arm-bsp/conf/machine/include/arm/armv8-1m/tune-cortexm55.inc b/meta-arm-bsp/conf/machine/include/arm/armv8-1m/tune-cortexm55.inc
deleted file mode 100644
index 493ad67..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/armv8-1m/tune-cortexm55.inc
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# Tune Settings for Cortex-M55
-#
-DEFAULTTUNE ?= "cortexm55"
-
-TUNEVALID[cortexm55] = "Enable Cortex-M55 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm55', ' -mcpu=cortex-m55', '', d)}"
-
-require conf/machine/include/arm/arch-armv8-1m-main.inc
-
-AVAILTUNES += "cortexm55"
-ARMPKGARCH:tune-cortexm55 = "cortexm55"
-TUNE_FEATURES:tune-cortexm55 = "${TUNE_FEATURES:tune-armv8-1m-main} cortexm55"
-PACKAGE_EXTRA_ARCHS:tune-cortexm55 = "${PACKAGE_EXTRA_ARCHS:tune-armv8-1m-main} cortexm55"
diff --git a/meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm23.inc b/meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm23.inc
deleted file mode 100644
index 25780bc..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm23.inc
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# Tune Settings for Cortex-M23
-#
-DEFAULTTUNE ?= "cortexm23"
-
-TUNEVALID[cortexm23] = "Enable Cortex-M23 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm23', ' -mcpu=cortex-m23', '', d)}"
-
-require conf/machine/include/arm/arch-armv8m-base.inc
-
-AVAILTUNES += "cortexm23"
-ARMPKGARCH:tune-cortexm23 = "cortexm23"
-TUNE_FEATURES:tune-cortexm23 = "${TUNE_FEATURES:tune-armv8m-base} cortexm23"
-PACKAGE_EXTRA_ARCHS:tune-cortexm23 = "${PACKAGE_EXTRA_ARCHS:tune-armv8m-base} cortexm23"
diff --git a/meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm33.inc b/meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm33.inc
deleted file mode 100644
index 04d1fe2..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm33.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Tune Settings for Cortex-M33
-#
-DEFAULTTUNE ?= "cortexm33"
-
-TUNEVALID[cortexm33] = "Enable Cortex-M33 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm33', ' -mcpu=cortex-m33', '', d)}"
-
-require conf/machine/include/arm/arch-armv8m-main.inc
-
-# GCC thnks that DSP and VFP are required, but Arm docs say it is
-# optional. So forcing below so that compiling works, but this should
-# be fixed in GCC
-AVAILTUNES += "cortexm33"
-ARMPKGARCH:tune-cortexm33 = "cortexm33"
-TUNE_FEATURES:tune-cortexm33 = "${TUNE_FEATURES:tune-armv8m-maine-vfpv5spd16} cortexm33"
-PACKAGE_EXTRA_ARCHS:tune-cortexm33 = "${PACKAGE_EXTRA_ARCHS:tune-armv8m-maine-vfpv5spd16} cortexm33e-fpv5-spd16"
diff --git a/meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm35p.inc b/meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm35p.inc
deleted file mode 100644
index 60e978f..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/armv8-m/tune-cortexm35p.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Tune Settings for Cortex-M35P
-#
-DEFAULTTUNE ?= "cortexm35p"
-
-TUNEVALID[cortexm35p] = "Enable Cortex-M35p specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm35p', ' -mcpu=cortex-m35p', '', d)}"
-
-require conf/machine/include/arm/arch-armv8m-main.inc
-
-# GCC thnks that DSP and VFP are required, but Arm docs say it is
-# optional. So forcing below so that compiling works, but this should
-# be fixed in GCC
-AVAILTUNES += "cortexm35p"
-ARMPKGARCH:tune-cortexm35p = "cortexm35p"
-TUNE_FEATURES:tune-cortexm35p = "${TUNE_FEATURES:tune-armv8m-maine-vfpv5spd16} cortexm35p"
-PACKAGE_EXTRA_ARCHS:tune-cortexm35p = "${PACKAGE_EXTRA_ARCHS:tune-armv8m-maine-vfpv5spd16} cortexm35pe-fpv5-spd16"
diff --git a/meta-arm-bsp/conf/machine/include/arm/tune-cortexm1.inc b/meta-arm-bsp/conf/machine/include/arm/tune-cortexm1.inc
deleted file mode 100644
index 16661f3..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/tune-cortexm1.inc
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# Tune Settings for Cortex-M1
-#
-DEFAULTTUNE ?= "cortexm1"
-
-TUNEVALID[cortexm1] = "Enable Cortex-M1 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm1', ' -mcpu=cortex-m1', '', d)}"
-
-require conf/machine/include/arm/arch-armv6m.inc
-
-AVAILTUNES += "cortexm1"
-ARMPKGARCH:tune-cortexm1 = "cortexm1"
-TUNE_FEATURES:tune-cortexm1 = "${TUNE_FEATURES:tune-armv6m} cortexm1"
-PACKAGE_EXTRA_ARCHS:tune-cortexm1 = "${PACKAGE_EXTRA_ARCHS:tune-armv6m} cortexm1"
diff --git a/meta-arm-bsp/conf/machine/include/arm/tune-cortexm3.inc b/meta-arm-bsp/conf/machine/include/arm/tune-cortexm3.inc
deleted file mode 100644
index a6cb566..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/tune-cortexm3.inc
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# Tune Settings for Cortex-M3
-#
-DEFAULTTUNE ?= "cortexm3"
-
-TUNEVALID[cortexm3] = "Enable Cortex-M3 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm3', ' -mcpu=cortex-m3', '', d)}"
-
-require conf/machine/include/arm/arch-armv7m.inc
-
-AVAILTUNES += "cortexm3"
-ARMPKGARCH:tune-cortexm3 = "cortexm3"
-TUNE_FEATURES:tune-cortexm3 = "${TUNE_FEATURES:tune-armv7m} cortexm3"
-PACKAGE_EXTRA_ARCHS:tune-cortexm3 = "${PACKAGE_EXTRA_ARCHS:tune-armv7m} cortexm3"
diff --git a/meta-arm-bsp/conf/machine/include/arm/tune-cortexm4.inc b/meta-arm-bsp/conf/machine/include/arm/tune-cortexm4.inc
deleted file mode 100644
index e86622f..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/tune-cortexm4.inc
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# Tune Settings for Cortex-M4
-#
-DEFAULTTUNE ?= "cortexm4"
-
-TUNEVALID[cortexm4] = "Enable Cortex-M4 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm4', ' -mcpu=cortex-m4', '', d)}"
-
-require conf/machine/include/arm/arch-armv7em.inc
-
-AVAILTUNES += "cortexm4"
-ARMPKGARCH:tune-cortexm4 = "cortexm4"
-TUNE_FEATURES:tune-cortexm4 = "${TUNE_FEATURES:tune-armv7em} cortexm4"
-PACKAGE_EXTRA_ARCHS:tune-cortexm4 = "${PACKAGE_EXTRA_ARCHS:tune-armv7em} cortexm4"
diff --git a/meta-arm-bsp/conf/machine/include/arm/tune-cortexm7.inc b/meta-arm-bsp/conf/machine/include/arm/tune-cortexm7.inc
deleted file mode 100644
index 6434ec6..0000000
--- a/meta-arm-bsp/conf/machine/include/arm/tune-cortexm7.inc
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# Tune Settings for Cortex-M7
-#
-DEFAULTTUNE ?= "cortexm7"
-
-TUNEVALID[cortexm7] = "Enable Cortex-M7 specific processor optimizations"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm7', ' -mcpu=cortex-m7', '', d)}"
-
-require conf/machine/include/arm/arch-armv7em.inc
-
-AVAILTUNES += "cortexm7"
-ARMPKGARCH:tune-cortexm7 = "cortexm7"
-TUNE_FEATURES:tune-cortexm7 = "${TUNE_FEATURES:tune-armv7em} cortexm7"
-PACKAGE_EXTRA_ARCHS:tune-cortexm7 = "${PACKAGE_EXTRA_ARCHS:tune-armv7em} cortexm7"
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/3] arm-bsp: cortex-r tunes
2021-08-16 21:39 [PATCH 1/3] arm-bsp: remove upstreamed cortex-m tunes Jon Mason
@ 2021-08-16 21:39 ` Jon Mason
2021-08-16 21:39 ` [PATCH 3/3] qemu-cortex-r5: add support Jon Mason
1 sibling, 0 replies; 3+ messages in thread
From: Jon Mason @ 2021-08-16 21:39 UTC (permalink / raw)
To: meta-arm
Add support for all of the Cortex-R CPUs currently supported in GCC.
Having to get creative here to properly use the GCC extensions.
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
.../conf/machine/include/arm/arch-armv7r.inc | 30 +++++++++++++++
.../conf/machine/include/arm/arch-armv8r.inc | 38 +++++++++++++++++++
.../include/arm/armv7r/tune-cortexr4.inc | 14 +++++++
.../include/arm/armv7r/tune-cortexr4f.inc | 14 +++++++
.../include/arm/armv7r/tune-cortexr5.inc | 14 +++++++
.../include/arm/armv7r/tune-cortexr7.inc | 14 +++++++
.../include/arm/armv7r/tune-cortexr8.inc | 14 +++++++
.../include/arm/armv8r/arch-armv8r64.inc | 34 +++++------------
.../include/arm/armv8r/tune-cortexr52.inc | 14 +++++++
.../machine/include/arm/feature-arm-crc.inc | 4 ++
.../include/arm/feature-arm-crypto.inc | 5 +++
.../machine/include/arm/feature-arm-idiv.inc | 2 +
.../machine/include/arm/feature-arm-simd.inc | 5 +++
13 files changed, 177 insertions(+), 25 deletions(-)
create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv7r.inc
create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv8r.inc
create mode 100644 meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr4.inc
create mode 100644 meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr4f.inc
create mode 100644 meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr5.inc
create mode 100644 meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr7.inc
create mode 100644 meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr8.inc
create mode 100644 meta-arm-bsp/conf/machine/include/arm/armv8r/tune-cortexr52.inc
create mode 100644 meta-arm-bsp/conf/machine/include/arm/feature-arm-crc.inc
create mode 100644 meta-arm-bsp/conf/machine/include/arm/feature-arm-crypto.inc
create mode 100644 meta-arm-bsp/conf/machine/include/arm/feature-arm-idiv.inc
create mode 100644 meta-arm-bsp/conf/machine/include/arm/feature-arm-simd.inc
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv7r.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv7r.inc
new file mode 100755
index 0000000..dd81135
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv7r.inc
@@ -0,0 +1,30 @@
+#
+# Defaults for ARMv7-r
+#
+DEFAULTTUNE ?= "armv7r"
+
+TUNEVALID[armv7r] = "Enable instructions for ARMv7-r"
+TUNE_CCARGS_MARCH = "${@bb.utils.contains('TUNE_FEATURES', 'armv7r', ' -march=armv7-r', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv7r', 'armv7r:', '', d)}"
+
+TUNECONFLICTS[armv7r] = "armv4 armv5 armv6 armv7a"
+
+require conf/machine/include/arm/arch-armv6.inc
+require conf/machine/include/arm/feature-arm-idiv.inc
+require conf/machine/include/arm/feature-arm-neon.inc
+
+AVAILTUNES += "armv7r armv7r-vfpv3d16"
+ARMPKGARCH:tune-armv7r = "armv7r"
+ARMPKGARCH:tune-armv7r-vfpv3d16 = "armv7r"
+TUNE_FEATURES:tune-armv7r = "armv7r"
+TUNE_FEATURES:tune-armv7r-vfpv3d16 = "${TUNE_FEATURES:tune-armv7r} vfpv3d16"
+PACKAGE_EXTRA_ARCHS:tune-armv7r = "armv7r"
+PACKAGE_EXTRA_ARCHS:tune-armv7r-vfpv3d16 = "${PACKAGE_EXTRA_ARCHS:tune-armv7r} tune-armv7r-fpv3d16"
+
+# FIXME - This goes in arch-arm.inc when upstreamed
+# Some -march settings need a +X option passed in. Since we cannot guarantee that any specified TUNE_CCARGS option is set in any order, we must hard code the order here to allow for it.
+TUNE_CCARGS_MARCH_OPTS ??= ""
+TUNE_CCARGS .= "${TUNE_CCARGS_MARCH}${TUNE_CCARGS_MARCH_OPTS}"
+
+# FIXME - Thise goes in feature-arm-neon.inc when upstreamed
+TUNE_CCARGS_MARCH_OPTS .= "${@bb.utils.contains('TUNE_FEATURES', [ 'vfpv3d16', 'vfpv5spd16' ], '+fp', '', d)}"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv8r.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv8r.inc
new file mode 100755
index 0000000..be4ef3e
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv8r.inc
@@ -0,0 +1,38 @@
+#
+# Defaults for ARMv8-r
+#
+DEFAULTTUNE ?= "armv8r"
+
+TUNEVALID[armv8r] = "Enable instructions for ARMv8-r"
+TUNE_CCARGS_MARCH .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8r', ' -march=armv8-r', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8r', 'armv8r:', '', d)}"
+
+require conf/machine/include/arm/arch-arm64.inc
+require conf/machine/include/arm/feature-arm-simd.inc
+require conf/machine/include/arm/feature-arm-crc.inc
+require conf/machine/include/arm/feature-arm-crypto.inc
+
+# All ARMv8 has floating point hardware built in. Null it here to avoid any confusion for 32bit.
+TARGET_FPU_32 = ""
+
+AVAILTUNES += "armv8r armv8r-crc armv8r-crypto armv8r-simd armv8r-crc-crypto armv8r-crc-simd armv8r-crc-crypto-simd"
+ARMPKGARCH:tune-armv8r = "armv8r"
+ARMPKGARCH:tune-armv8r-crc = "armv8r"
+ARMPKGARCH:tune-armv8r-crypto = "armv8r"
+ARMPKGARCH:tune-armv8r-simd = "armv8r"
+ARMPKGARCH:tune-armv8r-crc-crypto = "armv8r"
+ARMPKGARCH:tune-armv8r-crc-simd = "armv8r"
+ARMPKGARCH:tune-armv8r-crc-crypto-simd = "armv8r"
+TUNE_FEATURES:tune-armv8r = "armv8r"
+TUNE_FEATURES:tune-armv8r-crc = "${TUNE_FEATURES:tune-armv8r} crc"
+TUNE_FEATURES:tune-armv8r-crypto = "${TUNE_FEATURES:tune-armv8r} crypto"
+TUNE_FEATURES:tune-armv8r-simd = "${TUNE_FEATURES:tune-armv8r} simd"
+TUNE_FEATURES:tune-armv8r-crc-crypto = "${TUNE_FEATURES:tune-armv8r-crc} crypto"
+TUNE_FEATURES:tune-armv8r-crc-simd = "${TUNE_FEATURES:tune-armv8r-crc} simd"
+TUNE_FEATURES:tune-armv8r-crc-crypto-simd = "${TUNE_FEATURES:tune-armv8r-crc-crypto} simd"
+PACKAGE_EXTRA_ARCHS:tune-armv8r = "armv8r"
+PACKAGE_EXTRA_ARCHS:tune-armv8r-crc = "${PACKAGE_EXTRA_ARCHS:tune-armv8r} armv8r-crc"
+PACKAGE_EXTRA_ARCHS:tune-armv8r-crypto = "${PACKAGE_EXTRA_ARCHS:tune-armv8r} armv8r-crypto"
+PACKAGE_EXTRA_ARCHS:tune-armv8r-simd = "${PACKAGE_EXTRA_ARCHS:tune-armv8r} armv8r-simd"
+PACKAGE_EXTRA_ARCHS:tune-armv8r-crc-simd = "${PACKAGE_EXTRA_ARCHS:tune-armv8r-crc} armv8r-simd armv8r-crc-simd"
+PACKAGE_EXTRA_ARCHS:tune-armv8r-crc-crypto-simd = "${PACKAGE_EXTRA_ARCHS:tune-armv8r-crc-simd} armv8r-crc-crypto-simd"
diff --git a/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr4.inc b/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr4.inc
new file mode 100644
index 0000000..0eed729
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr4.inc
@@ -0,0 +1,14 @@
+#
+# Tune Settings for Cortex-R4
+#
+DEFAULTTUNE ?= "cortexr4"
+
+TUNEVALID[cortexr4] = "Enable Cortex-R4 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexr4', ' -mcpu=cortex-r4', '', d)}"
+
+require conf/machine/include/arm/arch-armv7r.inc
+
+AVAILTUNES += "cortexr4"
+ARMPKGARCH:tune-cortexr4 = "cortexr4"
+TUNE_FEATURES:tune-cortexr4 = "${TUNE_FEATURES:tune-armv7r} cortexr4"
+PACKAGE_EXTRA_ARCHS:tune-cortexr4 = "${PACKAGE_EXTRA_ARCHS:tune-armv7r} cortexr4"
diff --git a/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr4f.inc b/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr4f.inc
new file mode 100644
index 0000000..0712b3a
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr4f.inc
@@ -0,0 +1,14 @@
+#
+# Tune Settings for Cortex-R4F
+#
+DEFAULTTUNE ?= "cortexr4f"
+
+TUNEVALID[cortexr4f] = "Enable Cortex-R4F specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexr4f', ' -mcpu=cortex-r4f', '', d)}"
+
+require conf/machine/include/arm/arch-armv7r.inc
+
+AVAILTUNES += "cortexr4f"
+ARMPKGARCH:tune-cortexr4f = "cortexr4f"
+TUNE_FEATURES:tune-cortexr4f = "${TUNE_FEATURES:tune-armv7r-vfpv3d16} cortexr4f"
+PACKAGE_EXTRA_ARCHS:tune-cortexr4f = "${PACKAGE_EXTRA_ARCHS:tune-armv7r-vfpv3d16} cortexr4f-vfpv3d16"
diff --git a/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr5.inc b/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr5.inc
new file mode 100644
index 0000000..ecaaa0d
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr5.inc
@@ -0,0 +1,14 @@
+#
+# Tune Settings for Cortex-R5
+#
+DEFAULTTUNE ?= "cortexr5"
+
+TUNEVALID[cortexr5] = "Enable Cortex-R5 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexr5', ' -mcpu=cortex-r5', '', d)}"
+
+require conf/machine/include/arm/arch-armv7r.inc
+
+AVAILTUNES += "cortexr5"
+ARMPKGARCH:tune-cortexr5 = "cortexr5"
+TUNE_FEATURES:tune-cortexr5 = "${TUNE_FEATURES:tune-armv7r-vfpv3d16} cortexr5 idiv"
+PACKAGE_EXTRA_ARCHS:tune-cortexr5 = "${PACKAGE_EXTRA_ARCHS:tune-armv7r-vfpv3d16} cortexr5-vfpv3d16"
diff --git a/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr7.inc b/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr7.inc
new file mode 100644
index 0000000..bfae1f0
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr7.inc
@@ -0,0 +1,14 @@
+#
+# Tune Settings for Cortex-R7
+#
+DEFAULTTUNE ?= "cortexr7"
+
+TUNEVALID[cortexr7] = "Enable Cortex-R7 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexr7', ' -mcpu=cortex-r7', '', d)}"
+
+require conf/machine/include/arm/arch-armv7r.inc
+
+AVAILTUNES += "cortexr7"
+ARMPKGARCH:tune-cortexr7 = "cortexr7"
+TUNE_FEATURES:tune-cortexr7 = "${TUNE_FEATURES:tune-armv7r-vfpv3d16} cortexr7 idiv"
+PACKAGE_EXTRA_ARCHS:tune-cortexr7 = "${PACKAGE_EXTRA_ARCHS:tune-armv7r-vfpv3d16} cortexr7-vfpv3d16"
diff --git a/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr8.inc b/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr8.inc
new file mode 100644
index 0000000..7fb824f
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/armv7r/tune-cortexr8.inc
@@ -0,0 +1,14 @@
+#
+# Tune Settings for Cortex-R8
+#
+DEFAULTTUNE ?= "cortexr8"
+
+TUNEVALID[cortexr8] = "Enable Cortex-R8 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexr8', ' -mcpu=cortex-r8', '', d)}"
+
+require conf/machine/include/arm/arch-armv7r.inc
+
+AVAILTUNES += "cortexr8"
+ARMPKGARCH:tune-cortexr8 = "cortexr8"
+TUNE_FEATURES:tune-cortexr8 = "${TUNE_FEATURES:tune-armv7r-vfpv3d16} cortexr8 idiv"
+PACKAGE_EXTRA_ARCHS:tune-cortexr8 = "${PACKAGE_EXTRA_ARCHS:tune-armv7r-vfpv3d16} cortexr8-vfpv3d16"
diff --git a/meta-arm-bsp/conf/machine/include/arm/armv8r/arch-armv8r64.inc b/meta-arm-bsp/conf/machine/include/arm/armv8r/arch-armv8r64.inc
index f9383fc..5db12e2 100644
--- a/meta-arm-bsp/conf/machine/include/arm/armv8r/arch-armv8r64.inc
+++ b/meta-arm-bsp/conf/machine/include/arm/armv8r/arch-armv8r64.inc
@@ -1,26 +1,10 @@
-DEFAULTTUNE ?= "armv8r"
+require conf/machine/include/arm/arch-armv8r.inc
-TUNEVALID[armv8r] = "Enable instructions for ARMv8-r"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8r', ' -march=armv8-r', '', d)}"
-TUNEVALID[crc] = "Enable instructions for ARMv8-r Cyclic Redundancy Check (CRC)"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'crc', '+crc', '', d)}"
-TUNEVALID[crypto] = "Enable instructions for ARMv8-r cryptographic"
-TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'crypto', '+crypto', '', d)}"
-MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8r', 'armv8-r:', '', d)}"
-
-require conf/machine/include/arm/arch-arm64.inc
-
-# Little Endian base configs
-AVAILTUNES += "armv8r armv8r-crc armv8r-crypto"
-ARMPKGARCH:tune-armv8r ?= "armv8r"
-ARMPKGARCH:tune-armv8r-crc ?= "armv8r"
-ARMPKGARCH:tune-armv8r-crypto ?= "armv8r"
-TUNE_FEATURES:tune-armv8r = "aarch64 armv8r"
-TUNE_FEATURES:tune-armv8r-crc = "${TUNE_FEATURES:tune-armv8r} crc"
-TUNE_FEATURES:tune-armv8r-crypto = "${TUNE_FEATURES:tune-armv8r} crypto"
-PACKAGE_EXTRA_ARCHS:tune-armv8r = "aarch64 armv8r"
-PACKAGE_EXTRA_ARCHS:tune-armv8r-crc = "${PACKAGE_EXTRA_ARCHS:tune-armv8r} armv8r-crc"
-PACKAGE_EXTRA_ARCHS:tune-armv8r-crypto = "${PACKAGE_EXTRA_ARCHS:tune-armv8r} armv8r-crypto"
-BASE_LIB:tune-armv8r = "lib64"
-BASE_LIB:tune-armv8r-crc = "lib64"
-BASE_LIB:tune-armv8r-crypto = "lib64"
+TUNE_FEATURES:tune-armv8r =+ "aarch64"
+PACKAGE_EXTRA_ARCHS:tune-armv8r =+ "aarch64"
+BASE_LIB:tune-armv8r = "lib64"
+BASE_LIB:tune-armv8r-crc = "lib64"
+BASE_LIB:tune-armv8r-crypto = "lib64"
+BASE_LIB:tune-armv8r-simd = "lib64"
+BASE_LIB:tune-armv8r-crc-simd = "lib64"
+BASE_LIB:tune-armv8r-crc-crypto-simd = "lib64"
diff --git a/meta-arm-bsp/conf/machine/include/arm/armv8r/tune-cortexr52.inc b/meta-arm-bsp/conf/machine/include/arm/armv8r/tune-cortexr52.inc
new file mode 100644
index 0000000..3a97cf8
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/armv8r/tune-cortexr52.inc
@@ -0,0 +1,14 @@
+#
+# Tune Settings for Cortex-R52
+#
+DEFAULTTUNE ?= "cortexr52"
+
+TUNEVALID[cortexr52] = "Enable Cortex-R52 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexr52', ' -mcpu=cortex-r52', '', d)}"
+
+require conf/machine/include/arm/arch-armv8r.inc
+
+AVAILTUNES += "cortexr52"
+ARMPKGARCH:tune-cortexr52 = "cortexr52"
+TUNE_FEATURES:tune-cortexr52 = "${TUNE_FEATURES:tune-armv8r-crc-simd} cortexr52"
+PACKAGE_EXTRA_ARCHS:tune-cortexr52 = "${PACKAGE_EXTRA_ARCHS:tune-armv8r-crc-simd} cortexr52"
diff --git a/meta-arm-bsp/conf/machine/include/arm/feature-arm-crc.inc b/meta-arm-bsp/conf/machine/include/arm/feature-arm-crc.inc
new file mode 100644
index 0000000..8a69d2e
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/feature-arm-crc.inc
@@ -0,0 +1,4 @@
+# Cyclic Redundancy Check (CRC) instructions for armv8-a and armv8-r
+
+TUNEVALID[crc] = "Enable instructions for ARMv8 Cyclic Redundancy Check (CRC)"
+TUNE_CCARGS_MARCH_OPTS .= "${@bb.utils.contains('TUNE_FEATURES', 'crc', '+crc', '', d)}"
diff --git a/meta-arm-bsp/conf/machine/include/arm/feature-arm-crypto.inc b/meta-arm-bsp/conf/machine/include/arm/feature-arm-crypto.inc
new file mode 100644
index 0000000..aade6ce
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/feature-arm-crypto.inc
@@ -0,0 +1,5 @@
+# Cryptographic instructions for:
+# armv8-a, armv8.1-a, armv8.3-a, armv8.4-a, armv8.5-a, armv8.6-a, and armv8-r
+
+TUNEVALID[crypto] = "Enable cryptographic instructions for ARMv8"
+TUNE_CCARGS_MARCH_OPTS .= "${@bb.utils.contains('TUNE_FEATURES', 'crypto', '+crypto', '', d)}"
diff --git a/meta-arm-bsp/conf/machine/include/arm/feature-arm-idiv.inc b/meta-arm-bsp/conf/machine/include/arm/feature-arm-idiv.inc
new file mode 100644
index 0000000..0ea42b1
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/feature-arm-idiv.inc
@@ -0,0 +1,2 @@
+TUNEVALID[idiv] = "ARM-state integer division instructions"
+TUNE_CCARGS_MARCH_OPTS .= "${@bb.utils.contains('TUNE_FEATURES', 'idiv', '+idiv', '', d)}"
diff --git a/meta-arm-bsp/conf/machine/include/arm/feature-arm-simd.inc b/meta-arm-bsp/conf/machine/include/arm/feature-arm-simd.inc
new file mode 100644
index 0000000..1afaf8d
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/feature-arm-simd.inc
@@ -0,0 +1,5 @@
+# Advanced SIMD and floating-point instructions for armv7-a, armv7ve,
+# armv8-a, armv8.1-a, armv8.3-a, armv8.4-a, armv8.5-a, armv8.6-a, and armv8-r
+
+TUNEVALID[simd] = "Enable instructions for Advanced SIMD and floating-point units"
+TUNE_CCARGS_MARCH_OPTS .= "${@bb.utils.contains('TUNE_FEATURES', 'simd', '+simd', '', d)}"
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 3/3] qemu-cortex-r5: add support
2021-08-16 21:39 [PATCH 1/3] arm-bsp: remove upstreamed cortex-m tunes Jon Mason
2021-08-16 21:39 ` [PATCH 2/3] arm-bsp: cortex-r tunes Jon Mason
@ 2021-08-16 21:39 ` Jon Mason
1 sibling, 0 replies; 3+ messages in thread
From: Jon Mason @ 2021-08-16 21:39 UTC (permalink / raw)
To: meta-arm
Mostly for testing out cortex-r tunes...mostly
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
.gitlab-ci.yml | 3 +++
ci/qemu-cortex-r5.yml | 10 +++++++++
meta-arm-bsp/conf/machine/qemu-cortex-r5.conf | 22 +++++++++++++++++++
3 files changed, 35 insertions(+)
create mode 100644 ci/qemu-cortex-r5.yml
create mode 100644 meta-arm-bsp/conf/machine/qemu-cortex-r5.conf
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index c2a56b5..697603b 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -153,6 +153,9 @@ n1sdp/armgcc:
qemu-cortex-a53:
extends: .build
+qemu-cortex-r5:
+ extends: .build
+
qemuarm64-sbsa:
extends: .build
diff --git a/ci/qemu-cortex-r5.yml b/ci/qemu-cortex-r5.yml
new file mode 100644
index 0000000..1c4e013
--- /dev/null
+++ b/ci/qemu-cortex-r5.yml
@@ -0,0 +1,10 @@
+header:
+ version: 9
+ includes:
+ - base.yml
+ - meta-zephyr.yml
+
+machine: qemu-cortex-r5
+
+target:
+ - zephyr-philosophers
diff --git a/meta-arm-bsp/conf/machine/qemu-cortex-r5.conf b/meta-arm-bsp/conf/machine/qemu-cortex-r5.conf
new file mode 100644
index 0000000..29b37d7
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/qemu-cortex-r5.conf
@@ -0,0 +1,22 @@
+#@TYPE: Machine
+#@NAME: qemu_cortex_r5
+#@DESCRIPTION: Machine for Zephyr BOARD qemu_cortex_r5
+
+require conf/machine/include/qemu.inc
+require conf/machine/include/arm/armv7r/tune-cortexr5.inc
+
+# GLIBC will not work with Cortex-R.
+TCLIBC = "newlib"
+
+# For runqemu
+QB_SYSTEM_NAME = "qemu-system-aarch64"
+QB_MACHINE = "-machine xlnx-zcu102"
+QB_CPU = "-cpu cortex-r5"
+QB_MEM = "-m 64k"
+QB_OPT_APPEND = "-nographic -vga none"
+QB_RNG = ""
+
+# Zephyr RTOS settings
+ZEPHYR_BOARD = "qemu_cortex_r5"
+ZEPHYR_INHERIT_CLASSES += "zephyr-qemuboot"
+ARCH:qemu-cortex-r5 = "arm"
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-08-17 19:08 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-08-16 21:39 [PATCH 1/3] arm-bsp: remove upstreamed cortex-m tunes Jon Mason
2021-08-16 21:39 ` [PATCH 2/3] arm-bsp: cortex-r tunes Jon Mason
2021-08-16 21:39 ` [PATCH 3/3] qemu-cortex-r5: add support Jon Mason
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