* [PATCH 1/5] arm/boot-wrapper-aarch64: update to a newer SHA
@ 2023-02-23 14:36 Jon Mason
2023-02-23 14:36 ` [PATCH 2/5] arm/gn: update to a more recent SHA Jon Mason
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Jon Mason @ 2023-02-23 14:36 UTC (permalink / raw)
To: meta-arm
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
...abels-and-prepare-for-lower-EL-booti.patch | 14 +++++++-------
...0002-aarch64-Prepare-for-EL1-booting.patch | 8 ++++----
...aarch64-Prepare-for-lower-EL-booting.patch | 12 ++++++------
...04-gic-v3-Prepare-for-gicv3-with-EL2.patch | 2 +-
...aarch64-Prepare-for-booting-with-EL2.patch | 6 +++---
...ce-EL2-boot-code-for-Armv8-R-AArch64.patch | 14 +++++++-------
...e-psci-to-choose-between-smc-and-hvc.patch | 4 ++--
...4-Disable-CNTPCT_EL0-trap-for-v8-R64.patch | 6 +++---
.../0009-lds-Mark-the-mem-range.patch | 2 +-
.../0010-common-Introduce-the-libfdt.patch | 2 +-
...-common-Add-essential-libc-functions.patch | 2 +-
...dd-the-libfdt-to-the-Makefile-system.patch | 12 ++++++------
.../0013-platform-Add-print_hex-func.patch | 2 +-
...4-common-Add-mem-usage-to-memreserve.patch | 4 ++--
...dd-the-enable-keep-el-compile-option.patch | 10 +++++-----
...efile-Change-COUNTER_FREQ-to-100-MHz.patch | 7 ++-----
...lush-cache-after-setting-branch_data.patch | 5 +----
...8-PSCI-Add-function-call-entry-point.patch | 5 +----
...-lds-Rearrange-and-mark-the-sections.patch | 5 +----
...n-Provide-firmware-info-using-libfdt.patch | 5 +----
...-Enable-firmware-node-initialization.patch | 19 ++++++++-----------
.../boot-wrapper-aarch64_git.bb | 2 +-
22 files changed, 65 insertions(+), 83 deletions(-)
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0001-aarch64-Rename-labels-and-prepare-for-lower-EL-booti.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0001-aarch64-Rename-labels-and-prepare-for-lower-EL-booti.patch
index 566070a4..31fd5152 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0001-aarch64-Rename-labels-and-prepare-for-lower-EL-booti.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0001-aarch64-Rename-labels-and-prepare-for-lower-EL-booti.patch
@@ -1,4 +1,4 @@
-From 3e7cfbe39a2a053d2a6b0d928cc172ed9d1c6da8 Mon Sep 17 00:00:00 2001
+From 545f6950ae4dc55b4974986aa9629adb16eaf4e1 Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 25 May 2021 07:25:00 +0100
Subject: [PATCH] aarch64: Rename labels and prepare for lower EL booting
@@ -18,10 +18,10 @@ Signed-off-by: Jaxson Han <jaxson.han@arm.com>
3 files changed, 27 insertions(+), 14 deletions(-)
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index 27ba449..84e1646 100644
+index d682ba5..fab694e 100644
--- a/arch/aarch64/boot.S
+++ b/arch/aarch64/boot.S
-@@ -21,18 +21,30 @@ ASM_FUNC(_start)
+@@ -34,18 +34,30 @@ ASM_FUNC(_start)
/*
* EL3 initialisation
@@ -56,7 +56,7 @@ index 27ba449..84e1646 100644
orr x0, x0, #(1 << 0) // Non-secure EL1
orr x0, x0, #(1 << 8) // HVC enable
-@@ -124,7 +136,7 @@ ASM_FUNC(_start)
+@@ -145,7 +157,7 @@ ASM_FUNC(_start)
bl gic_secure_init
@@ -65,7 +65,7 @@ index 27ba449..84e1646 100644
err_invalid_id:
b .
-@@ -151,7 +163,7 @@ ASM_FUNC(jump_kernel)
+@@ -172,7 +184,7 @@ ASM_FUNC(jump_kernel)
bl find_logical_id
bl setup_stack // Reset stack pointer
@@ -74,7 +74,7 @@ index 27ba449..84e1646 100644
cmp w0, #0 // Prepare Z flag
mov x0, x20
-@@ -160,7 +172,7 @@ ASM_FUNC(jump_kernel)
+@@ -181,7 +193,7 @@ ASM_FUNC(jump_kernel)
mov x3, x23
b.eq 1f
@@ -83,7 +83,7 @@ index 27ba449..84e1646 100644
1: mov x4, #SPSR_KERNEL
-@@ -178,5 +190,5 @@ ASM_FUNC(jump_kernel)
+@@ -199,5 +211,5 @@ ASM_FUNC(jump_kernel)
.data
.align 3
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0002-aarch64-Prepare-for-EL1-booting.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0002-aarch64-Prepare-for-EL1-booting.patch
index 46447b8f..4ef4507e 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0002-aarch64-Prepare-for-EL1-booting.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0002-aarch64-Prepare-for-EL1-booting.patch
@@ -1,4 +1,4 @@
-From 26f9b5354c2de9cc052531096ff92b04c3a3846f Mon Sep 17 00:00:00 2001
+From bad32d3fc127a421be416b17e4f7d6d514f06abb Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 25 May 2021 07:25:00 +0100
Subject: [PATCH] aarch64: Prepare for EL1 booting
@@ -15,10 +15,10 @@ Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index 84e1646..b589744 100644
+index fab694e..5105b41 100644
--- a/arch/aarch64/boot.S
+++ b/arch/aarch64/boot.S
-@@ -156,10 +156,14 @@ ASM_FUNC(jump_kernel)
+@@ -177,10 +177,14 @@ ASM_FUNC(jump_kernel)
ldr x0, =SCTLR_EL1_KERNEL
msr sctlr_el1, x0
@@ -35,7 +35,7 @@ index 84e1646..b589744 100644
bl setup_stack // Reset stack pointer
diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h
-index 63eb1c3..b1003f4 100644
+index 49d3f86..3767da3 100644
--- a/arch/aarch64/include/asm/cpu.h
+++ b/arch/aarch64/include/asm/cpu.h
@@ -11,6 +11,7 @@
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0003-aarch64-Prepare-for-lower-EL-booting.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0003-aarch64-Prepare-for-lower-EL-booting.patch
index db81355b..c621187b 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0003-aarch64-Prepare-for-lower-EL-booting.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0003-aarch64-Prepare-for-lower-EL-booting.patch
@@ -1,4 +1,4 @@
-From ce628de7699dd6401ddf713efaa49872e2733619 Mon Sep 17 00:00:00 2001
+From 252cbd36e51414b60ab68306f9c38e358709494d Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 25 May 2021 07:25:00 +0100
Subject: [PATCH] aarch64: Prepare for lower EL booting
@@ -17,11 +17,11 @@ Reviewed-by: Andre Przywara <andre.przywara@arm.com>
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index b589744..6b45afc 100644
+index 5105b41..243198d 100644
--- a/arch/aarch64/boot.S
+++ b/arch/aarch64/boot.S
-@@ -130,7 +130,16 @@ el3_init:
- mov x0, #ZCR_EL3_LEN_MASK // SVE: Enable full vector len
+@@ -151,7 +151,16 @@ el3_init:
+ mov x0, #ZCR_EL3_LEN_MAX // SVE: Enable full vector len
msr ZCR_EL3, x0 // for EL2.
-1:
@@ -38,7 +38,7 @@ index b589744..6b45afc 100644
ldr x0, =COUNTER_FREQ
msr cntfrq_el0, x0
-@@ -178,7 +187,7 @@ ASM_FUNC(jump_kernel)
+@@ -199,7 +208,7 @@ ASM_FUNC(jump_kernel)
b.eq 1f
br x19 // Keep current EL
@@ -47,7 +47,7 @@ index b589744..6b45afc 100644
/*
* If bit 0 of the kernel address is set, we're entering in AArch32
-@@ -196,3 +205,5 @@ ASM_FUNC(jump_kernel)
+@@ -217,3 +226,5 @@ ASM_FUNC(jump_kernel)
.align 3
flag_keep_el:
.long 0
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0004-gic-v3-Prepare-for-gicv3-with-EL2.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0004-gic-v3-Prepare-for-gicv3-with-EL2.patch
index e10182e1..43885b93 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0004-gic-v3-Prepare-for-gicv3-with-EL2.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0004-gic-v3-Prepare-for-gicv3-with-EL2.patch
@@ -1,4 +1,4 @@
-From 483d363bf825082b6db6de3c57d169e741861891 Mon Sep 17 00:00:00 2001
+From bff110a95a5e4c9db2d61e629b4aa4b84530201e Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 25 May 2021 07:25:00 +0100
Subject: [PATCH] gic-v3: Prepare for gicv3 with EL2
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0005-aarch64-Prepare-for-booting-with-EL2.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0005-aarch64-Prepare-for-booting-with-EL2.patch
index 3b6f78a5..c6343456 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0005-aarch64-Prepare-for-booting-with-EL2.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0005-aarch64-Prepare-for-booting-with-EL2.patch
@@ -1,4 +1,4 @@
-From be814863cdd5f61d9a16eec012d500550053c8c6 Mon Sep 17 00:00:00 2001
+From ba955efb35ce1d41b562190d7c2fbcbcf8ef97ff Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 25 May 2021 07:25:00 +0100
Subject: [PATCH] aarch64: Prepare for booting with EL2
@@ -15,10 +15,10 @@ Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index 6b45afc..908764a 100644
+index 243198d..3593ca5 100644
--- a/arch/aarch64/boot.S
+++ b/arch/aarch64/boot.S
-@@ -195,10 +195,18 @@ ASM_FUNC(jump_kernel)
+@@ -216,10 +216,18 @@ ASM_FUNC(jump_kernel)
*/
bfi x4, x19, #5, #1
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0006-aarch64-Introduce-EL2-boot-code-for-Armv8-R-AArch64.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0006-aarch64-Introduce-EL2-boot-code-for-Armv8-R-AArch64.patch
index aaacc729..18dc7ed7 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0006-aarch64-Introduce-EL2-boot-code-for-Armv8-R-AArch64.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0006-aarch64-Introduce-EL2-boot-code-for-Armv8-R-AArch64.patch
@@ -1,4 +1,4 @@
-From 81df76f8d94cb6c31c01739b078a72bdb8497441 Mon Sep 17 00:00:00 2001
+From 8e44fac113d935affed1550480631f3fe7f30584 Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 25 May 2021 07:25:00 +0100
Subject: [PATCH] aarch64: Introduce EL2 boot code for Armv8-R AArch64
@@ -36,10 +36,10 @@ Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2 files changed, 92 insertions(+), 2 deletions(-)
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index 908764a..def9192 100644
+index 3593ca5..a219ea7 100644
--- a/arch/aarch64/boot.S
+++ b/arch/aarch64/boot.S
-@@ -24,16 +24,24 @@ ASM_FUNC(_start)
+@@ -37,16 +37,24 @@ ASM_FUNC(_start)
* Boot sequence
* If CurrentEL == EL3, then goto EL3 initialisation and drop to
* lower EL before entering the kernel.
@@ -66,7 +66,7 @@ index 908764a..def9192 100644
mov w0, #1
ldr x1, =flag_keep_el
str w0, [x1]
-@@ -139,6 +147,85 @@ el3_init:
+@@ -160,6 +168,85 @@ el3_init:
str w0, [x1]
b el_max_init
@@ -152,7 +152,7 @@ index 908764a..def9192 100644
el_max_init:
ldr x0, =COUNTER_FREQ
msr cntfrq_el0, x0
-@@ -148,6 +235,7 @@ el_max_init:
+@@ -169,6 +256,7 @@ el_max_init:
b start_el_max
err_invalid_id:
@@ -161,7 +161,7 @@ index 908764a..def9192 100644
/*
diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h
-index b1003f4..91f803c 100644
+index 3767da3..3c0e00d 100644
--- a/arch/aarch64/include/asm/cpu.h
+++ b/arch/aarch64/include/asm/cpu.h
@@ -25,6 +25,7 @@
@@ -172,7 +172,7 @@ index b1003f4..91f803c 100644
#define SPSR_EL2H (9 << 0) /* EL2 Handler mode */
#define SPSR_HYP (0x1a << 0) /* M[3:0] = hyp, M[4] = AArch32 */
-@@ -43,6 +44,7 @@
+@@ -50,6 +51,7 @@
#else
#define SCTLR_EL1_KERNEL SCTLR_EL1_RES1
#define SPSR_KERNEL (SPSR_A | SPSR_D | SPSR_I | SPSR_F | SPSR_EL2H)
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0007-Allow-enable-psci-to-choose-between-smc-and-hvc.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0007-Allow-enable-psci-to-choose-between-smc-and-hvc.patch
index b1308548..131e2710 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0007-Allow-enable-psci-to-choose-between-smc-and-hvc.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0007-Allow-enable-psci-to-choose-between-smc-and-hvc.patch
@@ -1,4 +1,4 @@
-From f5a31b4f4ea8daaa0d337d5a2322ddb1912083fc Mon Sep 17 00:00:00 2001
+From 0b9a966b8a28961b078215ee7169e32a976d5e7d Mon Sep 17 00:00:00 2001
From: Qi Feng <qi.feng@arm.com>
Date: Wed, 26 May 2021 17:52:01 +0800
Subject: [PATCH] Allow --enable-psci to choose between smc and hvc
@@ -40,7 +40,7 @@ Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/Makefile.am b/Makefile.am
-index f941b07..88a27de 100644
+index 5731a19..fc66662 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -50,11 +50,11 @@ endif
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0008-aarch64-Disable-CNTPCT_EL0-trap-for-v8-R64.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0008-aarch64-Disable-CNTPCT_EL0-trap-for-v8-R64.patch
index 2ce28b70..d3ccb2eb 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0008-aarch64-Disable-CNTPCT_EL0-trap-for-v8-R64.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0008-aarch64-Disable-CNTPCT_EL0-trap-for-v8-R64.patch
@@ -1,4 +1,4 @@
-From 3f4614e02f0f8d2522510578da2752f8e3511bb3 Mon Sep 17 00:00:00 2001
+From 521c121eccb386aca7c75d92528e495546adccec Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Mon, 25 Oct 2021 17:09:13 +0800
Subject: [PATCH] aarch64: Disable CNTPCT_EL0 trap for v8-R64
@@ -24,10 +24,10 @@ Change-Id: I4147e66341c8153312021e6f2ab67d0037246da1
1 file changed, 12 insertions(+)
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index def9192..6dbd5cc 100644
+index a219ea7..27b1139 100644
--- a/arch/aarch64/boot.S
+++ b/arch/aarch64/boot.S
-@@ -219,6 +219,18 @@ el2_init:
+@@ -240,6 +240,18 @@ el2_init:
orr x0, x0, #(1 << 41) // HCR_EL2.API
1: msr hcr_el2, x0
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0009-lds-Mark-the-mem-range.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0009-lds-Mark-the-mem-range.patch
index 0c310eb5..c34d01c3 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0009-lds-Mark-the-mem-range.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0009-lds-Mark-the-mem-range.patch
@@ -1,4 +1,4 @@
-From 2851f0e6c1216894b9498d7b91256bb1ef49e544 Mon Sep 17 00:00:00 2001
+From 780df234d98db81485b1f351f902a68def35c9d4 Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 2 Nov 2021 15:10:28 +0800
Subject: [PATCH] lds: Mark the mem range
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0010-common-Introduce-the-libfdt.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0010-common-Introduce-the-libfdt.patch
index 0305f8ba..2d12db59 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0010-common-Introduce-the-libfdt.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0010-common-Introduce-the-libfdt.patch
@@ -1,4 +1,4 @@
-From fadf04f44b679d85e55b2e5f220fecbebb52ad03 Mon Sep 17 00:00:00 2001
+From b3762b6c5a56bf594bc5cb63d145e8efd86e106e Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 28 Dec 2021 17:02:17 +0800
Subject: [PATCH] common: Introduce the libfdt
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0011-common-Add-essential-libc-functions.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0011-common-Add-essential-libc-functions.patch
index 871a178f..b7726f51 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0011-common-Add-essential-libc-functions.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0011-common-Add-essential-libc-functions.patch
@@ -1,4 +1,4 @@
-From 0f2c7ca446063be6b193fbf870d38c0af19e15c5 Mon Sep 17 00:00:00 2001
+From e2eff4f80e65cb3fcbe6345b5376a6bf7de7e2cc Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 28 Dec 2021 17:28:25 +0800
Subject: [PATCH] common: Add essential libc functions
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0012-Makefile-Add-the-libfdt-to-the-Makefile-system.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0012-Makefile-Add-the-libfdt-to-the-Makefile-system.patch
index 5917ef20..b77ab3e2 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0012-Makefile-Add-the-libfdt-to-the-Makefile-system.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0012-Makefile-Add-the-libfdt-to-the-Makefile-system.patch
@@ -1,4 +1,4 @@
-From de5d2b6c200ae5dd8113751e58bf7cf5844eec5a Mon Sep 17 00:00:00 2001
+From f4d5cf4c3424598a2b3bb391717313b70c79ea28 Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 28 Dec 2021 17:42:48 +0800
Subject: [PATCH] Makefile: Add the libfdt to the Makefile system
@@ -17,7 +17,7 @@ Change-Id: I472bc28cdc5cde3b22461a4b7d7a3752ae382b4b
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/Makefile.am b/Makefile.am
-index 88a27de..5e8668a 100644
+index fc66662..ab2c3a9 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -36,6 +36,9 @@ PSCI_CPU_OFF := 0x84000002
@@ -30,10 +30,10 @@ index 88a27de..5e8668a 100644
ARCH_OBJ := boot.o stack.o utils.o
if BOOTWRAPPER_32
-@@ -125,11 +128,12 @@ CHOSEN_NODE := chosen { \
- CPPFLAGS += $(INITRD_FLAGS)
- CFLAGS += -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/
+@@ -127,11 +130,12 @@ CFLAGS += -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/
CFLAGS += -Wall -fomit-frame-pointer
+ CFLAGS += -ffreestanding -nostdlib
+ CFLAGS += -fno-stack-protector
+CFLAGS += -fno-stack-protector
CFLAGS += -ffunction-sections -fdata-sections
CFLAGS += -fno-pic -fno-pie
@@ -44,7 +44,7 @@ index 88a27de..5e8668a 100644
# Don't lookup all prerequisites in $(top_srcdir), only the source files. When
# building outside the source tree $(ARCH_SRC) needs to be created.
-@@ -150,10 +154,13 @@ $(ARCH_SRC):
+@@ -152,10 +156,13 @@ $(ARCH_SRC):
$(COMMON_SRC):
$(MKDIR_P) $@
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0013-platform-Add-print_hex-func.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0013-platform-Add-print_hex-func.patch
index 136e18ed..2346109c 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0013-platform-Add-print_hex-func.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0013-platform-Add-print_hex-func.patch
@@ -1,4 +1,4 @@
-From 5b8cb5192dbd0332e027e8999c3afe4433983291 Mon Sep 17 00:00:00 2001
+From f0ece5e8cac761a76a86df7204bae7c6ef09215f Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Wed, 29 Dec 2021 10:50:21 +0800
Subject: [PATCH] platform: Add print_hex func
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0014-common-Add-mem-usage-to-memreserve.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0014-common-Add-mem-usage-to-memreserve.patch
index ea518160..f4ea89c6 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0014-common-Add-mem-usage-to-memreserve.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0014-common-Add-mem-usage-to-memreserve.patch
@@ -1,4 +1,4 @@
-From b447242cd2457bec20d47fe6a8a5758d97a3bde3 Mon Sep 17 00:00:00 2001
+From f4704146e1af9f6e0a2220db6b39a328c813fac1 Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Wed, 19 Jan 2022 16:19:02 +0800
Subject: [PATCH] common: Add mem usage to /memreserve/
@@ -20,7 +20,7 @@ Change-Id: I2ea80cdf736a910fa2c3deb622e21d50f04be960
create mode 100644 common/device_tree.c
diff --git a/Makefile.am b/Makefile.am
-index 5e8668a..734de92 100644
+index ab2c3a9..e905602 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -34,7 +34,7 @@ endif
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0015-boot-Add-the-enable-keep-el-compile-option.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0015-boot-Add-the-enable-keep-el-compile-option.patch
index 0411ef02..7d59e5fc 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0015-boot-Add-the-enable-keep-el-compile-option.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0015-boot-Add-the-enable-keep-el-compile-option.patch
@@ -1,4 +1,4 @@
-From 8271c21bcff260295203214b7b8c87cdb8236453 Mon Sep 17 00:00:00 2001
+From 5995f83592aea874f5b423538e36675e2204582b Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 4 Jan 2022 17:01:55 +0800
Subject: [PATCH] boot: Add the --enable-keep-el compile option
@@ -23,7 +23,7 @@ Change-Id: I3ba9c87cf0b59d163ca433f74c9e3a46e5ca2c63
4 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/Makefile.am b/Makefile.am
-index 734de92..054becd 100644
+index e905602..6604baa 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -33,6 +33,10 @@ PSCI_CPU_ON := 0xc4000003
@@ -38,10 +38,10 @@ index 734de92..054becd 100644
COMMON_OBJ := boot.o bakery_lock.o platform.o lib.o device_tree.o
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index 6dbd5cc..157c097 100644
+index 27b1139..c079d22 100644
--- a/arch/aarch64/boot.S
+++ b/arch/aarch64/boot.S
-@@ -233,7 +233,11 @@ el2_init:
+@@ -254,7 +254,11 @@ el2_init:
msr cnthctl_el2, x0
isb
@@ -53,7 +53,7 @@ index 6dbd5cc..157c097 100644
ldr x1, =spsr_to_elx
str w0, [x1]
// fall through
-@@ -313,5 +317,5 @@ ASM_FUNC(jump_kernel)
+@@ -334,5 +338,5 @@ ASM_FUNC(jump_kernel)
.align 3
flag_keep_el:
.long 0
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0016-Makefile-Change-COUNTER_FREQ-to-100-MHz.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0016-Makefile-Change-COUNTER_FREQ-to-100-MHz.patch
index a6b16e40..e93a300f 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0016-Makefile-Change-COUNTER_FREQ-to-100-MHz.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0016-Makefile-Change-COUNTER_FREQ-to-100-MHz.patch
@@ -1,4 +1,4 @@
-From dd3e3f414d0e6ed1643c2e2ccac676b7fc1dc7a9 Mon Sep 17 00:00:00 2001
+From 0c0695cd3160ccdb95bae29b7668918015c0b6aa Mon Sep 17 00:00:00 2001
From: Peter Hoyes <Peter.Hoyes@arm.com>
Date: Tue, 1 Feb 2022 11:28:46 +0000
Subject: [PATCH] Makefile: Change COUNTER_FREQ to 100 MHz
@@ -17,7 +17,7 @@ Change-Id: Ia9ad0f8ee488d1a887791f1fa1d8f3bf9c5887fd
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile.am b/Makefile.am
-index 40bc5d6..b48173c 100644
+index 6604baa..cc6504e 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -13,7 +13,7 @@ SCRIPT_DIR := $(top_srcdir)/scripts
@@ -29,6 +29,3 @@ index 40bc5d6..b48173c 100644
CPU_IDS := $(shell perl -I $(SCRIPT_DIR) $(SCRIPT_DIR)/findcpuids.pl $(KERNEL_DTB))
NR_CPUS := $(shell echo $(CPU_IDS) | tr ',' ' ' | wc -w)
---
-2.25.1
-
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0017-PSCI-Apply-flush-cache-after-setting-branch_data.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0017-PSCI-Apply-flush-cache-after-setting-branch_data.patch
index 8d981f52..b63d8d1d 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0017-PSCI-Apply-flush-cache-after-setting-branch_data.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0017-PSCI-Apply-flush-cache-after-setting-branch_data.patch
@@ -1,4 +1,4 @@
-From 6923f2a0c59cf92ba5ad50ec1d658a357b4ba5d7 Mon Sep 17 00:00:00 2001
+From fa73d885be85eee4369b292ec601e7b024a68807 Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 2 Nov 2021 10:48:39 +0800
Subject: [PATCH] PSCI: Apply flush cache after setting branch_data
@@ -47,6 +47,3 @@ index 945780b..6efc695 100644
return PSCI_RET_SUCCESS;
}
---
-2.25.1
-
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0018-PSCI-Add-function-call-entry-point.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0018-PSCI-Add-function-call-entry-point.patch
index 97cd3cb9..dd2b9653 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0018-PSCI-Add-function-call-entry-point.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0018-PSCI-Add-function-call-entry-point.patch
@@ -1,4 +1,4 @@
-From ed46e83df2400b1b3f3364169aacf787bd91bd45 Mon Sep 17 00:00:00 2001
+From 9da48e3433b919868650cd60e28827273a42c63b Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 25 Jan 2022 14:56:36 +0800
Subject: [PATCH] PSCI: Add function call entry point
@@ -69,6 +69,3 @@ index 6efc695..8fdefb5 100644
void __noreturn psci_first_spin(unsigned int cpu)
{
if (cpu == MPIDR_INVALID)
---
-2.25.1
-
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0019-lds-Rearrange-and-mark-the-sections.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0019-lds-Rearrange-and-mark-the-sections.patch
index 1f10209d..c0d1fcbb 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0019-lds-Rearrange-and-mark-the-sections.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0019-lds-Rearrange-and-mark-the-sections.patch
@@ -1,4 +1,4 @@
-From 36b5fa3f4db49ac7aef42ff1d58a895226c7e96c Mon Sep 17 00:00:00 2001
+From 7c5e40d9f8699a55ac2187c035429c643e6d0ef0 Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Tue, 2 Nov 2021 15:10:28 +0800
Subject: [PATCH] lds: Rearrange and mark the sections
@@ -56,6 +56,3 @@ index ab98ddf..85451f9 100644
PROVIDE(firmware_end = .);
ASSERT(etext <= (PHYS_OFFSET + TEXT_LIMIT), ".text overflow!")
---
-2.25.1
-
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0020-common-Provide-firmware-info-using-libfdt.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0020-common-Provide-firmware-info-using-libfdt.patch
index cafcc09b..1573be05 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0020-common-Provide-firmware-info-using-libfdt.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0020-common-Provide-firmware-info-using-libfdt.patch
@@ -1,4 +1,4 @@
-From 8bdbb64d13f14d40546b71dbcfee2b2a8ea002a5 Mon Sep 17 00:00:00 2001
+From 3c1140c29c39561848056fb4b9a03042b00279f3 Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Wed, 29 Dec 2021 15:17:38 +0800
Subject: [PATCH] common: Provide firmware info using libfdt
@@ -340,6 +340,3 @@ index 4d0876c..7f7befc 100644
+
+ dt_dump_all(fw_node);
+}
---
-2.25.1
-
diff --git a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0021-boot-Enable-firmware-node-initialization.patch b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0021-boot-Enable-firmware-node-initialization.patch
index 943afdee..9b367a7b 100644
--- a/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0021-boot-Enable-firmware-node-initialization.patch
+++ b/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0021-boot-Enable-firmware-node-initialization.patch
@@ -1,4 +1,4 @@
-From 6dfc937d1ae54d2ae9f8c60ca29ba73ca14dc8c4 Mon Sep 17 00:00:00 2001
+From b1105e862e8f770fc195bc20e9c64d231dd32f66 Mon Sep 17 00:00:00 2001
From: Jaxson Han <jaxson.han@arm.com>
Date: Wed, 29 Dec 2021 15:33:17 +0800
Subject: [PATCH] boot: Enable firmware node initialization
@@ -29,7 +29,7 @@ Change-Id: Ib274485a34d26215595fd0cd737be86610289817
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/Makefile.am b/Makefile.am
-index 054becd..b01809c 100644
+index cc6504e..fbe6b81 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -23,7 +23,7 @@ DEFINES += -DCPU_IDS=$(CPU_IDS)
@@ -41,20 +41,20 @@ index 054becd..b01809c 100644
if KERNEL_32
DEFINES += -DKERNEL_32
-@@ -132,7 +132,7 @@ CHOSEN_NODE := chosen { \
- CPPFLAGS += $(INITRD_FLAGS)
- CFLAGS += -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/
+@@ -134,7 +134,7 @@ CFLAGS += -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/
CFLAGS += -Wall -fomit-frame-pointer
+ CFLAGS += -ffreestanding -nostdlib
+ CFLAGS += -fno-stack-protector
-CFLAGS += -fno-stack-protector
+CFLAGS += -fno-stack-protector -fno-builtin
CFLAGS += -ffunction-sections -fdata-sections
CFLAGS += -fno-pic -fno-pie
LDFLAGS += --gc-sections
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
-index 157c097..f310387 100644
+index c079d22..daaa674 100644
--- a/arch/aarch64/boot.S
+++ b/arch/aarch64/boot.S
-@@ -240,6 +240,10 @@ el2_init:
+@@ -261,6 +261,10 @@ el2_init:
#endif
ldr x1, =spsr_to_elx
str w0, [x1]
@@ -65,7 +65,7 @@ index 157c097..f310387 100644
// fall through
el_max_init:
-@@ -319,3 +323,5 @@ flag_keep_el:
+@@ -340,3 +344,5 @@ flag_keep_el:
.long 0
ASM_DATA(spsr_to_elx)
.long 0
@@ -93,6 +93,3 @@ index ee2bea0..38b2dca 100644
*mbox = (unsigned long)&entrypoint;
sevl();
---
-2.25.1
-
diff --git a/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb b/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb
index 411dac0c..cb79069b 100644
--- a/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb
+++ b/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb
@@ -4,7 +4,7 @@ LICENSE = "BSD-3-Clause"
LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=bb63326febfb5fb909226c8e7ebcef5c"
SRC_URI = "git://git.kernel.org/pub/scm/linux/kernel/git/mark/boot-wrapper-aarch64.git;branch=master"
-SRCREV = "1044c77062573985f7c994c3b6cef5695f57e955"
+SRCREV = "d3b1a15d18542b2086e72bfdc3fc43f454772a3b"
# boot-wrapper doesn't make releases
UPSTREAM_CHECK_COMMITS = "1"
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/5] arm/gn: update to a more recent SHA
2023-02-23 14:36 [PATCH 1/5] arm/boot-wrapper-aarch64: update to a newer SHA Jon Mason
@ 2023-02-23 14:36 ` Jon Mason
2023-02-23 14:36 ` [PATCH 3/5] arm/opencsd: update to v1.4.0 Jon Mason
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Jon Mason @ 2023-02-23 14:36 UTC (permalink / raw)
To: meta-arm
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
meta-arm/recipes-devtools/gn/gn_git.bb | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meta-arm/recipes-devtools/gn/gn_git.bb b/meta-arm/recipes-devtools/gn/gn_git.bb
index 521e33e9..20832016 100644
--- a/meta-arm/recipes-devtools/gn/gn_git.bb
+++ b/meta-arm/recipes-devtools/gn/gn_git.bb
@@ -6,7 +6,7 @@ LIC_FILES_CHKSUM = "file://LICENSE;md5=0fca02217a5d49a14dfe2d11837bb34d"
SRC_URI = "git://gn.googlesource.com/gn;protocol=https;branch=main \
file://0001-Replace-lstat64-stat64-functions-on-linux.patch"
-SRCREV = "bf4e17dc67b2a2007475415e3f9e1d1cf32f6e35"
+SRCREV = "edf6ef4b06b42c58292faea78498aff76bdf68ed"
PV = "0+git${SRCPV}"
S = "${WORKDIR}/git"
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 3/5] arm/opencsd: update to v1.4.0
2023-02-23 14:36 [PATCH 1/5] arm/boot-wrapper-aarch64: update to a newer SHA Jon Mason
2023-02-23 14:36 ` [PATCH 2/5] arm/gn: update to a more recent SHA Jon Mason
@ 2023-02-23 14:36 ` Jon Mason
2023-02-23 14:36 ` [PATCH 4/5] arm/trusted-firmware-a: update version and relocate fiptool Jon Mason
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Jon Mason @ 2023-02-23 14:36 UTC (permalink / raw)
To: meta-arm
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
.../opencsd/{opencsd_1.3.1.bb => opencsd_1.4.0.bb} | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
rename meta-arm/recipes-devtools/opencsd/{opencsd_1.3.1.bb => opencsd_1.4.0.bb} (95%)
diff --git a/meta-arm/recipes-devtools/opencsd/opencsd_1.3.1.bb b/meta-arm/recipes-devtools/opencsd/opencsd_1.4.0.bb
similarity index 95%
rename from meta-arm/recipes-devtools/opencsd/opencsd_1.3.1.bb
rename to meta-arm/recipes-devtools/opencsd/opencsd_1.4.0.bb
index 1c1abaa7..59c4f9ca 100644
--- a/meta-arm/recipes-devtools/opencsd/opencsd_1.3.1.bb
+++ b/meta-arm/recipes-devtools/opencsd/opencsd_1.4.0.bb
@@ -4,7 +4,7 @@ LICENSE = "BSD-3-Clause"
LIC_FILES_CHKSUM = "file://LICENSE;md5=ad8cb685eb324d2fa2530b985a43f3e5"
SRC_URI = "git://github.com/Linaro/OpenCSD;protocol=https;branch=master"
-SRCREV = "8dab50c35c8d181fc3ed6ad46e156398447d753f"
+SRCREV = "78ce8ef47c55a489b0ca575b981cd4856d03f44b"
S = "${WORKDIR}/git"
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 4/5] arm/trusted-firmware-a: update version and relocate fiptool
2023-02-23 14:36 [PATCH 1/5] arm/boot-wrapper-aarch64: update to a newer SHA Jon Mason
2023-02-23 14:36 ` [PATCH 2/5] arm/gn: update to a more recent SHA Jon Mason
2023-02-23 14:36 ` [PATCH 3/5] arm/opencsd: update to v1.4.0 Jon Mason
@ 2023-02-23 14:36 ` Jon Mason
2023-02-23 14:36 ` [PATCH 5/5] arm/sbsa-acs: update to v6.1.0 Jon Mason
2023-02-24 21:56 ` [PATCH 1/5] arm/boot-wrapper-aarch64: update to a newer SHA Jon Mason
4 siblings, 0 replies; 6+ messages in thread
From: Jon Mason @ 2023-02-23 14:36 UTC (permalink / raw)
To: meta-arm
Update tfa version to v2.8. Also, fiptool uses tfa sources. So, keep
it with the rest of tfa to prevent the version from becoming stale.
NOTE: tf-a-tests is being held back for corstone1000 due to compilation
errors.
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
...f-a-tests_2.7.0.bbappend => tf-a-tests_2.8.0.bbappend} | 1 +
...a_2.7.%.bbappend => trusted-firmware-a_2.8.%.bbappend} | 0
.../trusted-firmware-a/fiptool-native_2.8.bb} | 4 ++--
.../{tf-a-tests_2.7.0.bb => tf-a-tests_2.8.0.bb} | 2 +-
...ed-firmware-a_2.7.0.bb => trusted-firmware-a_2.8.0.bb} | 8 ++++----
5 files changed, 8 insertions(+), 7 deletions(-)
rename meta-arm-bsp/recipes-bsp/trusted-firmware-a/{tf-a-tests_2.7.0.bbappend => tf-a-tests_2.8.0.bbappend} (53%)
rename meta-arm-bsp/recipes-bsp/trusted-firmware-a/{trusted-firmware-a_2.7.%.bbappend => trusted-firmware-a_2.8.%.bbappend} (100%)
rename meta-arm/{recipes-devtools/fiptool/fiptool-native_2.7.bb => recipes-bsp/trusted-firmware-a/fiptool-native_2.8.bb} (92%)
rename meta-arm/recipes-bsp/trusted-firmware-a/{tf-a-tests_2.7.0.bb => tf-a-tests_2.8.0.bb} (96%)
rename meta-arm/recipes-bsp/trusted-firmware-a/{trusted-firmware-a_2.7.0.bb => trusted-firmware-a_2.8.0.bb} (71%)
diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.7.0.bbappend b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bbappend
similarity index 53%
rename from meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.7.0.bbappend
rename to meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bbappend
index ff22ff12..392c6090 100644
--- a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.7.0.bbappend
+++ b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bbappend
@@ -1,3 +1,4 @@
# Machine specific TFAs
COMPATIBLE_MACHINE:corstone1000 = "corstone1000"
+SRCREV:corstone1000 = "5f591f67738a1bbe6b262c53d9dad46ed8bbcd67"
diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.%.bbappend b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.%.bbappend
similarity index 100%
rename from meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.%.bbappend
rename to meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.%.bbappend
diff --git a/meta-arm/recipes-devtools/fiptool/fiptool-native_2.7.bb b/meta-arm/recipes-bsp/trusted-firmware-a/fiptool-native_2.8.bb
similarity index 92%
rename from meta-arm/recipes-devtools/fiptool/fiptool-native_2.7.bb
rename to meta-arm/recipes-bsp/trusted-firmware-a/fiptool-native_2.8.bb
index 66cf2ced..578f5a29 100644
--- a/meta-arm/recipes-devtools/fiptool/fiptool-native_2.7.bb
+++ b/meta-arm/recipes-bsp/trusted-firmware-a/fiptool-native_2.8.bb
@@ -10,8 +10,8 @@ SRC_URI = "${SRC_URI_TRUSTED_FIRMWARE_A};destsuffix=fiptool-${PV};branch=${SRCBR
SRCBRANCH = "master"
LIC_FILES_CHKSUM = "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde"
-# Use fiptool from TF-A v2.7
-SRCREV = "35f4c7295bafeb32c8bcbdfb6a3f2e74a57e732b"
+# Use fiptool from TF-A v2.8
+SRCREV = "9881bb93a3bc0a3ea37e9f093e09ab4b360a9e48"
DEPENDS += "openssl-native"
diff --git a/meta-arm/recipes-bsp/trusted-firmware-a/tf-a-tests_2.7.0.bb b/meta-arm/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bb
similarity index 96%
rename from meta-arm/recipes-bsp/trusted-firmware-a/tf-a-tests_2.7.0.bb
rename to meta-arm/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bb
index 8ded64dd..0c094995 100644
--- a/meta-arm/recipes-bsp/trusted-firmware-a/tf-a-tests_2.7.0.bb
+++ b/meta-arm/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bb
@@ -11,7 +11,7 @@ SRC_URI_TRUSTED_FIRMWARE_A_TESTS ?= "git://git.trustedfirmware.org/TF-A/tf-a-tes
SRC_URI = "${SRC_URI_TRUSTED_FIRMWARE_A_TESTS};branch=${SRCBRANCH} \
file://tf-a-tests-no-warn-rwx-segments.patch"
SRCBRANCH = "master"
-SRCREV = "5f591f67738a1bbe6b262c53d9dad46ed8bbcd67"
+SRCREV = "f7b3be91ab954c495912fc7bc48383cd83bfec2d"
DEPENDS += "optee-os"
diff --git a/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.0.bb b/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.0.bb
similarity index 71%
rename from meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.0.bb
rename to meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.0.bb
index 35817c0c..3a5006e5 100644
--- a/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.0.bb
+++ b/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.0.bb
@@ -1,14 +1,14 @@
require trusted-firmware-a.inc
-# TF-A v2.7
-SRCREV_tfa = "35f4c7295bafeb32c8bcbdfb6a3f2e74a57e732b"
+# TF-A v2.8
+SRCREV_tfa = "9881bb93a3bc0a3ea37e9f093e09ab4b360a9e48"
SRC_URI += "file://rwx-segments.patch"
LIC_FILES_CHKSUM += "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde"
-# mbed TLS v2.28.0
+# mbed TLS v2.28.2
SRC_URI_MBEDTLS = "git://github.com/ARMmbed/mbedtls.git;name=mbedtls;protocol=https;destsuffix=git/mbedtls;branch=mbedtls-2.28"
-SRCREV_mbedtls = "8b3f26a5ac38d4fdccbc5c5366229f3e01dafcc0"
+SRCREV_mbedtls = "89f040a5c938985c5f30728baed21e49d0846a53"
LIC_FILES_CHKSUM_MBEDTLS = "file://mbedtls/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57"
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 5/5] arm/sbsa-acs: update to v6.1.0
2023-02-23 14:36 [PATCH 1/5] arm/boot-wrapper-aarch64: update to a newer SHA Jon Mason
` (2 preceding siblings ...)
2023-02-23 14:36 ` [PATCH 4/5] arm/trusted-firmware-a: update version and relocate fiptool Jon Mason
@ 2023-02-23 14:36 ` Jon Mason
2023-02-24 21:56 ` [PATCH 1/5] arm/boot-wrapper-aarch64: update to a newer SHA Jon Mason
4 siblings, 0 replies; 6+ messages in thread
From: Jon Mason @ 2023-02-23 14:36 UTC (permalink / raw)
To: meta-arm
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
.../sbsa-acs/0001-Fix-for-issue-245.patch | 46 ++++
...001-Fix-function-protype-mismatches.patch} | 29 ++-
...al-test-3-updated-for-multiple-uarts.patch | 204 ------------------
.../recipes-bsp/uefi/sbsa-acs/shell.patch | 18 +-
.../uefi/sbsa-acs/use_bfd_linker.patch | 5 +-
.../{sbsa-acs_1.0.bb => sbsa-acs_6.1.0.bb} | 9 +-
6 files changed, 83 insertions(+), 228 deletions(-)
create mode 100644 meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-for-issue-245.patch
rename meta-arm/recipes-bsp/uefi/sbsa-acs/{enum-int-mismatch.patch => 0001-Fix-function-protype-mismatches.patch} (51%)
delete mode 100644 meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Revert-peripheral-test-3-updated-for-multiple-uarts.patch
rename meta-arm/recipes-bsp/uefi/{sbsa-acs_1.0.bb => sbsa-acs_6.1.0.bb} (79%)
diff --git a/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-for-issue-245.patch b/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-for-issue-245.patch
new file mode 100644
index 00000000..42bdf7d4
--- /dev/null
+++ b/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-for-issue-245.patch
@@ -0,0 +1,46 @@
+From 096150fa19014b397a5d8f8d774bb8236ac37679 Mon Sep 17 00:00:00 2001
+From: Shyamanth RH <shyamanth.rh@arm.com>
+Date: Wed, 4 Jan 2023 13:08:35 +0530
+Subject: [PATCH] Fix for issue #245
+
+* The change fixes the build issue observed in GCC 12.XX.
+* Looks like GCC is confusing label to a local variable and hence triggers dangling-pointer error when a label addres is assigned to a pointer.
+* Changed branch_to_test from void * pointer to uint64_t datatype since we just need the retrun address of the label while updating the ELR. This should suppress the dangling-pinter warning thrown by GCC 12.XX
+
+Signed-off-by: Shyamanth RH <shyamanth.rh@arm.com>
+Upstream-Status: Backport
+---
+ test_pool/peripherals/test_d003.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/test_pool/peripherals/test_d003.c b/test_pool/peripherals/test_d003.c
+index 9f36e1f..0658a45 100755
+--- a/test_pool/peripherals/test_d003.c
++++ b/test_pool/peripherals/test_d003.c
+@@ -30,7 +30,7 @@
+
+ static uint64_t l_uart_base;
+ static uint32_t int_id;
+-static void *branch_to_test;
++static uint64_t branch_to_test;
+ static uint32_t test_fail;
+
+ static
+@@ -40,7 +40,7 @@ esr(uint64_t interrupt_type, void *context)
+ uint32_t index = val_pe_get_index_mpid(val_pe_get_mpid());
+
+ /* Update the ELR to point to next instrcution */
+- val_pe_update_elr(context, (uint64_t)branch_to_test);
++ val_pe_update_elr(context, branch_to_test);
+
+ val_print(AVS_PRINT_ERR, "\n Error : Received Sync Exception type %d", interrupt_type);
+ val_set_status(index, RESULT_FAIL(g_sbsa_level, TEST_NUM, 01));
+@@ -150,7 +150,7 @@ payload(void)
+ val_pe_install_esr(EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS, esr);
+ val_pe_install_esr(EXCEPT_AARCH64_SERROR, esr);
+
+- branch_to_test = &&exception_taken;
++ branch_to_test = (uint64_t)&&exception_taken;
+
+ if (count == 0) {
+ val_print(AVS_PRINT_WARN, "\n No UART defined by Platform ", 0);
diff --git a/meta-arm/recipes-bsp/uefi/sbsa-acs/enum-int-mismatch.patch b/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-function-protype-mismatches.patch
similarity index 51%
rename from meta-arm/recipes-bsp/uefi/sbsa-acs/enum-int-mismatch.patch
rename to meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-function-protype-mismatches.patch
index 29b2e2f3..f6039144 100644
--- a/meta-arm/recipes-bsp/uefi/sbsa-acs/enum-int-mismatch.patch
+++ b/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-function-protype-mismatches.patch
@@ -1,27 +1,38 @@
-Fix function protype mismatches
+From df6006190f112a4ecc54ed0a35d3ea83a2350c73 Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Thu, 2 Feb 2023 17:37:52 -0800
+Subject: [PATCH] Fix function protype mismatches
These are flagged by gcc13
avs_gic.c:241:1: error: conflicting types for 'val_gic_get_info' due to enum/integer mismatch; have 'uint32_t(uint32_t)' {aka 'unsigned int(unsigned int)'} [-Werror=enum-int-mismatch]
| 241 | val_gic_get_info(uint32_t type)
| | ^~~~~~~~~~~~~~~~
-Upstream-Status: Submitted [https://github.com/ARM-software/sbsa-acs/pull/291]
Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Upstream-Status: Backport
+---
+ val/include/val_interface.h | 2 +-
+ val/src/avs_gic.c | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
---- a/ShellPkg/Application/sbsa-acs/val/include/val_interface.h
-+++ b/ShellPkg/Application/sbsa-acs/val/include/val_interface.h
-@@ -155,7 +155,7 @@ typedef enum {
+diff --git a/val/include/val_interface.h b/val/include/val_interface.h
+index 053fdfa..8814b41 100644
+--- a/val/include/val_interface.h
++++ b/val/include/val_interface.h
+@@ -181,7 +181,7 @@ typedef enum {
void val_wd_create_info_table(uint64_t *wd_info_table);
void val_wd_free_info_table(void);
uint32_t val_wd_execute_tests(uint32_t level, uint32_t num_pe);
-uint64_t val_wd_get_info(uint32_t index, uint32_t info_type);
+uint64_t val_wd_get_info(uint32_t index, WD_INFO_TYPE_e info_type);
uint32_t val_wd_set_ws0(uint32_t index, uint32_t timeout);
+ uint64_t val_get_counter_frequency(void);
-
---- a/ShellPkg/Application/sbsa-acs/val/src/avs_gic.c
-+++ b/ShellPkg/Application/sbsa-acs/val/src/avs_gic.c
-@@ -238,7 +238,7 @@ val_get_cpuif_base(void)
+diff --git a/val/src/avs_gic.c b/val/src/avs_gic.c
+index b37f106..1146a01 100644
+--- a/val/src/avs_gic.c
++++ b/val/src/avs_gic.c
+@@ -249,7 +249,7 @@ val_get_cpuif_base(void)
@return 32-bit data
**/
uint32_t
diff --git a/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Revert-peripheral-test-3-updated-for-multiple-uarts.patch b/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Revert-peripheral-test-3-updated-for-multiple-uarts.patch
deleted file mode 100644
index 13faefb8..00000000
--- a/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Revert-peripheral-test-3-updated-for-multiple-uarts.patch
+++ /dev/null
@@ -1,204 +0,0 @@
-Revert "peripheral test 3 updated for multiple uarts"
-
-This reverts commit 037be14cc1f149cdb25e754358de7b9066581d1c.
-
-Working around issue in the latest GCC of:
-ShellPkg/Application/sbsa-acs/test_pool/peripherals/test_d003.c:172:18: error: storing the address of local variable 'exception_taken' in 'branch_to_test' [-Werror=dangling-pointer=]
-
-Upstream-Status: Inappropriate [Problem reported, https://github.com/ARM-software/sbsa-acs/issues/245]
-Signed-off-by: Jon Mason <jon.mason@arm.com>
-
-diff --git a/test_pool/peripherals/test_d003.c b/test_pool/peripherals/test_d003.c
-index 68902ad..4858049 100755
---- a/test_pool/peripherals/test_d003.c
-+++ b/test_pool/peripherals/test_d003.c
-@@ -17,7 +17,6 @@
-
- #include "val/include/sbsa_avs_val.h"
- #include "val/include/val_interface.h"
--#include "val/include/sbsa_avs_pe.h"
-
- #include "val/include/sbsa_avs_peripherals.h"
- #include "val/include/sbsa_avs_gic.h"
-@@ -25,26 +24,11 @@
- #define TEST_NUM (AVS_PER_TEST_NUM_BASE + 3)
- /*one space character is removed from TEST_DESC, to nullify a space written as part of the test */
- #define TEST_DESC "Check SBSA UART register offsets "
--#define TEST_NUM1 (AVS_PER_TEST_NUM_BASE + 4)
-+#define TEST_NUM2 (AVS_PER_TEST_NUM_BASE + 4)
- #define TEST_DESC1 "Check Generic UART Interrupt "
-
--static uint64_t l_uart_base;
-+uint64_t l_uart_base;
- static uint32_t int_id;
--static void *branch_to_test;
--static uint32_t test_fail;
--
--static
--void
--esr(uint64_t interrupt_type, void *context)
--{
-- uint32_t index = val_pe_get_index_mpid(val_pe_get_mpid());
--
-- /* Update the ELR to point to next instrcution */
-- val_pe_update_elr(context, (uint64_t)branch_to_test);
--
-- val_print(AVS_PRINT_ERR, "\n Error : Received Sync Exception ", 0);
-- val_set_status(index, RESULT_FAIL(g_sbsa_level, TEST_NUM, 01));
--}
-
- uint32_t
- uart_reg_read(uint32_t offset, uint32_t width_mask)
-@@ -115,7 +99,7 @@ isr()
- uint32_t index = val_pe_get_index_mpid(val_pe_get_mpid());
- uart_disable_txintr();
- val_print(AVS_PRINT_DEBUG, "\n Received interrupt ", 0);
-- val_set_status(index, RESULT_PASS(g_sbsa_level, TEST_NUM1, 01));
-+ val_set_status(index, RESULT_PASS(g_sbsa_level, TEST_NUM, 0x01));
- val_gic_end_of_interrupt(int_id);
- }
-
-@@ -166,14 +150,9 @@ payload()
- uint32_t index = val_pe_get_index_mpid(val_pe_get_mpid());
- uint32_t data1, data2;
-
-- val_pe_install_esr(EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS, esr);
-- val_pe_install_esr(EXCEPT_AARCH64_SERROR, esr);
--
-- branch_to_test = &&exception_taken;
--
- if (count == 0) {
- val_print(AVS_PRINT_WARN, "\n No UART defined by Platform ", 0);
-- val_set_status(index, RESULT_FAIL(g_sbsa_level, TEST_NUM, 01));
-+ val_set_status(index, RESULT_SKIP(g_sbsa_level, TEST_NUM, 01));
- return;
- }
-
-@@ -213,7 +192,6 @@ payload()
-
- count--;
- }
--exception_taken:
- return;
- }
-
-@@ -223,49 +201,40 @@ payload1()
- {
- uint32_t count = val_peripheral_get_info(NUM_UART, 0);
- uint32_t index = val_pe_get_index_mpid(val_pe_get_mpid());
-- uint32_t timeout;
-+ uint32_t timeout = TIMEOUT_MEDIUM;
-
- if (count == 0) {
-- val_set_status(index, RESULT_SKIP(g_sbsa_level, TEST_NUM1, 01));
-+ val_set_status(index, RESULT_SKIP(g_sbsa_level, TEST_NUM2, 01));
- return;
- }
-
- while (count != 0) {
-- timeout = TIMEOUT_MEDIUM;
-+
- int_id = val_peripheral_get_info(UART_GSIV, count - 1);
-- l_uart_base = val_peripheral_get_info(UART_BASE0, count - 1);
-
- /* If Interrupt ID is available, check for interrupt generation */
- if (int_id != 0x0) {
- /* PASS will be set from ISR */
-- val_set_status(index, RESULT_PENDING(g_sbsa_level, TEST_NUM1));
-- if (val_gic_install_isr(int_id, isr)) {
-- val_print(AVS_PRINT_ERR, "\n GIC Install Handler Fail", 0);
-- val_set_status(index, RESULT_FAIL(g_sbsa_level, TEST_NUM1, 01));
-- return;
-- }
-+ val_set_status(index, RESULT_PENDING(g_sbsa_level, TEST_NUM2));
-+ val_gic_install_isr(int_id, isr);
- uart_enable_txintr();
-- val_print_raw(l_uart_base, g_print_level,
-- "\n Test Message ", 0);
-+ val_print_raw(g_print_level, "\n Test Message ", 0);
-
-- while ((--timeout > 0) && (IS_RESULT_PENDING(val_get_status(index)))){
-- };
-+ while ((--timeout > 0) && (IS_RESULT_PENDING(val_get_status(index))));
-
- if (timeout == 0) {
- val_print(AVS_PRINT_ERR,
-- "\n Did not receive UART interrupt %d ", int_id);
-- test_fail++;
-+ "\n Did not receive UART interrupt on %d ", int_id);
-+ val_set_status(index, RESULT_FAIL(g_sbsa_level, TEST_NUM2, 02));
-+ return;
- }
- } else {
-- val_set_status(index, RESULT_SKIP(g_sbsa_level, TEST_NUM1, 02));
-+ val_set_status(index, RESULT_SKIP(g_sbsa_level, TEST_NUM2, 01));
- }
-
- count--;
- }
-- if (test_fail)
-- val_set_status(index, RESULT_FAIL(g_sbsa_level, TEST_NUM1, 02));
-- else
-- val_set_status(index, RESULT_PASS(g_sbsa_level, TEST_NUM1, 02));
-+ return;
- }
-
-
-@@ -290,13 +259,13 @@ d003_entry(uint32_t num_pe)
- val_report_status(0, SBSA_AVS_END(g_sbsa_level, TEST_NUM));
-
- if (!status) {
-- status = val_initialize_test(TEST_NUM1, TEST_DESC1, val_pe_get_num(), g_sbsa_level);
-+ status = val_initialize_test(TEST_NUM2, TEST_DESC1, val_pe_get_num(), g_sbsa_level);
- if (status != AVS_STATUS_SKIP)
-- val_run_test_payload(TEST_NUM1, num_pe, payload1, 0);
-+ val_run_test_payload(TEST_NUM2, num_pe, payload1, 0);
-
- /* get the result from all PE and check for failure */
-- status = val_check_for_error(TEST_NUM1, num_pe);
-- val_report_status(0, SBSA_AVS_END(g_sbsa_level, TEST_NUM1));
-+ status = val_check_for_error(TEST_NUM2, num_pe);
-+ val_report_status(0, SBSA_AVS_END(g_sbsa_level, TEST_NUM2));
- }
-
-
-diff --git a/val/include/val_interface.h b/val/include/val_interface.h
-index c03edb7..0997c64 100644
---- a/val/include/val_interface.h
-+++ b/val/include/val_interface.h
-@@ -44,8 +44,7 @@
- void val_allocate_shared_mem(void);
- void val_free_shared_mem(void);
- void val_print(uint32_t level, char8_t *string, uint64_t data);
--void val_print_raw(uint64_t uart_address, uint32_t level, char8_t *string,
-- uint64_t data);
-+void val_print_raw(uint32_t level, char8_t *string, uint64_t data);
- void val_print_test_end(uint32_t status, char8_t *string);
- void val_set_test_data(uint32_t index, uint64_t addr, uint64_t test_data);
- void val_get_test_data(uint32_t index, uint64_t *data0, uint64_t *data1);
-diff --git a/val/src/avs_test_infra.c b/val/src/avs_test_infra.c
-index 4d4e80b..a39e85b 100644
---- a/val/src/avs_test_infra.c
-+++ b/val/src/avs_test_infra.c
-@@ -65,7 +65,6 @@ val_print_test_end(uint32_t status, char8_t *string)
- 1. Caller - Application layer
- 2. Prerequisite - None.
-
-- @param uart_address address of uart to be used
- @param level the print verbosity (1 to 5)
- @param string formatted ASCII string
- @param data 64-bit data. set to 0 if no data is to sent to console.
-@@ -73,11 +72,11 @@ val_print_test_end(uint32_t status, char8_t *string)
- @return None
- **/
- void
--val_print_raw(uint64_t uart_address, uint32_t level, char8_t *string,
-- uint64_t data)
-+val_print_raw(uint32_t level, char8_t *string, uint64_t data)
- {
-
- if (level >= g_print_level){
-+ uint64_t uart_address = val_peripheral_get_info(UART_BASE0, 0);
- pal_print_raw(uart_address, string, data);
- }
-
diff --git a/meta-arm/recipes-bsp/uefi/sbsa-acs/shell.patch b/meta-arm/recipes-bsp/uefi/sbsa-acs/shell.patch
index 95b3bfa4..0c784c6f 100644
--- a/meta-arm/recipes-bsp/uefi/sbsa-acs/shell.patch
+++ b/meta-arm/recipes-bsp/uefi/sbsa-acs/shell.patch
@@ -1,13 +1,20 @@
-Patch in the paths to the SBSA test suite
+From 90d705333521dd85720a17a29abf1aff1612c917 Mon Sep 17 00:00:00 2001
+From: Ross Burton <ross.burton@arm.com>
+Date: Thu, 16 Feb 2023 21:53:25 +0000
+Subject: [PATCH] Patch in the paths to the SBSA test suite
Upstream-Status: Inappropriate (required action)
Signed-off-by: Ross Burton <ross.burton@arm.com>
+---
+ ShellPkg/ShellPkg.dsc | 3 +++
+ 1 file changed, 3 insertions(+)
+
diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc
-index 38fde3dc71..7240a6b5f7 100644
+index dd0d88603f..7367c052fc 100644
--- a/ShellPkg/ShellPkg.dsc
+++ b/ShellPkg/ShellPkg.dsc
-@@ -22,6 +22,8 @@
+@@ -23,6 +23,8 @@
!include MdePkg/MdeLibs.dsc.inc
[LibraryClasses.common]
@@ -16,7 +23,7 @@ index 38fde3dc71..7240a6b5f7 100644
UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
-@@ -87,6 +89,7 @@
+@@ -88,6 +90,7 @@
# Build all the libraries when building this package.
# This helps developers test changes and how they affect the package.
#
@@ -24,6 +31,3 @@ index 38fde3dc71..7240a6b5f7 100644
ShellPkg/Library/UefiShellLib/UefiShellLib.inf
ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf
ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
---
-2.30.2
-
diff --git a/meta-arm/recipes-bsp/uefi/sbsa-acs/use_bfd_linker.patch b/meta-arm/recipes-bsp/uefi/sbsa-acs/use_bfd_linker.patch
index 9c8ce5dc..f0b1ac17 100644
--- a/meta-arm/recipes-bsp/uefi/sbsa-acs/use_bfd_linker.patch
+++ b/meta-arm/recipes-bsp/uefi/sbsa-acs/use_bfd_linker.patch
@@ -15,7 +15,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
-index 5ed19810b7..e08e6b4ff4 100755
+index 9b4f173519..ea78e81d31 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -1856,7 +1856,7 @@ DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access
@@ -27,6 +27,3 @@ index 5ed19810b7..e08e6b4ff4 100755
DEFINE GCC_IA32_X64_DLINK_COMMON = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
DEFINE GCC_ARM_AARCH64_DLINK_COMMON= -Wl,--emit-relocs -nostdlib -Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) -Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
DEFINE GCC_ARM_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20 -Wl,--pic-veneer
---
-2.30.2
-
diff --git a/meta-arm/recipes-bsp/uefi/sbsa-acs_1.0.bb b/meta-arm/recipes-bsp/uefi/sbsa-acs_6.1.0.bb
similarity index 79%
rename from meta-arm/recipes-bsp/uefi/sbsa-acs_1.0.bb
rename to meta-arm/recipes-bsp/uefi/sbsa-acs_6.1.0.bb
index 8c0473a7..6ef4f6ce 100644
--- a/meta-arm/recipes-bsp/uefi/sbsa-acs_1.0.bb
+++ b/meta-arm/recipes-bsp/uefi/sbsa-acs_6.1.0.bb
@@ -8,12 +8,13 @@ SRC_URI += "git://github.com/ARM-software/sbsa-acs;destsuffix=edk2/ShellPkg/Appl
git://github.com/tianocore/edk2-libc;destsuffix=edk2/edk2-libc;protocol=https;branch=master;name=libc \
file://shell.patch \
file://use_bfd_linker.patch \
- file://enum-int-mismatch.patch \
- file://0001-Revert-peripheral-test-3-updated-for-multiple-uarts.patch;patchdir=ShellPkg/Application/sbsa-acs \
+ file://0001-Fix-function-protype-mismatches.patch;patchdir=ShellPkg/Application/sbsa-acs \
+ file://0001-Fix-for-issue-245.patch;patchdir=ShellPkg/Application/sbsa-acs \
"
-SRCREV_acs = "28ecef569303af18b571ff3d66bbdcb6135eaed8"
-SRCREV_libc = "c32222fed9927420fc46da503dea1ebb874698b6"
+
+SRCREV_acs = "7d7a3fe81ad7e6f05143ba17db50107f1ab6c9cd"
+SRCREV_libc = "a806ea1062c254bd6e09db7d0f7beb4d14bc3ed0"
# GCC12 trips on it
#see https://src.fedoraproject.org/rpms/edk2/blob/rawhide/f/0032-Basetools-turn-off-gcc12-warning.patch
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/5] arm/boot-wrapper-aarch64: update to a newer SHA
2023-02-23 14:36 [PATCH 1/5] arm/boot-wrapper-aarch64: update to a newer SHA Jon Mason
` (3 preceding siblings ...)
2023-02-23 14:36 ` [PATCH 5/5] arm/sbsa-acs: update to v6.1.0 Jon Mason
@ 2023-02-24 21:56 ` Jon Mason
4 siblings, 0 replies; 6+ messages in thread
From: Jon Mason @ 2023-02-24 21:56 UTC (permalink / raw)
To: meta-arm, Jon Mason
On Thu, 23 Feb 2023 09:36:53 -0500, Jon Mason wrote:
>
Applied, thanks!
[1/5] arm/boot-wrapper-aarch64: update to a newer SHA
commit: dca1c18725b9ffa14e955e181f569c9395b4930c
[2/5] arm/gn: update to a more recent SHA
commit: a947750cbcf8b5d89d759052f12bc5bdde8f9f0e
[3/5] arm/opencsd: update to v1.4.0
commit: eab2a4a0c11400629b42795cbc9605531cefbc04
[4/5] arm/trusted-firmware-a: update version and relocate fiptool
commit: a2086471492643f6c90f7d7e17e76d960fb0d29e
[5/5] arm/sbsa-acs: update to v6.1.0
commit: 68aae5fcaf58a2cf74e44f34d07d7e607c3c1a76
Best regards,
--
Jon Mason <jon.mason@arm.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-02-25 2:21 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2023-02-23 14:36 ` [PATCH 3/5] arm/opencsd: update to v1.4.0 Jon Mason
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