From: Catalin Marinas <catalin.marinas@arm.com> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 05/20] ARM: LPAE: Introduce L_PTE_NOEXEC and L_PTE_NOWRITE Date: Fri, 12 Nov 2010 18:00:25 +0000 [thread overview] Message-ID: <1289584840-18097-6-git-send-email-catalin.marinas@arm.com> (raw) In-Reply-To: <1289584840-18097-1-git-send-email-catalin.marinas@arm.com> The LPAE page table format needs to explicitly disable execution or write permissions on a page by setting the corresponding bits (similar to the classic page table format with Access Flag enabled). This patch introduces null definitions for the 2-level format and the actual noexec and nowrite bits for the LPAE format. It also changes several PTE maintenance macros and masks. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> --- arch/arm/include/asm/pgtable-2level.h | 2 + arch/arm/include/asm/pgtable.h | 44 +++++++++++++++++++++------------ arch/arm/mm/mmu.c | 6 ++-- 3 files changed, 33 insertions(+), 19 deletions(-) diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h index 36bdef7..4e21166 100644 --- a/arch/arm/include/asm/pgtable-2level.h +++ b/arch/arm/include/asm/pgtable-2level.h @@ -128,6 +128,8 @@ #define L_PTE_USER (1 << 8) #define L_PTE_EXEC (1 << 9) #define L_PTE_SHARED (1 << 10) /* shared(v6), coherent(xsc3) */ +#define L_PTE_NOEXEC (0) +#define L_PTE_NOWRITE (0) /* * These are the memory types, defined to be compatible with diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index ea08ab7..5bd0e64 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -66,23 +66,23 @@ extern pgprot_t pgprot_kernel; #define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b)) -#define PAGE_NONE pgprot_user -#define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE) +#define PAGE_NONE _MOD_PROT(pgprot_user, L_PTE_NOEXEC | L_PTE_NOWRITE) +#define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE | L_PTE_NOEXEC) #define PAGE_SHARED_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE | L_PTE_EXEC) -#define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER) -#define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC) -#define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER) -#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC) -#define PAGE_KERNEL pgprot_kernel +#define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_NOEXEC | L_PTE_NOWRITE) +#define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC | L_PTE_NOWRITE) +#define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_NOEXEC | L_PTE_NOWRITE) +#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC | L_PTE_NOWRITE) +#define PAGE_KERNEL _MOD_PROT(pgprot_kernel, L_PTE_NOEXEC) #define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_kernel, L_PTE_EXEC) -#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT) -#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE) +#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT | L_PTE_NOEXEC | L_PTE_NOWRITE) +#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE | L_PTE_NOEXEC) #define __PAGE_SHARED_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE | L_PTE_EXEC) -#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | L_PTE_USER) -#define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC) -#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | L_PTE_USER) -#define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC) +#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_NOEXEC | L_PTE_NOWRITE) +#define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC | L_PTE_NOWRITE) +#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_NOEXEC | L_PTE_NOWRITE) +#define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC | L_PTE_NOWRITE) #endif /* __ASSEMBLY__ */ @@ -165,12 +165,18 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, * Undefined behaviour if not.. */ #define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT) -#define pte_write(pte) (pte_val(pte) & L_PTE_WRITE) #define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY) #define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG) -#define pte_exec(pte) (pte_val(pte) & L_PTE_EXEC) #define pte_special(pte) (0) +#ifdef CONFIG_ARM_LPAE +#define pte_write(pte) (!(pte_val(pte) & L_PTE_NOWRITE)) +#define pte_exec(pte) (!(pte_val(pte) & L_PTE_NOEXEC)) +#else +#define pte_write(pte) (pte_val(pte) & L_PTE_WRITE) +#define pte_exec(pte) (pte_val(pte) & L_PTE_EXEC) +#endif + #define pte_present_user(pte) \ ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \ (L_PTE_PRESENT | L_PTE_USER)) @@ -178,8 +184,13 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, #define PTE_BIT_FUNC(fn,op) \ static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; } +#ifdef CONFIG_ARM_LPAE +PTE_BIT_FUNC(wrprotect, |= L_PTE_NOWRITE); +PTE_BIT_FUNC(mkwrite, &= ~L_PTE_NOWRITE); +#else PTE_BIT_FUNC(wrprotect, &= ~L_PTE_WRITE); PTE_BIT_FUNC(mkwrite, |= L_PTE_WRITE); +#endif PTE_BIT_FUNC(mkclean, &= ~L_PTE_DIRTY); PTE_BIT_FUNC(mkdirty, |= L_PTE_DIRTY); PTE_BIT_FUNC(mkold, &= ~L_PTE_YOUNG); @@ -272,7 +283,8 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { - const unsigned long mask = L_PTE_EXEC | L_PTE_WRITE | L_PTE_USER; + const unsigned long mask = L_PTE_EXEC | L_PTE_WRITE | L_PTE_USER | + L_PTE_NOEXEC | L_PTE_NOWRITE; pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); return pte; } diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 7324fbc..0ca33dd 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -191,7 +191,7 @@ void adjust_cr(unsigned long mask, unsigned long set) } #endif -#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE +#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE|L_PTE_NOEXEC #define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE static struct mem_type mem_types[] = { @@ -236,13 +236,13 @@ static struct mem_type mem_types[] = { }, [MT_LOW_VECTORS] = { .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | - L_PTE_EXEC, + L_PTE_EXEC | L_PTE_NOWRITE, .prot_l1 = PMD_TYPE_TABLE, .domain = DOMAIN_USER, }, [MT_HIGH_VECTORS] = { .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | - L_PTE_USER | L_PTE_EXEC, + L_PTE_USER | L_PTE_EXEC | L_PTE_NOWRITE, .prot_l1 = PMD_TYPE_TABLE, .domain = DOMAIN_USER, },
WARNING: multiple messages have this Message-ID (diff)
From: catalin.marinas@arm.com (Catalin Marinas) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 05/20] ARM: LPAE: Introduce L_PTE_NOEXEC and L_PTE_NOWRITE Date: Fri, 12 Nov 2010 18:00:25 +0000 [thread overview] Message-ID: <1289584840-18097-6-git-send-email-catalin.marinas@arm.com> (raw) In-Reply-To: <1289584840-18097-1-git-send-email-catalin.marinas@arm.com> The LPAE page table format needs to explicitly disable execution or write permissions on a page by setting the corresponding bits (similar to the classic page table format with Access Flag enabled). This patch introduces null definitions for the 2-level format and the actual noexec and nowrite bits for the LPAE format. It also changes several PTE maintenance macros and masks. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> --- arch/arm/include/asm/pgtable-2level.h | 2 + arch/arm/include/asm/pgtable.h | 44 +++++++++++++++++++++------------ arch/arm/mm/mmu.c | 6 ++-- 3 files changed, 33 insertions(+), 19 deletions(-) diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h index 36bdef7..4e21166 100644 --- a/arch/arm/include/asm/pgtable-2level.h +++ b/arch/arm/include/asm/pgtable-2level.h @@ -128,6 +128,8 @@ #define L_PTE_USER (1 << 8) #define L_PTE_EXEC (1 << 9) #define L_PTE_SHARED (1 << 10) /* shared(v6), coherent(xsc3) */ +#define L_PTE_NOEXEC (0) +#define L_PTE_NOWRITE (0) /* * These are the memory types, defined to be compatible with diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index ea08ab7..5bd0e64 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -66,23 +66,23 @@ extern pgprot_t pgprot_kernel; #define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b)) -#define PAGE_NONE pgprot_user -#define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE) +#define PAGE_NONE _MOD_PROT(pgprot_user, L_PTE_NOEXEC | L_PTE_NOWRITE) +#define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE | L_PTE_NOEXEC) #define PAGE_SHARED_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE | L_PTE_EXEC) -#define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER) -#define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC) -#define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER) -#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC) -#define PAGE_KERNEL pgprot_kernel +#define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_NOEXEC | L_PTE_NOWRITE) +#define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC | L_PTE_NOWRITE) +#define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_NOEXEC | L_PTE_NOWRITE) +#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC | L_PTE_NOWRITE) +#define PAGE_KERNEL _MOD_PROT(pgprot_kernel, L_PTE_NOEXEC) #define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_kernel, L_PTE_EXEC) -#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT) -#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE) +#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT | L_PTE_NOEXEC | L_PTE_NOWRITE) +#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE | L_PTE_NOEXEC) #define __PAGE_SHARED_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE | L_PTE_EXEC) -#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | L_PTE_USER) -#define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC) -#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | L_PTE_USER) -#define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC) +#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_NOEXEC | L_PTE_NOWRITE) +#define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC | L_PTE_NOWRITE) +#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_NOEXEC | L_PTE_NOWRITE) +#define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC | L_PTE_NOWRITE) #endif /* __ASSEMBLY__ */ @@ -165,12 +165,18 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, * Undefined behaviour if not.. */ #define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT) -#define pte_write(pte) (pte_val(pte) & L_PTE_WRITE) #define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY) #define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG) -#define pte_exec(pte) (pte_val(pte) & L_PTE_EXEC) #define pte_special(pte) (0) +#ifdef CONFIG_ARM_LPAE +#define pte_write(pte) (!(pte_val(pte) & L_PTE_NOWRITE)) +#define pte_exec(pte) (!(pte_val(pte) & L_PTE_NOEXEC)) +#else +#define pte_write(pte) (pte_val(pte) & L_PTE_WRITE) +#define pte_exec(pte) (pte_val(pte) & L_PTE_EXEC) +#endif + #define pte_present_user(pte) \ ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \ (L_PTE_PRESENT | L_PTE_USER)) @@ -178,8 +184,13 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, #define PTE_BIT_FUNC(fn,op) \ static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; } +#ifdef CONFIG_ARM_LPAE +PTE_BIT_FUNC(wrprotect, |= L_PTE_NOWRITE); +PTE_BIT_FUNC(mkwrite, &= ~L_PTE_NOWRITE); +#else PTE_BIT_FUNC(wrprotect, &= ~L_PTE_WRITE); PTE_BIT_FUNC(mkwrite, |= L_PTE_WRITE); +#endif PTE_BIT_FUNC(mkclean, &= ~L_PTE_DIRTY); PTE_BIT_FUNC(mkdirty, |= L_PTE_DIRTY); PTE_BIT_FUNC(mkold, &= ~L_PTE_YOUNG); @@ -272,7 +283,8 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { - const unsigned long mask = L_PTE_EXEC | L_PTE_WRITE | L_PTE_USER; + const unsigned long mask = L_PTE_EXEC | L_PTE_WRITE | L_PTE_USER | + L_PTE_NOEXEC | L_PTE_NOWRITE; pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); return pte; } diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 7324fbc..0ca33dd 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -191,7 +191,7 @@ void adjust_cr(unsigned long mask, unsigned long set) } #endif -#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE +#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE|L_PTE_NOEXEC #define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE static struct mem_type mem_types[] = { @@ -236,13 +236,13 @@ static struct mem_type mem_types[] = { }, [MT_LOW_VECTORS] = { .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | - L_PTE_EXEC, + L_PTE_EXEC | L_PTE_NOWRITE, .prot_l1 = PMD_TYPE_TABLE, .domain = DOMAIN_USER, }, [MT_HIGH_VECTORS] = { .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | - L_PTE_USER | L_PTE_EXEC, + L_PTE_USER | L_PTE_EXEC | L_PTE_NOWRITE, .prot_l1 = PMD_TYPE_TABLE, .domain = DOMAIN_USER, },
next prev parent reply other threads:[~2010-11-12 18:04 UTC|newest] Thread overview: 154+ messages / expand[flat|nested] mbox.gz Atom feed top 2010-11-12 18:00 [PATCH v2 00/20] ARM: Add support for the Large Physical Address Extensions Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 01/20] ARM: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_* Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-22 12:43 ` Russell King - ARM Linux 2010-11-22 12:43 ` Russell King - ARM Linux 2010-11-22 13:00 ` Catalin Marinas 2010-11-22 13:00 ` Catalin Marinas 2010-11-22 13:28 ` Russell King - ARM Linux 2010-11-22 13:28 ` Russell King - ARM Linux 2010-11-12 18:00 ` [PATCH v2 02/20] ARM: LPAE: Factor out 2-level page table definitions into separate files Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-15 23:31 ` Russell King - ARM Linux 2010-11-15 23:31 ` Russell King - ARM Linux 2010-11-16 9:14 ` Catalin Marinas 2010-11-16 9:14 ` Catalin Marinas 2010-11-16 9:59 ` Russell King - ARM Linux 2010-11-16 9:59 ` Russell King - ARM Linux 2010-11-16 10:02 ` Catalin Marinas 2010-11-16 10:02 ` Catalin Marinas 2010-11-16 10:04 ` Russell King - ARM Linux 2010-11-16 10:04 ` Russell King - ARM Linux 2010-11-16 10:11 ` Catalin Marinas 2010-11-16 10:11 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 03/20] ARM: LPAE: use u32 instead of unsigned long for 32-bit ptes Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-14 13:19 ` Russell King - ARM Linux 2010-11-14 13:19 ` Russell King - ARM Linux 2010-11-14 14:09 ` Catalin Marinas 2010-11-14 14:09 ` Catalin Marinas 2010-11-14 14:13 ` Catalin Marinas 2010-11-14 14:13 ` Catalin Marinas 2010-11-14 15:14 ` Russell King - ARM Linux 2010-11-14 15:14 ` Russell King - ARM Linux 2010-11-15 9:39 ` Catalin Marinas 2010-11-15 9:39 ` Catalin Marinas 2010-11-15 9:47 ` Arnd Bergmann 2010-11-15 9:47 ` Arnd Bergmann 2010-11-15 9:51 ` Catalin Marinas 2010-11-15 9:51 ` Catalin Marinas 2010-11-15 22:11 ` Nicolas Pitre 2010-11-15 22:11 ` Nicolas Pitre 2010-11-15 23:35 ` Russell King - ARM Linux 2010-11-15 23:35 ` Russell King - ARM Linux 2010-11-16 9:19 ` Catalin Marinas 2010-11-16 9:19 ` Catalin Marinas 2010-11-15 22:07 ` Nicolas Pitre 2010-11-15 22:07 ` Nicolas Pitre 2010-11-15 17:36 ` Russell King - ARM Linux 2010-11-15 17:36 ` Russell King - ARM Linux 2010-11-15 17:39 ` Catalin Marinas 2010-11-15 17:39 ` Catalin Marinas 2010-11-16 19:34 ` Catalin Marinas 2010-11-16 19:34 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 04/20] ARM: LPAE: Do not assume Linux PTEs are always at PTRS_PER_PTE offset Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-15 17:42 ` Russell King - ARM Linux 2010-11-15 17:42 ` Russell King - ARM Linux 2010-11-15 21:46 ` Catalin Marinas 2010-11-15 21:46 ` Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas [this message] 2010-11-12 18:00 ` [PATCH v2 05/20] ARM: LPAE: Introduce L_PTE_NOEXEC and L_PTE_NOWRITE Catalin Marinas 2010-11-15 18:30 ` Russell King - ARM Linux 2010-11-15 18:30 ` Russell King - ARM Linux 2010-11-16 10:07 ` Catalin Marinas 2010-11-16 10:07 ` Catalin Marinas 2010-11-16 15:18 ` Catalin Marinas 2010-11-16 15:18 ` Catalin Marinas 2010-11-16 15:32 ` Catalin Marinas 2010-11-16 15:32 ` Catalin Marinas 2010-11-16 18:19 ` Russell King - ARM Linux 2010-11-16 18:19 ` Russell King - ARM Linux 2010-11-17 17:02 ` Catalin Marinas 2010-11-17 17:02 ` Catalin Marinas 2010-11-17 17:16 ` Russell King - ARM Linux 2010-11-17 17:16 ` Russell King - ARM Linux 2010-11-17 17:22 ` Catalin Marinas 2010-11-17 17:22 ` Catalin Marinas 2010-11-17 17:24 ` Russell King - ARM Linux 2010-11-17 17:24 ` Russell King - ARM Linux 2010-11-17 17:30 ` Catalin Marinas 2010-11-17 17:30 ` Catalin Marinas 2010-11-17 17:32 ` Russell King - ARM Linux 2010-11-17 17:32 ` Russell King - ARM Linux 2010-11-17 17:34 ` Catalin Marinas 2010-11-17 17:34 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 06/20] ARM: LPAE: Introduce the 3-level page table format definitions Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-15 18:34 ` Russell King - ARM Linux 2010-11-15 18:34 ` Russell King - ARM Linux 2010-11-16 9:57 ` Catalin Marinas 2010-11-16 9:57 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 07/20] ARM: LPAE: Page table maintenance for the 3-level format Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-22 12:58 ` Russell King - ARM Linux 2010-11-22 12:58 ` Russell King - ARM Linux 2010-11-12 18:00 ` [PATCH v2 08/20] ARM: LPAE: MMU setup for the 3-level page table format Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-14 10:13 ` Catalin Marinas 2010-11-14 10:13 ` Catalin Marinas 2010-11-22 13:10 ` Russell King - ARM Linux 2010-11-22 13:10 ` Russell King - ARM Linux 2010-11-23 11:38 ` Catalin Marinas 2010-11-23 11:38 ` Catalin Marinas 2010-11-23 17:33 ` Russell King - ARM Linux 2010-11-23 17:33 ` Russell King - ARM Linux 2010-11-23 17:35 ` Catalin Marinas 2010-11-23 17:35 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 09/20] ARM: LPAE: Change setup_mm_for_reboot() to work with LPAE Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-22 13:11 ` Russell King - ARM Linux 2010-11-22 13:11 ` Russell King - ARM Linux 2010-11-12 18:00 ` [PATCH v2 10/20] ARM: LPAE: Remove the FIRST_USER_PGD_NR and USER_PTRS_PER_PGD definitions Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-22 13:11 ` Russell King - ARM Linux 2010-11-22 13:11 ` Russell King - ARM Linux 2010-11-12 18:00 ` [PATCH v2 11/20] ARM: LPAE: Add fault handling support Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-22 13:15 ` Russell King - ARM Linux 2010-11-22 13:15 ` Russell King - ARM Linux 2010-11-22 13:19 ` Catalin Marinas 2010-11-22 13:19 ` Catalin Marinas 2010-11-22 13:32 ` Russell King - ARM Linux 2010-11-22 13:32 ` Russell King - ARM Linux 2010-11-22 13:38 ` Catalin Marinas 2010-11-22 13:38 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 12/20] ARM: LPAE: Add context switching support Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 13/20] ARM: LPAE: Add SMP support for the 3-level page table format Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-22 13:37 ` Russell King - ARM Linux 2010-11-22 13:37 ` Russell King - ARM Linux 2010-11-12 18:00 ` [PATCH v2 14/20] ARM: LPAE: use phys_addr_t instead of unsigned long for physical addresses Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 15/20] ARM: LPAE: Use generic dma_addr_t type definition Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 16/20] ARM: LPAE: mark memory banks with start > ULONG_MAX as highmem Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 17/20] ARM: LPAE: use phys_addr_t for physical start address in early_mem Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 18/20] ARM: LPAE: add support for ATAG_MEM64 Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 19/20] ARM: LPAE: define printk format for physical addresses and page table entries Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-22 13:43 ` Russell King - ARM Linux 2010-11-22 13:43 ` Russell King - ARM Linux 2010-11-22 13:49 ` Catalin Marinas 2010-11-22 13:49 ` Catalin Marinas 2010-11-12 18:00 ` [PATCH v2 20/20] ARM: LPAE: Add the Kconfig entries Catalin Marinas 2010-11-12 18:00 ` Catalin Marinas 2010-11-13 12:38 ` Sergei Shtylyov 2010-11-13 12:38 ` Sergei Shtylyov 2010-11-14 10:11 ` Catalin Marinas 2010-11-14 10:11 ` Catalin Marinas
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