From: Tomasz Nowicki <tn@semihalf.com> To: bhelgaas@google.com, arnd@arndb.de, will.deacon@arm.com, catalin.marinas@arm.com, rjw@rjwysocki.net, hanjun.guo@linaro.org, Lorenzo.Pieralisi@arm.com, okaya@codeaurora.org, jiang.liu@linux.intel.com, Stefano.Stabellini@eu.citrix.com Cc: robert.richter@caviumnetworks.com, mw@semihalf.com, Liviu.Dudau@arm.com, ddaney@caviumnetworks.com, tglx@linutronix.de, wangyijing@huawei.com, Suravee.Suthikulpanit@amd.com, msalter@redhat.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org, jchandra@broadcom.com, jcm@redhat.com Subject: [PATCH V2 20/23] ACPI, PCI: Refine the way to handle translation_offset for ACPI resources Date: Wed, 16 Dec 2015 16:16:30 +0100 [thread overview] Message-ID: <1450278993-12664-21-git-send-email-tn@semihalf.com> (raw) In-Reply-To: <1450278993-12664-1-git-send-email-tn@semihalf.com> From: Liu Jiang <jiang.liu@linux.intel.com> Some architectures, such as IA64 and ARM64, have no instructions to directly access PCI IO ports, so they map PCI IO ports into PCI MMIO address space. Typically PCI host bridges on those architectures take the responsibility to map (translate) PCI IO port transactions into Memory-Mapped IO transactions. ACPI specification provides support of such a usage case by using resource translation_offset. But current ACPI resource parsing interface isn't neutral enough, it still has some special logic for IA64. So refine the ACPI resource parsing interface and IA64 code to neutrally handle translation_offset by: 1) ACPI resource parsing interface doesn't do any translation, it just save the translation_offset to be used by arch code. 2) Arch code will do the mapping(translation) based on arch specific information. Typically it does: 2.a) Translate per PCI domain IO port address space into system global IO port address space. 2.b) Setup MMIO address mapping for IO ports. void handle_io_resource(struct resource_entry *io_entry) { struct resource *mmio_res; mmio_res = kzalloc(sizeof(*mmio_res), GFP_KERNEL); mmio_res->flags = IORESOURCE_MEM; mmio_res->start = io_entry->offset + io_entry->res->start; mmio_res->end = io_entry->offset + io_entry->res->end; insert_resource(&iomem_resource, mmio_res) base = map_to_system_ioport_address(entry); io_entry->offset = base; io_entry->res->start += base; io_entry->res->end += base; } Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> --- arch/ia64/pci/pci.c | 26 ++++++++++++++++---------- drivers/acpi/resource.c | 12 +++++------- 2 files changed, 21 insertions(+), 17 deletions(-) diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index c1e8ed5..d496976 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c @@ -154,7 +154,7 @@ static int add_io_space(struct device *dev, struct pci_root_info *info, struct resource_entry *iospace; struct resource *resource, *res = entry->res; char *name; - unsigned long base, min, max, base_port; + unsigned long base_mmio, base_port; unsigned int sparse = 0, space_nr, len; len = strlen(info->common.name) + 32; @@ -172,12 +172,10 @@ static int add_io_space(struct device *dev, struct pci_root_info *info, goto free_resource; name = (char *)(iospace + 1); - min = res->start - entry->offset; - max = res->end - entry->offset; - base = __pa(io_space[space_nr].mmio_base); + base_mmio = __pa(io_space[space_nr].mmio_base); base_port = IO_SPACE_BASE(space_nr); snprintf(name, len, "%s I/O Ports %08lx-%08lx", info->common.name, - base_port + min, base_port + max); + base_port + res->start, base_port + res->end); /* * The SDM guarantees the legacy 0-64K space is sparse, but if the @@ -190,19 +188,27 @@ static int add_io_space(struct device *dev, struct pci_root_info *info, resource = iospace->res; resource->name = name; resource->flags = IORESOURCE_MEM; - resource->start = base + (sparse ? IO_SPACE_SPARSE_ENCODING(min) : min); - resource->end = base + (sparse ? IO_SPACE_SPARSE_ENCODING(max) : max); + resource->start = base_mmio; + resource->end = base_mmio; + if (sparse) { + resource->start += IO_SPACE_SPARSE_ENCODING(res->start); + resource->end += IO_SPACE_SPARSE_ENCODING(res->end); + } else { + resource->start += res->start; + resource->end += res->end; + } if (insert_resource(&iomem_resource, resource)) { dev_err(dev, "can't allocate host bridge io space resource %pR\n", resource); goto free_resource; } + resource_list_add_tail(iospace, &info->io_resources); + /* Adjust base of original IO port resource descriptor */ entry->offset = base_port; - res->start = min + base_port; - res->end = max + base_port; - resource_list_add_tail(iospace, &info->io_resources); + res->start += base_port; + res->end += base_port; return 0; diff --git a/drivers/acpi/resource.c b/drivers/acpi/resource.c index cdc5c25..6578f68 100644 --- a/drivers/acpi/resource.c +++ b/drivers/acpi/resource.c @@ -190,8 +190,7 @@ static bool acpi_decode_space(struct resource_win *win, { u8 iodec = attr->granularity == 0xfff ? ACPI_DECODE_10 : ACPI_DECODE_16; bool wp = addr->info.mem.write_protect; - u64 len = attr->address_length; - u64 start, end, offset = 0; + u64 len = attr->address_length, offset = 0; struct resource *res = &win->res; /* @@ -215,14 +214,13 @@ static bool acpi_decode_space(struct resource_win *win, else if (attr->translation_offset) pr_debug("ACPI: translation_offset(%lld) is invalid for non-bridge device.\n", attr->translation_offset); - start = attr->minimum + offset; - end = attr->maximum + offset; win->offset = offset; - res->start = start; - res->end = end; + res->start = attr->minimum; + res->end = attr->maximum; if (sizeof(resource_size_t) < sizeof(u64) && - (offset != win->offset || start != res->start || end != res->end)) { + (offset != win->offset || attr->minimum != res->start || + attr->maximum != res->end)) { pr_warn("acpi resource window ([%#llx-%#llx] ignored, not CPU addressable)\n", attr->minimum, attr->maximum); return false; -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: tn@semihalf.com (Tomasz Nowicki) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V2 20/23] ACPI, PCI: Refine the way to handle translation_offset for ACPI resources Date: Wed, 16 Dec 2015 16:16:30 +0100 [thread overview] Message-ID: <1450278993-12664-21-git-send-email-tn@semihalf.com> (raw) In-Reply-To: <1450278993-12664-1-git-send-email-tn@semihalf.com> From: Liu Jiang <jiang.liu@linux.intel.com> Some architectures, such as IA64 and ARM64, have no instructions to directly access PCI IO ports, so they map PCI IO ports into PCI MMIO address space. Typically PCI host bridges on those architectures take the responsibility to map (translate) PCI IO port transactions into Memory-Mapped IO transactions. ACPI specification provides support of such a usage case by using resource translation_offset. But current ACPI resource parsing interface isn't neutral enough, it still has some special logic for IA64. So refine the ACPI resource parsing interface and IA64 code to neutrally handle translation_offset by: 1) ACPI resource parsing interface doesn't do any translation, it just save the translation_offset to be used by arch code. 2) Arch code will do the mapping(translation) based on arch specific information. Typically it does: 2.a) Translate per PCI domain IO port address space into system global IO port address space. 2.b) Setup MMIO address mapping for IO ports. void handle_io_resource(struct resource_entry *io_entry) { struct resource *mmio_res; mmio_res = kzalloc(sizeof(*mmio_res), GFP_KERNEL); mmio_res->flags = IORESOURCE_MEM; mmio_res->start = io_entry->offset + io_entry->res->start; mmio_res->end = io_entry->offset + io_entry->res->end; insert_resource(&iomem_resource, mmio_res) base = map_to_system_ioport_address(entry); io_entry->offset = base; io_entry->res->start += base; io_entry->res->end += base; } Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> --- arch/ia64/pci/pci.c | 26 ++++++++++++++++---------- drivers/acpi/resource.c | 12 +++++------- 2 files changed, 21 insertions(+), 17 deletions(-) diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index c1e8ed5..d496976 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c @@ -154,7 +154,7 @@ static int add_io_space(struct device *dev, struct pci_root_info *info, struct resource_entry *iospace; struct resource *resource, *res = entry->res; char *name; - unsigned long base, min, max, base_port; + unsigned long base_mmio, base_port; unsigned int sparse = 0, space_nr, len; len = strlen(info->common.name) + 32; @@ -172,12 +172,10 @@ static int add_io_space(struct device *dev, struct pci_root_info *info, goto free_resource; name = (char *)(iospace + 1); - min = res->start - entry->offset; - max = res->end - entry->offset; - base = __pa(io_space[space_nr].mmio_base); + base_mmio = __pa(io_space[space_nr].mmio_base); base_port = IO_SPACE_BASE(space_nr); snprintf(name, len, "%s I/O Ports %08lx-%08lx", info->common.name, - base_port + min, base_port + max); + base_port + res->start, base_port + res->end); /* * The SDM guarantees the legacy 0-64K space is sparse, but if the @@ -190,19 +188,27 @@ static int add_io_space(struct device *dev, struct pci_root_info *info, resource = iospace->res; resource->name = name; resource->flags = IORESOURCE_MEM; - resource->start = base + (sparse ? IO_SPACE_SPARSE_ENCODING(min) : min); - resource->end = base + (sparse ? IO_SPACE_SPARSE_ENCODING(max) : max); + resource->start = base_mmio; + resource->end = base_mmio; + if (sparse) { + resource->start += IO_SPACE_SPARSE_ENCODING(res->start); + resource->end += IO_SPACE_SPARSE_ENCODING(res->end); + } else { + resource->start += res->start; + resource->end += res->end; + } if (insert_resource(&iomem_resource, resource)) { dev_err(dev, "can't allocate host bridge io space resource %pR\n", resource); goto free_resource; } + resource_list_add_tail(iospace, &info->io_resources); + /* Adjust base of original IO port resource descriptor */ entry->offset = base_port; - res->start = min + base_port; - res->end = max + base_port; - resource_list_add_tail(iospace, &info->io_resources); + res->start += base_port; + res->end += base_port; return 0; diff --git a/drivers/acpi/resource.c b/drivers/acpi/resource.c index cdc5c25..6578f68 100644 --- a/drivers/acpi/resource.c +++ b/drivers/acpi/resource.c @@ -190,8 +190,7 @@ static bool acpi_decode_space(struct resource_win *win, { u8 iodec = attr->granularity == 0xfff ? ACPI_DECODE_10 : ACPI_DECODE_16; bool wp = addr->info.mem.write_protect; - u64 len = attr->address_length; - u64 start, end, offset = 0; + u64 len = attr->address_length, offset = 0; struct resource *res = &win->res; /* @@ -215,14 +214,13 @@ static bool acpi_decode_space(struct resource_win *win, else if (attr->translation_offset) pr_debug("ACPI: translation_offset(%lld) is invalid for non-bridge device.\n", attr->translation_offset); - start = attr->minimum + offset; - end = attr->maximum + offset; win->offset = offset; - res->start = start; - res->end = end; + res->start = attr->minimum; + res->end = attr->maximum; if (sizeof(resource_size_t) < sizeof(u64) && - (offset != win->offset || start != res->start || end != res->end)) { + (offset != win->offset || attr->minimum != res->start || + attr->maximum != res->end)) { pr_warn("acpi resource window ([%#llx-%#llx] ignored, not CPU addressable)\n", attr->minimum, attr->maximum); return false; -- 1.9.1
next prev parent reply other threads:[~2015-12-16 15:16 UTC|newest] Thread overview: 171+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-12-16 15:16 [PATCH V2 00/23] MMCONFIG refactoring and support for ARM64 PCI hostbridge init based on ACPI Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 01/23] x86, pci: Reorder logic of pci_mmconfig_insert() function Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 02/23] x86, pci, acpi: Move arch-agnostic MMCONFIG (aka ECAM) and ACPI code out of arch/x86/ directory Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 03/23] pci, acpi, mcfg: Provide generic implementation of MCFG code initialization Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 04/23] x86, pci: mmconfig_{32,64}.c code refactoring - remove code duplication Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 04/23] x86, pci: mmconfig_{32, 64}.c " Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 05/23] x86, pci, ecam: mmconfig_64.c becomes default implementation for ECAM driver Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 06/23] XEN / PCI: Remove the dependence on arch x86 when PCI_MMCONFIG=y Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-17 10:25 ` Tomasz Nowicki 2015-12-17 10:25 ` Tomasz Nowicki 2015-12-17 10:40 ` Tomasz Nowicki 2015-12-17 10:40 ` Tomasz Nowicki 2015-12-21 18:12 ` Stefano Stabellini 2015-12-21 18:12 ` Stefano Stabellini 2015-12-21 18:12 ` Stefano Stabellini 2015-12-22 8:34 ` Tomasz Nowicki 2015-12-22 8:34 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 07/23] pci, acpi, mcfg: Provide default RAW ACPI PCI config space accessors Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 08/23] arm64, acpi: Use empty PCI config space accessors from mcfg.c file Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 09/23] pci, acpi, ecam: Add flag to indicate whether ECAM region was hot added or not Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 10/23] x86, pci: Cleanup platform specific MCFG data using previously added ECAM hot_added flag Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 11/23] arm64, pci: Remove useless boot time IRQ assignment when booting with DT Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2016-01-12 13:50 ` Lorenzo Pieralisi 2016-01-12 13:50 ` Lorenzo Pieralisi 2016-01-12 16:13 ` Tomasz Nowicki 2016-01-12 16:13 ` Tomasz Nowicki 2016-01-12 17:56 ` David Daney 2016-01-12 17:56 ` David Daney 2016-01-12 17:56 ` David Daney 2016-01-13 9:43 ` Tomasz Nowicki 2016-01-13 9:43 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 12/23] pci, acpi: Move ACPI host bridge device companion assignment to core code Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 13/23] x86, ia64, pci: Remove ACPI companion device from platform specific data Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 14/23] pci, acpi: Provide generic way to assign bus domain number Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 15/23] x86, ia64, pci: Convert arches to use PCI_DOMAINS_GENERIC Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 16/23] x86, ia64: Include acpi_pci_{add|remove}_bus to the default pcibios_{add|remove}_bus implementation Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 17/23] acpi, mcfg: Implement two calls that might be used to inject/remove MCFG region Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 18/23] x86, acpi, pci: Use equivalent function introduced in previous patch Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 19/23] acpi, mcfg: Add default PCI config accessors implementation and initial support for related quirks Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki [this message] 2015-12-16 15:16 ` [PATCH V2 20/23] ACPI, PCI: Refine the way to handle translation_offset for ACPI resources Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 21/23] pci, acpi: Support for ACPI based PCI hostbridge init Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-18 12:40 ` Arnd Bergmann 2015-12-18 12:40 ` Arnd Bergmann 2015-12-21 10:21 ` Tomasz Nowicki 2015-12-21 10:21 ` Tomasz Nowicki 2015-12-16 15:16 ` [PATCH V2 22/23] pci, acpi: Match PCI config space accessors against platfrom specific quirks Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-21 11:47 ` Gabriele Paoloni 2015-12-21 11:47 ` Gabriele Paoloni 2015-12-21 11:47 ` Gabriele Paoloni 2015-12-21 14:10 ` Arnd Bergmann 2015-12-21 14:10 ` Arnd Bergmann 2015-12-21 14:10 ` Arnd Bergmann 2015-12-21 14:10 ` Arnd Bergmann 2015-12-21 17:29 ` David Daney 2015-12-21 17:29 ` David Daney 2015-12-21 17:29 ` David Daney 2015-12-21 17:29 ` David Daney 2015-12-21 22:42 ` Arnd Bergmann 2015-12-21 22:42 ` Arnd Bergmann 2015-12-21 22:42 ` Arnd Bergmann 2015-12-21 22:42 ` Arnd Bergmann 2015-12-21 23:24 ` Jon Masters 2015-12-21 23:24 ` Jon Masters 2015-12-21 23:24 ` Jon Masters 2015-12-21 23:24 ` Jon Masters 2015-12-21 23:10 ` Jon Masters 2015-12-21 23:10 ` Jon Masters 2015-12-21 23:10 ` Jon Masters 2015-12-21 23:10 ` Jon Masters 2015-12-22 8:45 ` Tomasz Nowicki 2015-12-22 8:45 ` Tomasz Nowicki 2015-12-22 8:45 ` Tomasz Nowicki 2015-12-22 8:45 ` Tomasz Nowicki 2015-12-22 9:29 ` Gabriele Paoloni 2015-12-22 9:29 ` Gabriele Paoloni 2015-12-22 9:29 ` Gabriele Paoloni 2015-12-22 9:29 ` Gabriele Paoloni 2015-12-22 16:36 ` Jon Masters 2015-12-22 16:36 ` Jon Masters 2015-12-22 16:36 ` Jon Masters 2015-12-22 16:36 ` Jon Masters 2015-12-22 16:45 ` Jon Masters 2015-12-22 16:45 ` Jon Masters 2015-12-22 16:45 ` Jon Masters 2015-12-22 16:45 ` Jon Masters 2015-12-22 17:49 ` Gabriele Paoloni 2015-12-22 17:49 ` Gabriele Paoloni 2015-12-22 17:49 ` Gabriele Paoloni 2015-12-22 17:49 ` Gabriele Paoloni 2015-12-22 10:20 ` Tomasz Nowicki 2015-12-22 10:20 ` Tomasz Nowicki 2015-12-22 10:20 ` Tomasz Nowicki 2015-12-22 14:48 ` Gabriele Paoloni 2015-12-22 14:48 ` Gabriele Paoloni 2015-12-22 14:48 ` Gabriele Paoloni 2015-12-23 9:38 ` Hanjun Guo 2015-12-23 9:38 ` Hanjun Guo 2015-12-23 9:38 ` Hanjun Guo 2016-01-08 14:16 ` Mark Salter 2016-01-08 14:16 ` Mark Salter 2016-01-08 14:36 ` Tomasz Nowicki 2016-01-08 14:36 ` Tomasz Nowicki 2016-01-08 14:51 ` Mark Salter 2016-01-08 14:51 ` Mark Salter 2016-01-08 14:42 ` Jeremy Linton 2016-01-08 14:42 ` Jeremy Linton 2016-01-08 14:42 ` Jeremy Linton 2016-01-08 15:01 ` Mark Rutland 2016-01-08 15:01 ` Mark Rutland 2016-01-08 15:01 ` Mark Rutland 2016-01-08 15:12 ` Mark Rutland 2016-01-08 15:12 ` Mark Rutland 2016-01-08 16:07 ` Mark Salter 2016-01-08 16:07 ` Mark Salter 2015-12-16 15:16 ` [PATCH V2 23/23] arm64, pci, acpi: Start using ACPI based PCI host bridge driver for ARM64 Tomasz Nowicki 2015-12-16 15:16 ` Tomasz Nowicki 2015-12-17 21:24 ` [PATCH V2 00/23] MMCONFIG refactoring and support for ARM64 PCI hostbridge init based on ACPI Sinan Kaya 2015-12-17 21:24 ` Sinan Kaya 2015-12-18 12:26 ` Tomasz Nowicki 2015-12-18 12:26 ` Tomasz Nowicki 2015-12-18 18:56 ` okaya 2015-12-18 18:56 ` okaya at codeaurora.org 2015-12-21 10:37 ` Tomasz Nowicki 2015-12-21 10:37 ` Tomasz Nowicki 2015-12-21 12:10 ` Lorenzo Pieralisi 2015-12-21 12:10 ` Lorenzo Pieralisi 2015-12-21 12:42 ` Tomasz Nowicki 2015-12-21 12:42 ` Tomasz Nowicki 2015-12-21 14:15 ` Arnd Bergmann 2015-12-21 14:15 ` Arnd Bergmann 2015-12-21 15:26 ` Okaya 2015-12-21 15:26 ` Okaya at codeaurora.org 2015-12-21 22:39 ` Arnd Bergmann 2015-12-21 22:39 ` Arnd Bergmann 2016-01-11 15:39 ` Lorenzo Pieralisi 2016-01-11 15:39 ` Lorenzo Pieralisi 2016-01-11 15:56 ` Sinan Kaya 2016-01-11 15:56 ` Sinan Kaya 2016-01-12 14:30 ` Arnd Bergmann 2016-01-12 14:30 ` Arnd Bergmann 2016-01-12 18:38 ` Lorenzo Pieralisi 2016-01-12 18:38 ` Lorenzo Pieralisi 2016-01-12 21:37 ` Arnd Bergmann 2016-01-12 21:37 ` Arnd Bergmann 2016-01-11 16:09 ` Lorenzo Pieralisi 2016-01-11 16:09 ` Lorenzo Pieralisi
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