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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org,
	mike.leach@linaro.org, robert.walker@arm.com,
	coresight@lists.linaro.org, devicetree@vger.kernel.org,
	robh@kernel.org, frowand.list@gmail.com,
	Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v2 01/12] coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35
Date: Tue, 29 May 2018 14:15:26 +0100	[thread overview]
Message-ID: <1527599737-28408-2-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1527599737-28408-1-git-send-email-suzuki.poulose@arm.com>

Add ETM PIDs of the Arm cortex-A CPUs to the white list of ETMs.
While at it add a helper macro to make it easier to add the new
entries.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
Changes since last version:
 - Use ETM's ID register to dump the version, rather than hard
   coding it for each CPU.
---
 drivers/hwtracing/coresight/coresight-etm4x.c | 31 ++++++++++++---------------
 1 file changed, 14 insertions(+), 17 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 9bc04c5..1d94ebe 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -1027,7 +1027,8 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
 	}
 
 	pm_runtime_put(&adev->dev);
-	dev_info(dev, "%s initialized\n", (char *)id->data);
+	dev_info(dev, "CPU%d: ETM v%d.%d initialized\n",
+		 drvdata->cpu, drvdata->arch >> 4, drvdata->arch & 0xf);
 
 	if (boot_enable) {
 		coresight_enable(drvdata->csdev);
@@ -1045,23 +1046,19 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
 	return ret;
 }
 
+#define ETM4x_AMBA_ID(pid)			\
+	{					\
+		.id	= pid,			\
+		.mask	= 0x000fffff,		\
+	}
+
 static const struct amba_id etm4_ids[] = {
-	{       /* ETM 4.0 - Cortex-A53  */
-		.id	= 0x000bb95d,
-		.mask	= 0x000fffff,
-		.data	= "ETM 4.0",
-	},
-	{       /* ETM 4.0 - Cortex-A57 */
-		.id	= 0x000bb95e,
-		.mask	= 0x000fffff,
-		.data	= "ETM 4.0",
-	},
-	{       /* ETM 4.0 - A72, Maia, HiSilicon */
-		.id = 0x000bb95a,
-		.mask = 0x000fffff,
-		.data = "ETM 4.0",
-	},
-	{ 0, 0},
+	ETM4x_AMBA_ID(0x000bb95d),		/* Cortex-A53 */
+	ETM4x_AMBA_ID(0x000bb95e),		/* Cortex-A57 */
+	ETM4x_AMBA_ID(0x000bb95a),		/* Cortex-A72 */
+	ETM4x_AMBA_ID(0x000bb959),		/* Cortex-A73 */
+	ETM4x_AMBA_ID(0x000bb9da),		/* Cortex-A35 */
+	{},
 };
 
 static struct amba_driver etm4x_driver = {
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: suzuki.poulose@arm.com (Suzuki K Poulose)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 01/12] coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35
Date: Tue, 29 May 2018 14:15:26 +0100	[thread overview]
Message-ID: <1527599737-28408-2-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1527599737-28408-1-git-send-email-suzuki.poulose@arm.com>

Add ETM PIDs of the Arm cortex-A CPUs to the white list of ETMs.
While at it add a helper macro to make it easier to add the new
entries.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
Changes since last version:
 - Use ETM's ID register to dump the version, rather than hard
   coding it for each CPU.
---
 drivers/hwtracing/coresight/coresight-etm4x.c | 31 ++++++++++++---------------
 1 file changed, 14 insertions(+), 17 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 9bc04c5..1d94ebe 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -1027,7 +1027,8 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
 	}
 
 	pm_runtime_put(&adev->dev);
-	dev_info(dev, "%s initialized\n", (char *)id->data);
+	dev_info(dev, "CPU%d: ETM v%d.%d initialized\n",
+		 drvdata->cpu, drvdata->arch >> 4, drvdata->arch & 0xf);
 
 	if (boot_enable) {
 		coresight_enable(drvdata->csdev);
@@ -1045,23 +1046,19 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
 	return ret;
 }
 
+#define ETM4x_AMBA_ID(pid)			\
+	{					\
+		.id	= pid,			\
+		.mask	= 0x000fffff,		\
+	}
+
 static const struct amba_id etm4_ids[] = {
-	{       /* ETM 4.0 - Cortex-A53  */
-		.id	= 0x000bb95d,
-		.mask	= 0x000fffff,
-		.data	= "ETM 4.0",
-	},
-	{       /* ETM 4.0 - Cortex-A57 */
-		.id	= 0x000bb95e,
-		.mask	= 0x000fffff,
-		.data	= "ETM 4.0",
-	},
-	{       /* ETM 4.0 - A72, Maia, HiSilicon */
-		.id = 0x000bb95a,
-		.mask = 0x000fffff,
-		.data = "ETM 4.0",
-	},
-	{ 0, 0},
+	ETM4x_AMBA_ID(0x000bb95d),		/* Cortex-A53 */
+	ETM4x_AMBA_ID(0x000bb95e),		/* Cortex-A57 */
+	ETM4x_AMBA_ID(0x000bb95a),		/* Cortex-A72 */
+	ETM4x_AMBA_ID(0x000bb959),		/* Cortex-A73 */
+	ETM4x_AMBA_ID(0x000bb9da),		/* Cortex-A35 */
+	{},
 };
 
 static struct amba_driver etm4x_driver = {
-- 
2.7.4

  reply	other threads:[~2018-05-29 13:16 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-29 13:15 [PATCH v2 00/12] coresight: tmc-etr Transparent buffer management Suzuki K Poulose
2018-05-29 13:15 ` Suzuki K Poulose
2018-05-29 13:15 ` Suzuki K Poulose
2018-05-29 13:15 ` Suzuki K Poulose [this message]
2018-05-29 13:15   ` [PATCH v2 01/12] coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35 Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 02/12] coresight: tmc: Hide trace buffer handling for file read Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 03/12] coresight: tmc-etr: Do not clean trace buffer Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 04/12] coresight: tmc-etr: Disallow perf mode Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 05/12] coresight: Add helper for inserting synchronization packets Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 06/12] dts: bindings: Restrict coresight tmc-etr scatter-gather mode Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 07/12] dts: juno: Add scatter-gather support for all revisions Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 08/12] coresight: Add generic TMC sg table framework Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 09/12] coresight: Add support for TMC ETR SG unit Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 10/12] coresight: tmc-etr: Add transparent buffer management Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 11/12] coresight: tmc-etr buf: Add TMC scatter gather mode backend Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 12/12] coresight: tmc: Add configuration support for trace buffer size Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-31  3:55   ` Rob Herring
2018-05-31  3:55     ` Rob Herring
2018-05-31 15:36 ` [PATCH v2 00/12] coresight: tmc-etr Transparent buffer management Mathieu Poirier
2018-05-31 15:36   ` Mathieu Poirier
2018-05-31 16:17   ` Suzuki K Poulose
2018-05-31 16:17     ` Suzuki K Poulose

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