All of lore.kernel.org
 help / color / mirror / Atom feed
From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org,
	mike.leach@linaro.org, robert.walker@arm.com,
	coresight@lists.linaro.org, devicetree@vger.kernel.org,
	robh@kernel.org, frowand.list@gmail.com,
	Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v2 03/12] coresight: tmc-etr: Do not clean trace buffer
Date: Tue, 29 May 2018 14:15:28 +0100	[thread overview]
Message-ID: <1527599737-28408-4-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1527599737-28408-1-git-send-email-suzuki.poulose@arm.com>

We zero out the entire trace buffer used for ETR before it is enabled,
for helping with debugging. With the addition of scatter-gather mode,
the buffer could be bigger and non-contiguous.

Get rid of this step; if someone wants to debug, they can always add it
as and when needed.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
 drivers/hwtracing/coresight/coresight-tmc-etr.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index f88342d..1de05c9 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -13,9 +13,6 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
 {
 	u32 axictl, sts;
 
-	/* Zero out the memory to help with debug */
-	memset(drvdata->vaddr, 0, drvdata->size);
-
 	CS_UNLOCK(drvdata->base);
 
 	/* Wait for TMCSReady bit to be set */
@@ -340,9 +337,8 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata)
 	if (drvdata->mode == CS_MODE_SYSFS) {
 		/*
 		 * The trace run will continue with the same allocated trace
-		 * buffer. The trace buffer is cleared in tmc_etr_enable_hw(),
-		 * so we don't have to explicitly clear it. Also, since the
-		 * tracer is still enabled drvdata::buf can't be NULL.
+		 * buffer. Since the tracer is still enabled drvdata::buf can't
+		 * be NULL.
 		 */
 		tmc_etr_enable_hw(drvdata);
 	} else {
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org, mathieu.poirier@linaro.org,
	robh@kernel.org, coresight@lists.linaro.org,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	linux-kernel@vger.kernel.org, robert.walker@arm.com,
	frowand.list@gmail.com, mike.leach@linaro.org
Subject: [PATCH v2 03/12] coresight: tmc-etr: Do not clean trace buffer
Date: Tue, 29 May 2018 14:15:28 +0100	[thread overview]
Message-ID: <1527599737-28408-4-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1527599737-28408-1-git-send-email-suzuki.poulose@arm.com>

We zero out the entire trace buffer used for ETR before it is enabled,
for helping with debugging. With the addition of scatter-gather mode,
the buffer could be bigger and non-contiguous.

Get rid of this step; if someone wants to debug, they can always add it
as and when needed.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
 drivers/hwtracing/coresight/coresight-tmc-etr.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index f88342d..1de05c9 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -13,9 +13,6 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
 {
 	u32 axictl, sts;
 
-	/* Zero out the memory to help with debug */
-	memset(drvdata->vaddr, 0, drvdata->size);
-
 	CS_UNLOCK(drvdata->base);
 
 	/* Wait for TMCSReady bit to be set */
@@ -340,9 +337,8 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata)
 	if (drvdata->mode == CS_MODE_SYSFS) {
 		/*
 		 * The trace run will continue with the same allocated trace
-		 * buffer. The trace buffer is cleared in tmc_etr_enable_hw(),
-		 * so we don't have to explicitly clear it. Also, since the
-		 * tracer is still enabled drvdata::buf can't be NULL.
+		 * buffer. Since the tracer is still enabled drvdata::buf can't
+		 * be NULL.
 		 */
 		tmc_etr_enable_hw(drvdata);
 	} else {
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: suzuki.poulose@arm.com (Suzuki K Poulose)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 03/12] coresight: tmc-etr: Do not clean trace buffer
Date: Tue, 29 May 2018 14:15:28 +0100	[thread overview]
Message-ID: <1527599737-28408-4-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1527599737-28408-1-git-send-email-suzuki.poulose@arm.com>

We zero out the entire trace buffer used for ETR before it is enabled,
for helping with debugging. With the addition of scatter-gather mode,
the buffer could be bigger and non-contiguous.

Get rid of this step; if someone wants to debug, they can always add it
as and when needed.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
 drivers/hwtracing/coresight/coresight-tmc-etr.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index f88342d..1de05c9 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -13,9 +13,6 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
 {
 	u32 axictl, sts;
 
-	/* Zero out the memory to help with debug */
-	memset(drvdata->vaddr, 0, drvdata->size);
-
 	CS_UNLOCK(drvdata->base);
 
 	/* Wait for TMCSReady bit to be set */
@@ -340,9 +337,8 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata)
 	if (drvdata->mode == CS_MODE_SYSFS) {
 		/*
 		 * The trace run will continue with the same allocated trace
-		 * buffer. The trace buffer is cleared in tmc_etr_enable_hw(),
-		 * so we don't have to explicitly clear it. Also, since the
-		 * tracer is still enabled drvdata::buf can't be NULL.
+		 * buffer. Since the tracer is still enabled drvdata::buf can't
+		 * be NULL.
 		 */
 		tmc_etr_enable_hw(drvdata);
 	} else {
-- 
2.7.4

  parent reply	other threads:[~2018-05-29 13:19 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-29 13:15 [PATCH v2 00/12] coresight: tmc-etr Transparent buffer management Suzuki K Poulose
2018-05-29 13:15 ` Suzuki K Poulose
2018-05-29 13:15 ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 01/12] coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35 Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 02/12] coresight: tmc: Hide trace buffer handling for file read Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` Suzuki K Poulose [this message]
2018-05-29 13:15   ` [PATCH v2 03/12] coresight: tmc-etr: Do not clean trace buffer Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 04/12] coresight: tmc-etr: Disallow perf mode Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 05/12] coresight: Add helper for inserting synchronization packets Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 06/12] dts: bindings: Restrict coresight tmc-etr scatter-gather mode Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 07/12] dts: juno: Add scatter-gather support for all revisions Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 08/12] coresight: Add generic TMC sg table framework Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 09/12] coresight: Add support for TMC ETR SG unit Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 10/12] coresight: tmc-etr: Add transparent buffer management Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 11/12] coresight: tmc-etr buf: Add TMC scatter gather mode backend Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 12/12] coresight: tmc: Add configuration support for trace buffer size Suzuki K Poulose
2018-05-29 13:15   ` Suzuki K Poulose
2018-05-31  3:55   ` Rob Herring
2018-05-31  3:55     ` Rob Herring
2018-05-31 15:36 ` [PATCH v2 00/12] coresight: tmc-etr Transparent buffer management Mathieu Poirier
2018-05-31 15:36   ` Mathieu Poirier
2018-05-31 16:17   ` Suzuki K Poulose
2018-05-31 16:17     ` Suzuki K Poulose

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1527599737-28408-4-git-send-email-suzuki.poulose@arm.com \
    --to=suzuki.poulose@arm.com \
    --cc=coresight@lists.linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=frowand.list@gmail.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mathieu.poirier@linaro.org \
    --cc=mike.leach@linaro.org \
    --cc=robert.walker@arm.com \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.