From: no-reply@patchew.org To: kbastian@mail.uni-paderborn.de Cc: fam@euphon.net, sagark@eecs.berkeley.edu, palmer@sifive.com, qemu-riscv@nongnu.org, peer.adelt@hni.uni-paderborn.de, richard.henderson@linaro.org, qemu-devel@nongnu.org Subject: Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Date: Thu, 31 Jan 2019 13:25:41 -0800 (PST) [thread overview] Message-ID: <154896993954.23946.13769321981568956062@ebba9967afc0> (raw) In-Reply-To: <20190122092909.5341-1-kbastian@mail.uni-paderborn.de> Patchew URL: https://patchew.org/QEMU/20190122092909.5341-1-kbastian@mail.uni-paderborn.de/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Type: series Message-id: 20190122092909.5341-1-kbastian@mail.uni-paderborn.de === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu t [tag update] patchew/20190122092909.5341-1-kbastian@mail.uni-paderborn.de -> patchew/20190122092909.5341-1-kbastian@mail.uni-paderborn.de Switched to a new branch 'test' 9e8165dd94 target/riscv: Remaining rvc insn reuse 32 bit translators e66c95c9bc target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 efb9740ab1 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 3c31768d81 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns 795b478c4c target/riscv: Convert @cs_2 insns to share translation functions 110406e271 target/riscv: Remove decode_RV32_64G() 976eb72944 target/riscv: Remove gen_system() 0edf15c5d8 target/riscv: Rename trans_arith to gen_arith dfa6dc21c3 target/riscv: Remove manual decoding of RV32/64M insn 5a6623cc6d target/riscv: Remove shift and slt insn manual decoding 42aa2541a4 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists f6ead4a8ee target/riscv: Move gen_arith_imm() decoding into trans_* functions 132f8da29f target/riscv: Remove manual decoding from gen_store() 2e18729d25 target/riscv: Remove manual decoding from gen_load() 308b594c3a target/riscv: Remove manual decoding from gen_branch() 12f3dae1bf target/riscv: Remove gen_jalr() 663d608c7e target/riscv: Convert quadrant 2 of RVXC insns to decodetree f689ec99ed target/riscv: Convert quadrant 1 of RVXC insns to decodetree baba3b6b99 target/riscv: Convert quadrant 0 of RVXC insns to decodetree 222b932a1c target/riscv: Convert RV priv insns to decodetree 57d7252133 target/riscv: Convert RV64D insns to decodetree 85126a61bc target/riscv: Convert RV32D insns to decodetree 4b1f8c614b target/riscv: Convert RV64F insns to decodetree ca3cfe3dd9 target/riscv: Convert RV32F insns to decodetree 70fd2547e6 target/riscv: Convert RV64A insns to decodetree d05a7c9118 target/riscv: Convert RV32A insns to decodetree f56b79ac87 target/riscv: Convert RVXM insns to decodetree f5805d1ea7 target/riscv: Convert RVXI csr insns to decodetree 0d45dd0abf target/riscv: Convert RVXI fence insns to decodetree 197e9af126 target/riscv: Convert RVXI arithmetic insns to decodetree f4195b8860 target/riscv: Convert RV64I load/store insns to decodetree c44be19b1c target/riscv: Convert RV32I load/store insns to decodetree 944c2876b3 target/riscv: Convert RVXI branch insns to decodetree 2b11f0fa7d target/riscv: Activate decodetree and implemnt LUI & AUIPC a377eafc54 target/riscv: Move CPURISCVState pointer to DisasContext === OUTPUT BEGIN === 1/35 Checking commit a377eafc5405 (target/riscv: Move CPURISCVState pointer to DisasContext) 2/35 Checking commit 2b11f0fa7dd5 (target/riscv: Activate decodetree and implemnt LUI & AUIPC) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #34: new file mode 100644 ERROR: externs should be avoided in .c files #125: FILE: target/riscv/translate.c:1687: +bool decode_insn32(DisasContext *ctx, uint32_t insn); total: 1 errors, 1 warnings, 125 lines checked Patch 2/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/35 Checking commit 944c2876b315 (target/riscv: Convert RVXI branch insns to decodetree) 4/35 Checking commit c44be19b1c8f (target/riscv: Convert RV32I load/store insns to decodetree) 5/35 Checking commit f4195b886030 (target/riscv: Convert RV64I load/store insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #39: new file mode 100644 total: 0 errors, 1 warnings, 76 lines checked Patch 5/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/35 Checking commit 197e9af1264b (target/riscv: Convert RVXI arithmetic insns to decodetree) 7/35 Checking commit 0d45dd0abfc6 (target/riscv: Convert RVXI fence insns to decodetree) 8/35 Checking commit f5805d1ea703 (target/riscv: Convert RVXI csr insns to decodetree) 9/35 Checking commit f56b79ac87ee (target/riscv: Convert RVXM insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #48: new file mode 100644 total: 0 errors, 1 warnings, 145 lines checked Patch 9/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 10/35 Checking commit d05a7c91186f (target/riscv: Convert RV32A insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #54: new file mode 100644 total: 0 errors, 1 warnings, 188 lines checked Patch 10/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 11/35 Checking commit 70fd2547e6cf (target/riscv: Convert RV64A insns to decodetree) 12/35 Checking commit ca3cfe3dd932 (target/riscv: Convert RV32F insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #78: new file mode 100644 total: 0 errors, 1 warnings, 397 lines checked Patch 12/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 13/35 Checking commit 4b1f8c614b02 (target/riscv: Convert RV64F insns to decodetree) 14/35 Checking commit 85126a61bc34 (target/riscv: Convert RV32D insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #51: new file mode 100644 total: 0 errors, 1 warnings, 353 lines checked Patch 14/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 15/35 Checking commit 57d72521333c (target/riscv: Convert RV64D insns to decodetree) 16/35 Checking commit 222b932a1cf7 (target/riscv: Convert RV priv insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #41: new file mode 100644 total: 0 errors, 1 warnings, 214 lines checked Patch 16/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 17/35 Checking commit baba3b6b997c (target/riscv: Convert quadrant 0 of RVXC insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #31: new file mode 100644 ERROR: externs should be avoided in .c files #246: FILE: target/riscv/translate.c:983: +bool decode_insn16(DisasContext *ctx, uint16_t insn); total: 1 errors, 1 warnings, 227 lines checked Patch 17/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 18/35 Checking commit f689ec99ed0e (target/riscv: Convert quadrant 1 of RVXC insns to decodetree) 19/35 Checking commit 663d608c7ebd (target/riscv: Convert quadrant 2 of RVXC insns to decodetree) 20/35 Checking commit 12f3dae1bfb8 (target/riscv: Remove gen_jalr()) 21/35 Checking commit 308b594c3adb (target/riscv: Remove manual decoding from gen_branch()) 22/35 Checking commit 2e18729d253e (target/riscv: Remove manual decoding from gen_load()) 23/35 Checking commit 132f8da29f26 (target/riscv: Remove manual decoding from gen_store()) 24/35 Checking commit f6ead4a8ee53 (target/riscv: Move gen_arith_imm() decoding into trans_* functions) 25/35 Checking commit 42aa2541a436 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists) 26/35 Checking commit 5a6623cc6dab (target/riscv: Remove shift and slt insn manual decoding) 27/35 Checking commit dfa6dc21c3ce (target/riscv: Remove manual decoding of RV32/64M insn) 28/35 Checking commit 0edf15c5d878 (target/riscv: Rename trans_arith to gen_arith) 29/35 Checking commit 976eb72944d8 (target/riscv: Remove gen_system()) 30/35 Checking commit 110406e2710f (target/riscv: Remove decode_RV32_64G()) 31/35 Checking commit 795b478c4c7f (target/riscv: Convert @cs_2 insns to share translation functions) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #42: new file mode 100644 ERROR: externs should be avoided in .c files #182: FILE: target/riscv/translate.c:497: +bool decode_insn16(DisasContext *ctx, uint16_t insn); total: 1 errors, 1 warnings, 164 lines checked Patch 31/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 32/35 Checking commit 3c31768d8171 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns) 33/35 Checking commit efb9740ab17e (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #28: new file mode 100644 total: 0 errors, 1 warnings, 287 lines checked Patch 33/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 34/35 Checking commit e66c95c9bca8 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64) 35/35 Checking commit 9e8165dd9406 (target/riscv: Remaining rvc insn reuse 32 bit translators) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190122092909.5341-1-kbastian@mail.uni-paderborn.de/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-devel@redhat.com
WARNING: multiple messages have this Message-ID (diff)
From: no-reply@patchew.org To: kbastian@mail.uni-paderborn.de Cc: fam@euphon.net, sagark@eecs.berkeley.edu, palmer@sifive.com, kbastian@mail.uni-paderborn.de, qemu-riscv@nongnu.org, peer.adelt@hni.uni-paderborn.de, richard.henderson@linaro.org, qemu-devel@nongnu.org Subject: Re: [Qemu-riscv] [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Date: Thu, 31 Jan 2019 13:25:41 -0800 (PST) [thread overview] Message-ID: <154896993954.23946.13769321981568956062@ebba9967afc0> (raw) In-Reply-To: <20190122092909.5341-1-kbastian@mail.uni-paderborn.de> Patchew URL: https://patchew.org/QEMU/20190122092909.5341-1-kbastian@mail.uni-paderborn.de/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Type: series Message-id: 20190122092909.5341-1-kbastian@mail.uni-paderborn.de === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu t [tag update] patchew/20190122092909.5341-1-kbastian@mail.uni-paderborn.de -> patchew/20190122092909.5341-1-kbastian@mail.uni-paderborn.de Switched to a new branch 'test' 9e8165dd94 target/riscv: Remaining rvc insn reuse 32 bit translators e66c95c9bc target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 efb9740ab1 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 3c31768d81 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns 795b478c4c target/riscv: Convert @cs_2 insns to share translation functions 110406e271 target/riscv: Remove decode_RV32_64G() 976eb72944 target/riscv: Remove gen_system() 0edf15c5d8 target/riscv: Rename trans_arith to gen_arith dfa6dc21c3 target/riscv: Remove manual decoding of RV32/64M insn 5a6623cc6d target/riscv: Remove shift and slt insn manual decoding 42aa2541a4 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists f6ead4a8ee target/riscv: Move gen_arith_imm() decoding into trans_* functions 132f8da29f target/riscv: Remove manual decoding from gen_store() 2e18729d25 target/riscv: Remove manual decoding from gen_load() 308b594c3a target/riscv: Remove manual decoding from gen_branch() 12f3dae1bf target/riscv: Remove gen_jalr() 663d608c7e target/riscv: Convert quadrant 2 of RVXC insns to decodetree f689ec99ed target/riscv: Convert quadrant 1 of RVXC insns to decodetree baba3b6b99 target/riscv: Convert quadrant 0 of RVXC insns to decodetree 222b932a1c target/riscv: Convert RV priv insns to decodetree 57d7252133 target/riscv: Convert RV64D insns to decodetree 85126a61bc target/riscv: Convert RV32D insns to decodetree 4b1f8c614b target/riscv: Convert RV64F insns to decodetree ca3cfe3dd9 target/riscv: Convert RV32F insns to decodetree 70fd2547e6 target/riscv: Convert RV64A insns to decodetree d05a7c9118 target/riscv: Convert RV32A insns to decodetree f56b79ac87 target/riscv: Convert RVXM insns to decodetree f5805d1ea7 target/riscv: Convert RVXI csr insns to decodetree 0d45dd0abf target/riscv: Convert RVXI fence insns to decodetree 197e9af126 target/riscv: Convert RVXI arithmetic insns to decodetree f4195b8860 target/riscv: Convert RV64I load/store insns to decodetree c44be19b1c target/riscv: Convert RV32I load/store insns to decodetree 944c2876b3 target/riscv: Convert RVXI branch insns to decodetree 2b11f0fa7d target/riscv: Activate decodetree and implemnt LUI & AUIPC a377eafc54 target/riscv: Move CPURISCVState pointer to DisasContext === OUTPUT BEGIN === 1/35 Checking commit a377eafc5405 (target/riscv: Move CPURISCVState pointer to DisasContext) 2/35 Checking commit 2b11f0fa7dd5 (target/riscv: Activate decodetree and implemnt LUI & AUIPC) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #34: new file mode 100644 ERROR: externs should be avoided in .c files #125: FILE: target/riscv/translate.c:1687: +bool decode_insn32(DisasContext *ctx, uint32_t insn); total: 1 errors, 1 warnings, 125 lines checked Patch 2/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/35 Checking commit 944c2876b315 (target/riscv: Convert RVXI branch insns to decodetree) 4/35 Checking commit c44be19b1c8f (target/riscv: Convert RV32I load/store insns to decodetree) 5/35 Checking commit f4195b886030 (target/riscv: Convert RV64I load/store insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #39: new file mode 100644 total: 0 errors, 1 warnings, 76 lines checked Patch 5/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/35 Checking commit 197e9af1264b (target/riscv: Convert RVXI arithmetic insns to decodetree) 7/35 Checking commit 0d45dd0abfc6 (target/riscv: Convert RVXI fence insns to decodetree) 8/35 Checking commit f5805d1ea703 (target/riscv: Convert RVXI csr insns to decodetree) 9/35 Checking commit f56b79ac87ee (target/riscv: Convert RVXM insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #48: new file mode 100644 total: 0 errors, 1 warnings, 145 lines checked Patch 9/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 10/35 Checking commit d05a7c91186f (target/riscv: Convert RV32A insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #54: new file mode 100644 total: 0 errors, 1 warnings, 188 lines checked Patch 10/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 11/35 Checking commit 70fd2547e6cf (target/riscv: Convert RV64A insns to decodetree) 12/35 Checking commit ca3cfe3dd932 (target/riscv: Convert RV32F insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #78: new file mode 100644 total: 0 errors, 1 warnings, 397 lines checked Patch 12/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 13/35 Checking commit 4b1f8c614b02 (target/riscv: Convert RV64F insns to decodetree) 14/35 Checking commit 85126a61bc34 (target/riscv: Convert RV32D insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #51: new file mode 100644 total: 0 errors, 1 warnings, 353 lines checked Patch 14/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 15/35 Checking commit 57d72521333c (target/riscv: Convert RV64D insns to decodetree) 16/35 Checking commit 222b932a1cf7 (target/riscv: Convert RV priv insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #41: new file mode 100644 total: 0 errors, 1 warnings, 214 lines checked Patch 16/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 17/35 Checking commit baba3b6b997c (target/riscv: Convert quadrant 0 of RVXC insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #31: new file mode 100644 ERROR: externs should be avoided in .c files #246: FILE: target/riscv/translate.c:983: +bool decode_insn16(DisasContext *ctx, uint16_t insn); total: 1 errors, 1 warnings, 227 lines checked Patch 17/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 18/35 Checking commit f689ec99ed0e (target/riscv: Convert quadrant 1 of RVXC insns to decodetree) 19/35 Checking commit 663d608c7ebd (target/riscv: Convert quadrant 2 of RVXC insns to decodetree) 20/35 Checking commit 12f3dae1bfb8 (target/riscv: Remove gen_jalr()) 21/35 Checking commit 308b594c3adb (target/riscv: Remove manual decoding from gen_branch()) 22/35 Checking commit 2e18729d253e (target/riscv: Remove manual decoding from gen_load()) 23/35 Checking commit 132f8da29f26 (target/riscv: Remove manual decoding from gen_store()) 24/35 Checking commit f6ead4a8ee53 (target/riscv: Move gen_arith_imm() decoding into trans_* functions) 25/35 Checking commit 42aa2541a436 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists) 26/35 Checking commit 5a6623cc6dab (target/riscv: Remove shift and slt insn manual decoding) 27/35 Checking commit dfa6dc21c3ce (target/riscv: Remove manual decoding of RV32/64M insn) 28/35 Checking commit 0edf15c5d878 (target/riscv: Rename trans_arith to gen_arith) 29/35 Checking commit 976eb72944d8 (target/riscv: Remove gen_system()) 30/35 Checking commit 110406e2710f (target/riscv: Remove decode_RV32_64G()) 31/35 Checking commit 795b478c4c7f (target/riscv: Convert @cs_2 insns to share translation functions) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #42: new file mode 100644 ERROR: externs should be avoided in .c files #182: FILE: target/riscv/translate.c:497: +bool decode_insn16(DisasContext *ctx, uint16_t insn); total: 1 errors, 1 warnings, 164 lines checked Patch 31/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 32/35 Checking commit 3c31768d8171 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns) 33/35 Checking commit efb9740ab17e (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #28: new file mode 100644 total: 0 errors, 1 warnings, 287 lines checked Patch 33/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 34/35 Checking commit e66c95c9bca8 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64) 35/35 Checking commit 9e8165dd9406 (target/riscv: Remaining rvc insn reuse 32 bit translators) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190122092909.5341-1-kbastian@mail.uni-paderborn.de/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-devel@redhat.com
next prev parent reply other threads:[~2019-01-31 21:26 UTC|newest] Thread overview: 164+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-01-22 9:28 [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 01/35] target/riscv: Move CPURISCVState pointer to DisasContext Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 02/35] target/riscv: Activate decodetree and implemnt LUI & AUIPC Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 03/35] target/riscv: Convert RVXI branch insns to decodetree Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 23:03 ` [Qemu-devel] " Alistair Francis 2019-01-22 23:03 ` [Qemu-riscv] " Alistair Francis 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 04/35] target/riscv: Convert RV32I load/store " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 23:38 ` [Qemu-devel] " Alistair Francis 2019-01-22 23:38 ` [Qemu-riscv] " Alistair Francis 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 05/35] target/riscv: Convert RV64I " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 06/35] target/riscv: Convert RVXI arithmetic " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 07/35] target/riscv: Convert RVXI fence " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 08/35] target/riscv: Convert RVXI csr " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 09/35] target/riscv: Convert RVXM " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 10/35] target/riscv: Convert RV32A " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 23:43 ` [Qemu-devel] " Alistair Francis 2019-01-22 23:43 ` [Qemu-riscv] " Alistair Francis 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 11/35] target/riscv: Convert RV64A " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 12/35] target/riscv: Convert RV32F " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-23 0:00 ` [Qemu-devel] " Alistair Francis 2019-01-23 0:00 ` [Qemu-riscv] " Alistair Francis 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 13/35] target/riscv: Convert RV64F " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-23 0:08 ` [Qemu-devel] " Alistair Francis 2019-01-23 0:08 ` [Qemu-riscv] " Alistair Francis 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 14/35] target/riscv: Convert RV32D " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-23 0:08 ` [Qemu-devel] " Alistair Francis 2019-01-23 0:08 ` [Qemu-riscv] " Alistair Francis 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 15/35] target/riscv: Convert RV64D " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-23 0:10 ` [Qemu-devel] " Alistair Francis 2019-01-23 0:10 ` [Qemu-riscv] " Alistair Francis 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 16/35] target/riscv: Convert RV priv " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-23 1:00 ` [Qemu-devel] " Alistair Francis 2019-01-23 1:00 ` [Qemu-riscv] " Alistair Francis 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 17/35] target/riscv: Convert quadrant 0 of RVXC " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 18/35] target/riscv: Convert quadrant 1 " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 19/35] target/riscv: Convert quadrant 2 " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 21:32 ` [Qemu-devel] " Richard Henderson 2019-01-22 21:32 ` [Qemu-riscv] " Richard Henderson 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 20/35] target/riscv: Remove gen_jalr() Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 21/35] target/riscv: Remove manual decoding from gen_branch() Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 22/35] target/riscv: Remove manual decoding from gen_load() Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 23/35] target/riscv: Remove manual decoding from gen_store() Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 24/35] target/riscv: Move gen_arith_imm() decoding into trans_* functions Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 21:36 ` [Qemu-devel] " Richard Henderson 2019-01-22 21:36 ` [Qemu-riscv] " Richard Henderson 2019-01-22 9:28 ` [Qemu-devel] [PATCH v5 25/35] target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists Bastian Koppelmann 2019-01-22 9:28 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-devel] [PATCH v5 26/35] target/riscv: Remove shift and slt insn manual decoding Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-devel] [PATCH v5 27/35] target/riscv: Remove manual decoding of RV32/64M insn Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-devel] [PATCH v5 28/35] target/riscv: Rename trans_arith to gen_arith Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-devel] [PATCH v5 29/35] target/riscv: Remove gen_system() Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-devel] [PATCH v5 30/35] target/riscv: Remove decode_RV32_64G() Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-devel] [PATCH v5 31/35] target/riscv: Convert @cs_2 insns to share translation functions Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-devel] [PATCH v5 32/35] target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-devel] [PATCH v5 33/35] target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-devel] [PATCH v5 34/35] target/riscv: Splice remaining compressed insn pairs " Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-devel] [PATCH v5 35/35] target/riscv: Remaining rvc insn reuse 32 bit translators Bastian Koppelmann 2019-01-22 9:29 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-22 21:38 ` [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree Richard Henderson 2019-01-22 21:38 ` [Qemu-riscv] " Richard Henderson 2019-01-23 9:15 ` [Qemu-devel] " Bastian Koppelmann 2019-01-23 9:15 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-23 21:22 ` Alistair Francis 2019-01-23 21:22 ` [Qemu-riscv] " Alistair Francis 2019-01-25 23:54 ` Palmer Dabbelt 2019-01-25 23:54 ` [Qemu-riscv] " Palmer Dabbelt 2019-01-26 8:51 ` [Qemu-devel] " Bastian Koppelmann 2019-01-26 8:51 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-29 19:22 ` Palmer Dabbelt 2019-01-29 19:22 ` [Qemu-riscv] " Palmer Dabbelt 2019-01-29 21:13 ` Alistair Francis 2019-01-29 21:13 ` [Qemu-riscv] " Alistair Francis 2019-01-30 9:08 ` Bastian Koppelmann 2019-01-30 9:08 ` [Qemu-riscv] " Bastian Koppelmann 2019-01-30 18:47 ` Palmer Dabbelt 2019-01-30 18:47 ` [Qemu-riscv] " Palmer Dabbelt 2019-01-31 18:06 ` no-reply 2019-01-31 18:06 ` [Qemu-riscv] " no-reply 2019-01-31 18:48 ` no-reply 2019-01-31 18:48 ` [Qemu-riscv] " no-reply 2019-01-31 18:48 ` no-reply 2019-01-31 18:48 ` [Qemu-riscv] " no-reply 2019-01-31 18:51 ` no-reply 2019-01-31 18:51 ` [Qemu-riscv] " no-reply 2019-01-31 19:00 ` no-reply 2019-01-31 19:00 ` [Qemu-riscv] " no-reply 2019-01-31 19:08 ` no-reply 2019-01-31 19:08 ` [Qemu-riscv] " no-reply 2019-01-31 19:12 ` no-reply 2019-01-31 19:12 ` [Qemu-riscv] " no-reply 2019-01-31 21:00 ` no-reply 2019-01-31 21:00 ` [Qemu-riscv] " no-reply 2019-01-31 21:01 ` no-reply 2019-01-31 21:01 ` [Qemu-riscv] " no-reply 2019-01-31 21:04 ` no-reply 2019-01-31 21:04 ` [Qemu-riscv] " no-reply 2019-01-31 21:09 ` no-reply 2019-01-31 21:09 ` [Qemu-riscv] " no-reply 2019-01-31 21:10 ` no-reply 2019-01-31 21:10 ` [Qemu-riscv] " no-reply 2019-01-31 21:11 ` no-reply 2019-01-31 21:11 ` [Qemu-riscv] " no-reply 2019-01-31 21:12 ` no-reply 2019-01-31 21:12 ` [Qemu-riscv] " no-reply 2019-01-31 21:15 ` no-reply 2019-01-31 21:15 ` [Qemu-riscv] " no-reply 2019-01-31 21:15 ` no-reply 2019-01-31 21:15 ` [Qemu-riscv] " no-reply 2019-01-31 21:18 ` no-reply 2019-01-31 21:18 ` [Qemu-riscv] " no-reply 2019-01-31 21:19 ` no-reply 2019-01-31 21:19 ` [Qemu-riscv] " no-reply 2019-01-31 21:20 ` no-reply 2019-01-31 21:20 ` [Qemu-riscv] " no-reply 2019-01-31 21:22 ` no-reply 2019-01-31 21:22 ` [Qemu-riscv] " no-reply 2019-01-31 21:23 ` no-reply 2019-01-31 21:23 ` [Qemu-riscv] " no-reply 2019-01-31 21:25 ` no-reply [this message] 2019-01-31 21:25 ` no-reply 2019-01-31 21:26 ` no-reply 2019-01-31 21:26 ` [Qemu-riscv] " no-reply 2019-01-31 21:27 ` no-reply 2019-01-31 21:27 ` [Qemu-riscv] " no-reply 2019-01-31 21:37 ` no-reply 2019-01-31 21:37 ` [Qemu-riscv] " no-reply 2019-01-31 21:38 ` no-reply 2019-01-31 21:38 ` [Qemu-riscv] " no-reply 2019-01-31 21:41 ` no-reply 2019-01-31 21:41 ` [Qemu-riscv] " no-reply
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=154896993954.23946.13769321981568956062@ebba9967afc0 \ --to=no-reply@patchew.org \ --cc=fam@euphon.net \ --cc=kbastian@mail.uni-paderborn.de \ --cc=palmer@sifive.com \ --cc=peer.adelt@hni.uni-paderborn.de \ --cc=qemu-devel@nongnu.org \ --cc=qemu-riscv@nongnu.org \ --cc=richard.henderson@linaro.org \ --cc=sagark@eecs.berkeley.edu \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.