From: Yash Shah <yash.shah@sifive.com> To: paul.walmsley@sifive.com, palmer@dabbelt.com Cc: aou@eecs.berkeley.edu, allison@lohutok.net, alexios.zavras@intel.com, gregkh@linuxfoundation.org, tglx@linutronix.de, bp@suse.de, anup@brainfault.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, sachin.ghadi@sifive.com, Yash Shah <yash.shah@sifive.com> Subject: [PATCH v4 1/2] riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure Date: Fri, 17 Jan 2020 13:13:37 +0530 [thread overview] Message-ID: <1579247018-6720-2-git-send-email-yash.shah@sifive.com> (raw) In-Reply-To: <1579247018-6720-1-git-send-email-yash.shah@sifive.com> Implement cache_get_priv_group() that will make use of a generic ops structure to return a private attribute group for custom cache info. Using riscv_set_cacheinfo_ops() users can hook their own custom function to return the private attribute group for cacheinfo. In future we can add more ops to this generic ops structure for SOC specific cacheinfo. Signed-off-by: Yash Shah <yash.shah@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> --- arch/riscv/include/asm/cacheinfo.h | 15 +++++++++++++++ arch/riscv/kernel/cacheinfo.c | 17 +++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 arch/riscv/include/asm/cacheinfo.h diff --git a/arch/riscv/include/asm/cacheinfo.h b/arch/riscv/include/asm/cacheinfo.h new file mode 100644 index 0000000..5d9662e --- /dev/null +++ b/arch/riscv/include/asm/cacheinfo.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _ASM_RISCV_CACHEINFO_H +#define _ASM_RISCV_CACHEINFO_H + +#include <linux/cacheinfo.h> + +struct riscv_cacheinfo_ops { + const struct attribute_group * (*get_priv_group)(struct cacheinfo + *this_leaf); +}; + +void riscv_set_cacheinfo_ops(struct riscv_cacheinfo_ops *ops); + +#endif /* _ASM_RISCV_CACHEINFO_H */ diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c index 4c90c07..bd0f122 100644 --- a/arch/riscv/kernel/cacheinfo.c +++ b/arch/riscv/kernel/cacheinfo.c @@ -7,6 +7,23 @@ #include <linux/cpu.h> #include <linux/of.h> #include <linux/of_device.h> +#include <asm/cacheinfo.h> + +static struct riscv_cacheinfo_ops *rv_cache_ops; + +void riscv_set_cacheinfo_ops(struct riscv_cacheinfo_ops *ops) +{ + rv_cache_ops = ops; +} +EXPORT_SYMBOL_GPL(riscv_set_cacheinfo_ops); + +const struct attribute_group * +cache_get_priv_group(struct cacheinfo *this_leaf) +{ + if (rv_cache_ops && rv_cache_ops->get_priv_group) + return rv_cache_ops->get_priv_group(this_leaf); + return NULL; +} static void ci_leaf_init(struct cacheinfo *this_leaf, struct device_node *node, -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Yash Shah <yash.shah@sifive.com> To: paul.walmsley@sifive.com, palmer@dabbelt.com Cc: aou@eecs.berkeley.edu, sachin.ghadi@sifive.com, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, alexios.zavras@intel.com, Yash Shah <yash.shah@sifive.com>, anup@brainfault.org, tglx@linutronix.de, bp@suse.de, linux-riscv@lists.infradead.org, allison@lohutok.net Subject: [PATCH v4 1/2] riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure Date: Fri, 17 Jan 2020 13:13:37 +0530 [thread overview] Message-ID: <1579247018-6720-2-git-send-email-yash.shah@sifive.com> (raw) In-Reply-To: <1579247018-6720-1-git-send-email-yash.shah@sifive.com> Implement cache_get_priv_group() that will make use of a generic ops structure to return a private attribute group for custom cache info. Using riscv_set_cacheinfo_ops() users can hook their own custom function to return the private attribute group for cacheinfo. In future we can add more ops to this generic ops structure for SOC specific cacheinfo. Signed-off-by: Yash Shah <yash.shah@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> --- arch/riscv/include/asm/cacheinfo.h | 15 +++++++++++++++ arch/riscv/kernel/cacheinfo.c | 17 +++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 arch/riscv/include/asm/cacheinfo.h diff --git a/arch/riscv/include/asm/cacheinfo.h b/arch/riscv/include/asm/cacheinfo.h new file mode 100644 index 0000000..5d9662e --- /dev/null +++ b/arch/riscv/include/asm/cacheinfo.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _ASM_RISCV_CACHEINFO_H +#define _ASM_RISCV_CACHEINFO_H + +#include <linux/cacheinfo.h> + +struct riscv_cacheinfo_ops { + const struct attribute_group * (*get_priv_group)(struct cacheinfo + *this_leaf); +}; + +void riscv_set_cacheinfo_ops(struct riscv_cacheinfo_ops *ops); + +#endif /* _ASM_RISCV_CACHEINFO_H */ diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c index 4c90c07..bd0f122 100644 --- a/arch/riscv/kernel/cacheinfo.c +++ b/arch/riscv/kernel/cacheinfo.c @@ -7,6 +7,23 @@ #include <linux/cpu.h> #include <linux/of.h> #include <linux/of_device.h> +#include <asm/cacheinfo.h> + +static struct riscv_cacheinfo_ops *rv_cache_ops; + +void riscv_set_cacheinfo_ops(struct riscv_cacheinfo_ops *ops) +{ + rv_cache_ops = ops; +} +EXPORT_SYMBOL_GPL(riscv_set_cacheinfo_ops); + +const struct attribute_group * +cache_get_priv_group(struct cacheinfo *this_leaf) +{ + if (rv_cache_ops && rv_cache_ops->get_priv_group) + return rv_cache_ops->get_priv_group(this_leaf); + return NULL; +} static void ci_leaf_init(struct cacheinfo *this_leaf, struct device_node *node, -- 2.7.4
next prev parent reply other threads:[~2020-01-17 7:44 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-01-17 7:43 [PATCH v4 0/2] cacheinfo support to read no. of L2 cache ways enabled Yash Shah 2020-01-17 7:43 ` Yash Shah 2020-01-17 7:43 ` Yash Shah [this message] 2020-01-17 7:43 ` [PATCH v4 1/2] riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure Yash Shah 2020-01-17 7:43 ` [PATCH v4 2/2] riscv: Add support to determine no. of L2 cache way enabled Yash Shah 2020-01-17 7:43 ` Yash Shah 2020-02-07 18:24 ` Palmer Dabbelt 2020-02-07 18:24 ` Palmer Dabbelt 2020-02-18 6:25 ` Yash Shah 2020-02-18 6:25 ` Yash Shah
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