From: "Philippe Mathieu-Daudé" <f4bug@amsat.org> To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>, kvm@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>, Huacai Chen <chenhc@lemote.com>, Aurelien Jarno <aurelien@aurel32.net> Subject: Re: [PATCH 7/9] target/mips: Extract msa_translate_init() from mips_tcg_init() Date: Fri, 4 Dec 2020 18:23:31 +0100 [thread overview] Message-ID: <1d04e931-015b-116f-f189-3d24e015b087@amsat.org> (raw) In-Reply-To: <9a103671-d4e7-bcff-c600-931655efbd2b@linaro.org> On 12/4/20 5:30 PM, Richard Henderson wrote: > On 12/2/20 12:44 PM, Philippe Mathieu-Daudé wrote: >> Extract the logic initialization of the MSA registers from >> the generic initialization. >> >> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> >> --- >> target/mips/translate.c | 35 ++++++++++++++++++++--------------- >> 1 file changed, 20 insertions(+), 15 deletions(-) > > Why? msa_wr_d[] registers are only used by MSA, so in the next series that allows me to move the 'static msa_wr_d[]' in msa_translate.c, without having to declare them global with extern. > >> - fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2]); >> + fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]); > > Maybe fold this back to the previous patch? Certainly ;) > > > r~ >
WARNING: multiple messages have this Message-ID (diff)
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org> To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org Cc: Paolo Bonzini <pbonzini@redhat.com>, Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>, Aurelien Jarno <aurelien@aurel32.net>, kvm@vger.kernel.org, Huacai Chen <chenhc@lemote.com> Subject: Re: [PATCH 7/9] target/mips: Extract msa_translate_init() from mips_tcg_init() Date: Fri, 4 Dec 2020 18:23:31 +0100 [thread overview] Message-ID: <1d04e931-015b-116f-f189-3d24e015b087@amsat.org> (raw) In-Reply-To: <9a103671-d4e7-bcff-c600-931655efbd2b@linaro.org> On 12/4/20 5:30 PM, Richard Henderson wrote: > On 12/2/20 12:44 PM, Philippe Mathieu-Daudé wrote: >> Extract the logic initialization of the MSA registers from >> the generic initialization. >> >> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> >> --- >> target/mips/translate.c | 35 ++++++++++++++++++++--------------- >> 1 file changed, 20 insertions(+), 15 deletions(-) > > Why? msa_wr_d[] registers are only used by MSA, so in the next series that allows me to move the 'static msa_wr_d[]' in msa_translate.c, without having to declare them global with extern. > >> - fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2]); >> + fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]); > > Maybe fold this back to the previous patch? Certainly ;) > > > r~ >
next prev parent reply other threads:[~2020-12-04 17:24 UTC|newest] Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-12-02 18:44 [PATCH 0/9] target/mips: Simplify MSA TCG logic Philippe Mathieu-Daudé 2020-12-02 18:44 ` Philippe Mathieu-Daudé 2020-12-02 18:44 ` [PATCH 1/9] target/mips: Introduce ase_msa_available() helper Philippe Mathieu-Daudé 2020-12-02 18:44 ` Philippe Mathieu-Daudé 2020-12-03 17:08 ` Richard Henderson 2020-12-03 17:08 ` Richard Henderson 2020-12-02 18:44 ` [PATCH 2/9] target/mips: Simplify msa_reset() Philippe Mathieu-Daudé 2020-12-02 18:44 ` Philippe Mathieu-Daudé 2020-12-03 17:10 ` Richard Henderson 2020-12-03 17:10 ` Richard Henderson 2020-12-02 18:44 ` [PATCH 3/9] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA Philippe Mathieu-Daudé 2020-12-02 18:44 ` Philippe Mathieu-Daudé 2020-12-03 17:10 ` Richard Henderson 2020-12-03 17:10 ` Richard Henderson 2020-12-02 18:44 ` [PATCH 4/9] target/mips: Simplify MSA TCG logic Philippe Mathieu-Daudé 2020-12-02 18:44 ` Philippe Mathieu-Daudé 2020-12-03 17:14 ` Richard Henderson 2020-12-03 17:14 ` Richard Henderson 2020-12-02 18:44 ` [PATCH 5/9] target/mips: Remove now unused ASE_MSA definition Philippe Mathieu-Daudé 2020-12-02 18:44 ` Philippe Mathieu-Daudé 2020-12-03 17:15 ` Richard Henderson 2020-12-03 17:15 ` Richard Henderson 2020-12-02 18:44 ` [PATCH 6/9] target/mips: Alias MSA vector registers on FPU scalar registers Philippe Mathieu-Daudé 2020-12-02 18:44 ` Philippe Mathieu-Daudé 2020-12-04 16:28 ` Richard Henderson 2020-12-04 16:28 ` Richard Henderson 2020-12-04 22:40 ` Philippe Mathieu-Daudé 2020-12-04 22:40 ` Philippe Mathieu-Daudé 2020-12-05 12:44 ` Richard Henderson 2020-12-05 12:44 ` Richard Henderson 2020-12-02 18:44 ` [PATCH 7/9] target/mips: Extract msa_translate_init() from mips_tcg_init() Philippe Mathieu-Daudé 2020-12-02 18:44 ` Philippe Mathieu-Daudé 2020-12-04 16:30 ` Richard Henderson 2020-12-04 16:30 ` Richard Henderson 2020-12-04 17:23 ` Philippe Mathieu-Daudé [this message] 2020-12-04 17:23 ` Philippe Mathieu-Daudé 2020-12-04 18:15 ` Richard Henderson 2020-12-04 18:15 ` Richard Henderson 2020-12-02 18:44 ` [PATCH 8/9] target/mips: Remove CPUMIPSState* argument from gen_msa*() methods Philippe Mathieu-Daudé 2020-12-02 18:44 ` Philippe Mathieu-Daudé 2020-12-04 16:31 ` Richard Henderson 2020-12-04 16:31 ` Richard Henderson 2020-12-02 18:44 ` [PATCH 9/9] target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ() Philippe Mathieu-Daudé 2020-12-02 18:44 ` Philippe Mathieu-Daudé 2020-12-04 17:04 ` Richard Henderson 2020-12-04 17:04 ` Richard Henderson 2020-12-04 22:53 ` Philippe Mathieu-Daudé 2020-12-04 22:53 ` Philippe Mathieu-Daudé 2020-12-05 12:46 ` Richard Henderson 2020-12-05 12:46 ` Richard Henderson 2020-12-03 3:36 ` [PATCH 0/9] target/mips: Simplify MSA TCG logic Jiaxun Yang 2020-12-03 3:36 ` Jiaxun Yang 2020-12-03 3:38 ` Jiaxun Yang 2020-12-03 3:38 ` Jiaxun Yang
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