From: Christoph Hellwig <hch@lst.de> To: Catalin Marinas <catalin.marinas@arm.com> Cc: Christoph Hellwig <hch@lst.de>, Will Deacon <will.deacon@arm.com>, Robin Murphy <robin.murphy@arm.com>, x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>, Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>, linux-kernel@vger.kernel.org, Muli Ben-Yehuda <mulix@mulix.org>, iommu@lists.linux-foundation.org, David Woodhouse <dwmw2@infradead.org> Subject: Re: [PATCH 12/14] dma-direct: handle the memory encryption bit in common code Date: Mon, 19 Mar 2018 20:49:30 +0100 [thread overview] Message-ID: <20180319194930.GA3255@lst.de> (raw) In-Reply-To: <20180319180141.w5o6lhknhd6q7ktq@armageddon.cambridge.arm.com> On Mon, Mar 19, 2018 at 06:01:41PM +0000, Catalin Marinas wrote: > I don't particularly like maintaining an arm64-specific dma-direct.h > either but arm64 seems to be the only architecture that needs to > potentially force a bounce when cache_line_size() > ARCH_DMA_MINALIGN > and the device is non-coherent. mips is another likely candidate, see all the recent drama about dma_get_alignmet(). And I'm also having major discussion about even exposing the cache line size architecturally for RISC-V, so changes are high it'll have to deal with this mess sooner or later as they probably can't agree on a specific cache line size. > Note that lib/swiotlb.c doesn't even > deal with non-coherent DMA (e.g. map_sg doesn't have arch callbacks for > cache maintenance), so not disrupting lib/swiotlb.c seems to be the > least intrusive option. No yet. I have patches to consolidate the various swiotlb ops that deal with cache flushing or barriers. I was hoping to get them in for this merge window, but it probably is too late now given that I have a few other fires to fight. But they are going to be out early for the next merge window. > > Nevermind that the commit should at least be three different patches: > > > > (1) revert the broken original commit > > (2) increase the dma min alignment > > Reverting the original commit could, on its own, break an SoC which > expects ARCH_DMA_MINALIGN == 128. So these two should be a single commit > (my patch only reverts the L1_CACHE_BYTES change rather than > ARCH_DMA_MINALIGN, the latter being correct as 128). It would revert to the state before this commit. > As I said above, adding a check in swiotlb.c for > !is_device_dma_coherent(dev) && (ARCH_DMA_MINALIGN < cache_line_size()) > feels too architecture specific. And what exactly is architecture specific about that? It is a totally generic concept, which at this point also seems entirely theoretical based on the previous mail in this thread.
WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org> To: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org> Cc: Tom Lendacky <thomas.lendacky-5C7GfCeVMHo@public.gmane.org>, Konrad Rzeszutek Wilk <konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org>, David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>, x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Muli Ben-Yehuda <mulix-BzGcCpaT2IbYtjvyW6yDsg@public.gmane.org>, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org> Subject: Re: [PATCH 12/14] dma-direct: handle the memory encryption bit in common code Date: Mon, 19 Mar 2018 20:49:30 +0100 [thread overview] Message-ID: <20180319194930.GA3255@lst.de> (raw) In-Reply-To: <20180319180141.w5o6lhknhd6q7ktq-+1aNUgJU5qkijLcmloz0ER/iLCjYCKR+VpNB7YpNyf8@public.gmane.org> On Mon, Mar 19, 2018 at 06:01:41PM +0000, Catalin Marinas wrote: > I don't particularly like maintaining an arm64-specific dma-direct.h > either but arm64 seems to be the only architecture that needs to > potentially force a bounce when cache_line_size() > ARCH_DMA_MINALIGN > and the device is non-coherent. mips is another likely candidate, see all the recent drama about dma_get_alignmet(). And I'm also having major discussion about even exposing the cache line size architecturally for RISC-V, so changes are high it'll have to deal with this mess sooner or later as they probably can't agree on a specific cache line size. > Note that lib/swiotlb.c doesn't even > deal with non-coherent DMA (e.g. map_sg doesn't have arch callbacks for > cache maintenance), so not disrupting lib/swiotlb.c seems to be the > least intrusive option. No yet. I have patches to consolidate the various swiotlb ops that deal with cache flushing or barriers. I was hoping to get them in for this merge window, but it probably is too late now given that I have a few other fires to fight. But they are going to be out early for the next merge window. > > Nevermind that the commit should at least be three different patches: > > > > (1) revert the broken original commit > > (2) increase the dma min alignment > > Reverting the original commit could, on its own, break an SoC which > expects ARCH_DMA_MINALIGN == 128. So these two should be a single commit > (my patch only reverts the L1_CACHE_BYTES change rather than > ARCH_DMA_MINALIGN, the latter being correct as 128). It would revert to the state before this commit. > As I said above, adding a check in swiotlb.c for > !is_device_dma_coherent(dev) && (ARCH_DMA_MINALIGN < cache_line_size()) > feels too architecture specific. And what exactly is architecture specific about that? It is a totally generic concept, which at this point also seems entirely theoretical based on the previous mail in this thread.
next prev parent reply other threads:[~2018-03-19 19:49 UTC|newest] Thread overview: 91+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-03-19 10:38 use generic dma-direct and swiotlb code for x86 V3 Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-19 10:38 ` [PATCH 01/14] x86: remove X86_PPRO_FENCE Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-20 11:04 ` [tip:x86/pti] x86/cpu: Remove the CONFIG_X86_PPRO_FENCE=y quirk tip-bot for Christoph Hellwig 2018-03-20 12:51 ` Peter Zijlstra 2018-03-19 10:38 ` [PATCH 02/14] x86: remove dma_alloc_coherent_mask Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-23 19:48 ` [tip:x86/dma] x86/dma: Remove dma_alloc_coherent_mask() tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 03/14] x86: use dma-direct Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-23 19:49 ` [tip:x86/dma] x86/dma: Use DMA-direct (CONFIG_DMA_DIRECT_OPS=y) tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 04/14] x86: use generic swiotlb_ops Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-23 19:49 ` [tip:x86/dma] x86/dma: Use " tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 05/14] x86/amd_gart: look at coherent_dma_mask instead of GFP_DMA Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-23 19:50 ` [tip:x86/dma] x86/dma/amd_gart: Look at dev->coherent_dma_mask " tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 06/14] x86/amd_gart: use dma_direct_{alloc,free} Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-23 19:50 ` [tip:x86/dma] x86/dma/amd_gart: Use dma_direct_{alloc,free}() tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 07/14] iommu/amd_iommu: use dma_direct_{alloc,free} Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-23 19:51 ` [tip:x86/dma] iommu/amd_iommu: Use CONFIG_DMA_DIRECT_OPS=y and dma_direct_{alloc,free}() tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 08/14] iommu/intel-iommu: cleanup intel_{alloc,free}_coherent Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-23 19:51 ` [tip:x86/dma] iommu/intel-iommu: Enable CONFIG_DMA_DIRECT_OPS=y and clean up intel_{alloc,free}_coherent() tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 09/14] x86: remove dma_alloc_coherent_gfp_flags Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-23 19:52 ` [tip:x86/dma] x86/dma: Remove dma_alloc_coherent_gfp_flags() tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 10/14] set_memory.h: provide set_memory_{en,de}crypted stubs Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-19 14:21 ` Tom Lendacky 2018-03-19 14:21 ` Tom Lendacky 2018-03-23 19:52 ` [tip:x86/dma] set_memory.h: Provide set_memory_{en,de}crypted() stubs tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 11/14] swiotlb: remove swiotlb_set_mem_attributes Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-19 14:41 ` Tom Lendacky 2018-03-19 14:41 ` Tom Lendacky 2018-03-23 19:52 ` [tip:x86/dma] dma/swiotlb: Remove swiotlb_set_mem_attributes() tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 12/14] dma-direct: handle the memory encryption bit in common code Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-19 14:50 ` Tom Lendacky 2018-03-19 14:50 ` Tom Lendacky 2018-03-19 15:19 ` Robin Murphy 2018-03-19 15:19 ` Robin Murphy 2018-03-19 15:24 ` Christoph Hellwig 2018-03-19 15:24 ` Christoph Hellwig 2018-03-19 15:37 ` Robin Murphy 2018-03-19 15:37 ` Robin Murphy 2018-03-19 15:48 ` Will Deacon 2018-03-19 15:48 ` Will Deacon 2018-03-19 16:03 ` Christoph Hellwig 2018-03-19 16:03 ` Christoph Hellwig 2018-03-19 16:55 ` Will Deacon 2018-03-19 16:55 ` Will Deacon 2018-03-19 18:01 ` Catalin Marinas 2018-03-19 18:01 ` Catalin Marinas 2018-03-19 19:49 ` Christoph Hellwig [this message] 2018-03-19 19:49 ` Christoph Hellwig 2018-03-20 16:23 ` Catalin Marinas 2018-03-20 16:23 ` Catalin Marinas 2018-03-23 19:53 ` [tip:x86/dma] dma/direct: Handle " tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 13/14] dma-direct: handle force decryption for dma coherent buffers " Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-19 14:51 ` Tom Lendacky 2018-03-19 14:51 ` Tom Lendacky 2018-03-23 19:53 ` [tip:x86/dma] dma/direct: Handle force decryption for DMA " tip-bot for Christoph Hellwig 2018-03-19 10:38 ` [PATCH 14/14] swiotlb: remove swiotlb_{alloc,free}_coherent Christoph Hellwig 2018-03-19 10:38 ` Christoph Hellwig 2018-03-23 19:54 ` [tip:x86/dma] dma/swiotlb: Remove swiotlb_{alloc,free}_coherent() tip-bot for Christoph Hellwig 2018-03-19 14:00 ` use generic dma-direct and swiotlb code for x86 V3 Tom Lendacky 2018-03-19 14:00 ` Tom Lendacky 2018-03-19 14:56 ` Thomas Gleixner 2018-03-19 14:56 ` Thomas Gleixner 2018-03-19 15:27 ` Konrad Rzeszutek Wilk 2018-03-19 15:27 ` Konrad Rzeszutek Wilk 2018-03-19 15:28 ` Christoph Hellwig 2018-03-20 8:37 ` Ingo Molnar 2018-03-20 8:37 ` Ingo Molnar 2018-03-20 8:44 ` Christoph Hellwig 2018-03-20 8:44 ` Christoph Hellwig 2018-03-20 9:03 ` Ingo Molnar 2018-03-20 9:03 ` Ingo Molnar [not found] ` <20180320090351.2qnwcsauhodrqxdj-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2018-03-20 11:25 ` Konrad Rzeszutek Wilk 2018-03-20 15:16 ` Christoph Hellwig 2018-03-20 15:16 ` Christoph Hellwig 2018-03-21 14:32 ` Konrad Rzeszutek Wilk 2018-03-21 14:32 ` Konrad Rzeszutek Wilk -- strict thread matches above, loose matches on Subject: below -- 2018-03-14 17:51 use generic dma-direct and swiotlb code for x86 V2 Christoph Hellwig 2018-03-14 17:52 ` [PATCH 12/14] dma-direct: handle the memory encryption bit in common code Christoph Hellwig 2018-03-14 17:52 ` Christoph Hellwig
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