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From: Boris Brezillon <boris.brezillon@bootlin.com>
To: Piotr Bugalski <bugalski.piotr@gmail.com>
Cc: Mark Brown <broonie@kernel.org>,
	linux-spi@vger.kernel.org, David Woodhouse <dwmw2@infradead.org>,
	Brian Norris <computersforpeace@gmail.com>,
	Marek Vasut <marek.vasut@gmail.com>,
	Richard Weinberger <richard@nod.at>,
	linux-mtd@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Cyrille Pitchen <cyrille.pitchen@microchip.com>,
	Tudor Ambarus <tudor.ambarus@microchip.com>
Subject: Re: [RFC PATCH 0/2] New QuadSPI driver for Atmel SAMA5D2
Date: Wed, 20 Jun 2018 16:54:38 +0200	[thread overview]
Message-ID: <20180620165438.39608554@bbrezillon> (raw)
In-Reply-To: <20180618162124.21749-1-bugalski.piotr@gmail.com>

Hi Piotr,

On Mon, 18 Jun 2018 18:21:22 +0200
Piotr Bugalski <bugalski.piotr@gmail.com> wrote:

> Hello,
> 
> Atmel SAMA5D2 is equipped with two QSPI interfaces. These interfaces can
> work as in SPI-compatible mode or use two / four lines to improve
> communication speed. At the moment there is QSPI driver strongly tied to
> NOR-flash memory and MTD subsystem.
> Intention of this change is to provide new driver which will not be tied
> to MTD and allows using QSPI with NAND-flash memory or other peripherals
> New spi-mem API provides abstraction layer which can disconnect QSPI
> from MTD. This driver doesn't support regular SPI interface, it should
> be used with spi-mem interface only.

Glad to see that people are starting to convert their SPI NOR
controller drivers to the SPI mem approach.

> Unfortunately SAMA5D2 hardware by default supports only NOR-flash
> memory. It allows 24- and 32-bit addressing while NAND-flash requires
> 16-bit long. To workaround hardware limitation driver is a bit more
> complicated.
> 
> Request to spi-mem contains three fiels: opcode (command), address,
> dummy bytes. SAMA5D2 QSPI hardware supports opcode, address, dummy and
> option byte where address field can only be 24- or 32- bytes long.
> Handling 8-bits long addresses is done using option field. For 16-bits
> address behaviour depends of number of requested dummy bits. If there
> are 8 or more dummy cycles, address is shifted and sent with first dummy
> byte. Otherwise opcode is disabled and first byte of address contains
> command opcode (works only if opcode and address use the same buswidth).
> The limitation is when 16-bit address is used without enough dummy
> cycles and opcode is using different buswidth than address. Other modes
> are supported with described workaround.
> 
> It looks like hardware has some limitation in performance. The same issue
> exists in current QSPI driver (MTD/nor-flash) and soft-pack (bare-metal
> library from Atmel). Without using DMA read speed is much worse than
> maximum bandwidth (efficiency 30-40%). Any help with performance
> improvement is highly welcome, especially for NAND-flash memories which
> offers higher capacity than NOR-flash used with previous driver.
> 
> Best Regards,
> Piotr
> 
> Piotr Bugalski (2):
>   spi: Add QuadSPI driver for Atmel SAMA5D2
>   dt-bindings: spi: QuadSPI driver for Atmel SAMA5D2 documentation
> 
>  .../devicetree/bindings/spi/spi_atmel-qspi.txt     |  41 ++
>  drivers/spi/Kconfig                                |   9 +
>  drivers/spi/Makefile                               |   1 +
>  drivers/spi/spi-atmel-qspi.c                       | 480 +++++++++++++++++++++

I'd like a solution where we remove the old driver. I definitely don't
want to have both in parallel. Did you test the new driver with a SPI
NOR to check if it still works correctly? If you did, then I'd suggest
that you add a patch updating defconfigs where the SPI_ATMEL_QUADSPI is
selected and another patch removing the old driver.

>  4 files changed, 531 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/spi_atmel-qspi.txt

This should be a simple mv from
Documentation/devicetree/bindings/mtd/atmel-quadspi.txt to
Documentation/devicetree/bindings/spi/spi-atmel-qspi.txt

>  create mode 100644 drivers/spi/spi-atmel-qspi.c
> 

Thanks,

Boris

WARNING: multiple messages have this Message-ID (diff)
From: boris.brezillon@bootlin.com (Boris Brezillon)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 0/2] New QuadSPI driver for Atmel SAMA5D2
Date: Wed, 20 Jun 2018 16:54:38 +0200	[thread overview]
Message-ID: <20180620165438.39608554@bbrezillon> (raw)
In-Reply-To: <20180618162124.21749-1-bugalski.piotr@gmail.com>

Hi Piotr,

On Mon, 18 Jun 2018 18:21:22 +0200
Piotr Bugalski <bugalski.piotr@gmail.com> wrote:

> Hello,
> 
> Atmel SAMA5D2 is equipped with two QSPI interfaces. These interfaces can
> work as in SPI-compatible mode or use two / four lines to improve
> communication speed. At the moment there is QSPI driver strongly tied to
> NOR-flash memory and MTD subsystem.
> Intention of this change is to provide new driver which will not be tied
> to MTD and allows using QSPI with NAND-flash memory or other peripherals
> New spi-mem API provides abstraction layer which can disconnect QSPI
> from MTD. This driver doesn't support regular SPI interface, it should
> be used with spi-mem interface only.

Glad to see that people are starting to convert their SPI NOR
controller drivers to the SPI mem approach.

> Unfortunately SAMA5D2 hardware by default supports only NOR-flash
> memory. It allows 24- and 32-bit addressing while NAND-flash requires
> 16-bit long. To workaround hardware limitation driver is a bit more
> complicated.
> 
> Request to spi-mem contains three fiels: opcode (command), address,
> dummy bytes. SAMA5D2 QSPI hardware supports opcode, address, dummy and
> option byte where address field can only be 24- or 32- bytes long.
> Handling 8-bits long addresses is done using option field. For 16-bits
> address behaviour depends of number of requested dummy bits. If there
> are 8 or more dummy cycles, address is shifted and sent with first dummy
> byte. Otherwise opcode is disabled and first byte of address contains
> command opcode (works only if opcode and address use the same buswidth).
> The limitation is when 16-bit address is used without enough dummy
> cycles and opcode is using different buswidth than address. Other modes
> are supported with described workaround.
> 
> It looks like hardware has some limitation in performance. The same issue
> exists in current QSPI driver (MTD/nor-flash) and soft-pack (bare-metal
> library from Atmel). Without using DMA read speed is much worse than
> maximum bandwidth (efficiency 30-40%). Any help with performance
> improvement is highly welcome, especially for NAND-flash memories which
> offers higher capacity than NOR-flash used with previous driver.
> 
> Best Regards,
> Piotr
> 
> Piotr Bugalski (2):
>   spi: Add QuadSPI driver for Atmel SAMA5D2
>   dt-bindings: spi: QuadSPI driver for Atmel SAMA5D2 documentation
> 
>  .../devicetree/bindings/spi/spi_atmel-qspi.txt     |  41 ++
>  drivers/spi/Kconfig                                |   9 +
>  drivers/spi/Makefile                               |   1 +
>  drivers/spi/spi-atmel-qspi.c                       | 480 +++++++++++++++++++++

I'd like a solution where we remove the old driver. I definitely don't
want to have both in parallel. Did you test the new driver with a SPI
NOR to check if it still works correctly? If you did, then I'd suggest
that you add a patch updating defconfigs where the SPI_ATMEL_QUADSPI is
selected and another patch removing the old driver.

>  4 files changed, 531 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/spi_atmel-qspi.txt

This should be a simple mv from
Documentation/devicetree/bindings/mtd/atmel-quadspi.txt to
Documentation/devicetree/bindings/spi/spi-atmel-qspi.txt

>  create mode 100644 drivers/spi/spi-atmel-qspi.c
> 

Thanks,

Boris

  parent reply	other threads:[~2018-06-20 14:54 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-18 16:21 [RFC PATCH 0/2] New QuadSPI driver for Atmel SAMA5D2 Piotr Bugalski
2018-06-18 16:21 ` Piotr Bugalski
2018-06-18 16:21 ` [RFC PATCH 1/2] spi: Add " Piotr Bugalski
2018-06-18 16:21   ` Piotr Bugalski
2018-06-19 15:15   ` Mark Brown
2018-06-19 15:15     ` Mark Brown
2018-06-20 14:31     ` Piotr Bugalski
2018-06-20 14:31       ` Piotr Bugalski
2018-06-21 21:33   ` Boris Brezillon
2018-06-21 21:33     ` Boris Brezillon
2018-06-22  5:57     ` Piotr Bugalski
2018-06-22  5:57       ` Piotr Bugalski
2018-06-22  7:39       ` Boris Brezillon
2018-06-22  7:39         ` Boris Brezillon
2018-06-26 14:44         ` Tudor Ambarus
2018-06-26 14:44           ` Tudor Ambarus
2018-06-26 14:44           ` Tudor Ambarus
2018-06-27  7:52           ` Piotr Bugalski
2018-06-27  7:52             ` Piotr Bugalski
2018-06-28  8:37             ` Tudor Ambarus
2018-06-28  8:37               ` Tudor Ambarus
2018-06-28  8:37               ` Tudor Ambarus
2018-06-28 12:02               ` Piotr Bugalski
2018-06-28 12:02                 ` Piotr Bugalski
2018-06-18 16:21 ` [RFC PATCH 2/2] dt-bindings: spi: QuadSPI driver for Atmel SAMA5D2 documentation Piotr Bugalski
2018-06-18 16:21   ` Piotr Bugalski
2018-06-20 14:47   ` Boris Brezillon
2018-06-20 14:47     ` Boris Brezillon
2018-06-21 10:56     ` Piotr Bugalski
2018-06-21 10:56       ` Piotr Bugalski
2018-06-20 14:54 ` Boris Brezillon [this message]
2018-06-20 14:54   ` [RFC PATCH 0/2] New QuadSPI driver for Atmel SAMA5D2 Boris Brezillon
2018-06-21 10:52   ` Piotr Bugalski
2018-06-21 10:52     ` Piotr Bugalski

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