From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Tudor.Ambarus@microchip.com, john.garry@huawei.com,
vigneshr@ti.com, richard@nod.at, miquel.raynal@bootlin.com
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] mtd: spi-nor: Fix the writing of the Status Register on micron flashes
Date: Thu, 9 Jan 2020 20:14:23 +0100 [thread overview]
Message-ID: <20200109191423.10589-1-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20191203144948.15137-1-tudor.ambarus@microchip.com>
On Tue, 2019-12-03 at 14:50:01 UTC, wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> Micron flashes do not support 16 bit writes on the Status Register.
> According to micron datasheets, when using the Write Status Register
> (01h) command, the chip select should be driven LOW and held LOW until
> the eighth bit of the last data byte has been latched in, after which
> it must be driven HIGH. If CS is not driven HIGH, the command is not
> executed, flag status register error bits are not set, and the write enable
> latch remains set to 1. This fixes the lock operations on micron flashes.
>
> Reported-by: John Garry <john.garry@huawei.com>
> Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()")
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> Tested-by: John Garry <john.garry@huawei.com>
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/fixes, thanks.
Miquel
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Tudor.Ambarus@microchip.com, john.garry@huawei.com,
vigneshr@ti.com, richard@nod.at, miquel.raynal@bootlin.com
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] mtd: spi-nor: Fix the writing of the Status Register on micron flashes
Date: Thu, 9 Jan 2020 20:14:23 +0100 [thread overview]
Message-ID: <20200109191423.10589-1-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20191203144948.15137-1-tudor.ambarus@microchip.com>
On Tue, 2019-12-03 at 14:50:01 UTC, wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> Micron flashes do not support 16 bit writes on the Status Register.
> According to micron datasheets, when using the Write Status Register
> (01h) command, the chip select should be driven LOW and held LOW until
> the eighth bit of the last data byte has been latched in, after which
> it must be driven HIGH. If CS is not driven HIGH, the command is not
> executed, flag status register error bits are not set, and the write enable
> latch remains set to 1. This fixes the lock operations on micron flashes.
>
> Reported-by: John Garry <john.garry@huawei.com>
> Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()")
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> Tested-by: John Garry <john.garry@huawei.com>
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/fixes, thanks.
Miquel
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next prev parent reply other threads:[~2020-01-09 19:52 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-02 17:28 flash_lock issue for n25q 128mb spi nor part John Garry
2019-12-03 9:45 ` Tudor.Ambarus
2019-12-03 10:31 ` John Garry
2019-12-03 11:07 ` Tudor.Ambarus
2019-12-03 11:44 ` John Garry
2019-12-03 12:05 ` Tudor.Ambarus
2019-12-03 12:27 ` Tudor.Ambarus
2019-12-03 12:35 ` John Garry
2019-12-03 13:57 ` John Garry
2019-12-03 14:44 ` Tudor.Ambarus
2019-12-03 15:29 ` John Garry
2019-12-04 11:10 ` John Garry
2019-12-16 18:09 ` Tudor.Ambarus
2019-12-17 8:57 ` Vignesh Raghavendra
2019-12-17 10:09 ` John Garry
2020-01-09 10:36 ` John Garry
2020-01-10 11:51 ` Tudor.Ambarus
2020-01-10 11:56 ` John Garry
2020-01-15 9:28 ` John Garry
2020-03-09 10:15 ` [RESEND PATCH 1/2] mtd: spi-nor: Clear WEL bit when erase or program errors occur Tudor.Ambarus
2020-03-09 10:15 ` [RESEND PATCH 2/2] mtd: spi-nor: Fix description of the sr_ready() return value Tudor.Ambarus
2020-03-09 15:04 ` [RESEND PATCH 1/2] mtd: spi-nor: Clear WEL bit when erase or program errors occur John Garry
2020-03-23 17:58 ` Tudor.Ambarus
2019-12-03 14:16 ` [PATCH] mtd: spi-nor: Fix the write Status Register on micron flashes Tudor.Ambarus
2019-12-03 14:16 ` Tudor.Ambarus
2019-12-03 14:50 ` [PATCH v2] mtd: spi-nor: Fix the writing of the " Tudor.Ambarus
2019-12-03 14:50 ` Tudor.Ambarus
2019-12-04 10:18 ` John Garry
2019-12-04 10:18 ` John Garry
2020-01-09 19:14 ` Miquel Raynal [this message]
2020-01-09 19:14 ` Miquel Raynal
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