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From: Rob Herring <robh@kernel.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: "David S . Miller" <davem@davemloft.net>,
	Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Robert Hancock <hancock@sedsystems.ca>,
	netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org
Subject: Re: [PATCH 14/14] net: axienet: Update devicetree binding documentation
Date: Tue, 21 Jan 2020 15:51:09 -0600	[thread overview]
Message-ID: <20200121215109.GA26808@bogus> (raw)
In-Reply-To: <20200110115415.75683-15-andre.przywara@arm.com>

On Fri, Jan 10, 2020 at 11:54:15AM +0000, Andre Przywara wrote:
> This adds documentation about the newly introduced, optional
> "xlnx,addrwidth" property to the binding documentation.
> 
> While at it, clarify the wording on some properties, replace obsolete
> .txt file references with their new .yaml counterparts, and add a more
> modern example, using the axistream-connected property.
> 
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../bindings/net/xilinx_axienet.txt           | 57 ++++++++++++++++---
>  1 file changed, 50 insertions(+), 7 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> index 7360617cdedb..78c278c5200f 100644
> --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> @@ -12,7 +12,8 @@ sent and received through means of an AXI DMA controller. This driver
>  includes the DMA driver code, so this driver is incompatible with AXI DMA
>  driver.
>  
> -For more details about mdio please refer phy.txt file in the same directory.
> +For more details about mdio please refer to the ethernet-phy.yaml file in
> +the same directory.
>  
>  Required properties:
>  - compatible	: Must be one of "xlnx,axi-ethernet-1.00.a",
> @@ -27,14 +28,14 @@ Required properties:
>  		  instead, and only the Ethernet core interrupt is optionally
>  		  specified here.
>  - phy-handle	: Should point to the external phy device.
> -		  See ethernet.txt file in the same directory.
> -- xlnx,rxmem	: Set to allocated memory buffer for Rx/Tx in the hardware
> +		  See the ethernet-controller.yaml file in the same directory.
> +- xlnx,rxmem	: Size of the RXMEM buffer in the hardware, in bytes.
>  
>  Optional properties:
> -- phy-mode	: See ethernet.txt
> +- phy-mode	: See ethernet-controller.yaml.
>  - xlnx,phy-type	: Deprecated, do not use, but still accepted in preference
>  		  to phy-mode.
> -- xlnx,txcsum	: 0 or empty for disabling TX checksum offload,
> +- xlnx,txcsum	: 0 for disabling TX checksum offload (default if omitted),
>  		  1 to enable partial TX checksum offload,
>  		  2 to enable full TX checksum offload
>  - xlnx,rxcsum	: Same values as xlnx,txcsum but for RX checksum offload
> @@ -48,10 +49,20 @@ Optional properties:
>  		       If this is specified, the DMA-related resources from that
>  		       device (DMA registers and DMA TX/RX interrupts) rather
>  		       than this one will be used.
> - - mdio		: Child node for MDIO bus. Must be defined if PHY access is
> +- mdio		: Child node for MDIO bus. Must be defined if PHY access is
>  		  required through the core's MDIO interface (i.e. always,
>  		  unless the PHY is accessed through a different bus).
>  
> +Required properties for axistream-connected subnode:
> +- reg		: Address and length of the AXI DMA controller MMIO space.
> +- interrupts	: A list of 2 interrupts: TX DMA and RX DMA, in that order.
> +
> +Optional properties for axistream-connected subnode:
> +- xlnx,addrwidth: Specifies the configured address width of the DMA. Newer
> +		  versions of the IP allow setting this to a value between
> +		  32 and 64. Defaults to 32 bits if not specified.

I think this should be expressed using dma-ranges. This is exactly the 
purpose of dma-ranges and we shouldn't need a device specific property 
for this sort of thing.

Rob

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, netdev@vger.kernel.org,
	Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>,
	Michal Simek <michal.simek@xilinx.com>,
	linux-kernel@vger.kernel.org,
	Robert Hancock <hancock@sedsystems.ca>,
	"David S . Miller" <davem@davemloft.net>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 14/14] net: axienet: Update devicetree binding documentation
Date: Tue, 21 Jan 2020 15:51:09 -0600	[thread overview]
Message-ID: <20200121215109.GA26808@bogus> (raw)
In-Reply-To: <20200110115415.75683-15-andre.przywara@arm.com>

On Fri, Jan 10, 2020 at 11:54:15AM +0000, Andre Przywara wrote:
> This adds documentation about the newly introduced, optional
> "xlnx,addrwidth" property to the binding documentation.
> 
> While at it, clarify the wording on some properties, replace obsolete
> .txt file references with their new .yaml counterparts, and add a more
> modern example, using the axistream-connected property.
> 
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../bindings/net/xilinx_axienet.txt           | 57 ++++++++++++++++---
>  1 file changed, 50 insertions(+), 7 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> index 7360617cdedb..78c278c5200f 100644
> --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> @@ -12,7 +12,8 @@ sent and received through means of an AXI DMA controller. This driver
>  includes the DMA driver code, so this driver is incompatible with AXI DMA
>  driver.
>  
> -For more details about mdio please refer phy.txt file in the same directory.
> +For more details about mdio please refer to the ethernet-phy.yaml file in
> +the same directory.
>  
>  Required properties:
>  - compatible	: Must be one of "xlnx,axi-ethernet-1.00.a",
> @@ -27,14 +28,14 @@ Required properties:
>  		  instead, and only the Ethernet core interrupt is optionally
>  		  specified here.
>  - phy-handle	: Should point to the external phy device.
> -		  See ethernet.txt file in the same directory.
> -- xlnx,rxmem	: Set to allocated memory buffer for Rx/Tx in the hardware
> +		  See the ethernet-controller.yaml file in the same directory.
> +- xlnx,rxmem	: Size of the RXMEM buffer in the hardware, in bytes.
>  
>  Optional properties:
> -- phy-mode	: See ethernet.txt
> +- phy-mode	: See ethernet-controller.yaml.
>  - xlnx,phy-type	: Deprecated, do not use, but still accepted in preference
>  		  to phy-mode.
> -- xlnx,txcsum	: 0 or empty for disabling TX checksum offload,
> +- xlnx,txcsum	: 0 for disabling TX checksum offload (default if omitted),
>  		  1 to enable partial TX checksum offload,
>  		  2 to enable full TX checksum offload
>  - xlnx,rxcsum	: Same values as xlnx,txcsum but for RX checksum offload
> @@ -48,10 +49,20 @@ Optional properties:
>  		       If this is specified, the DMA-related resources from that
>  		       device (DMA registers and DMA TX/RX interrupts) rather
>  		       than this one will be used.
> - - mdio		: Child node for MDIO bus. Must be defined if PHY access is
> +- mdio		: Child node for MDIO bus. Must be defined if PHY access is
>  		  required through the core's MDIO interface (i.e. always,
>  		  unless the PHY is accessed through a different bus).
>  
> +Required properties for axistream-connected subnode:
> +- reg		: Address and length of the AXI DMA controller MMIO space.
> +- interrupts	: A list of 2 interrupts: TX DMA and RX DMA, in that order.
> +
> +Optional properties for axistream-connected subnode:
> +- xlnx,addrwidth: Specifies the configured address width of the DMA. Newer
> +		  versions of the IP allow setting this to a value between
> +		  32 and 64. Defaults to 32 bits if not specified.

I think this should be expressed using dma-ranges. This is exactly the 
purpose of dma-ranges and we shouldn't need a device specific property 
for this sort of thing.

Rob

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  reply	other threads:[~2020-01-21 21:51 UTC|newest]

Thread overview: 130+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-10 11:54 [PATCH 00/14] net: axienet: Error handling, SGMII and 64-bit DMA fixes Andre Przywara
2020-01-10 11:54 ` Andre Przywara
2020-01-10 11:54 ` [PATCH 01/14] net: xilinx: temac: Relax Kconfig dependencies Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-10 14:19   ` Radhey Shyam Pandey
2020-01-10 14:19     ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 02/14] net: axienet: Propagate failure of DMA descriptor setup Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-10 14:54   ` Radhey Shyam Pandey
2020-01-10 14:54     ` Radhey Shyam Pandey
2020-01-10 17:53     ` Radhey Shyam Pandey
2020-01-10 17:53       ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 03/14] net: axienet: Fix DMA descriptor cleanup path Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-10 15:14   ` Radhey Shyam Pandey
2020-01-10 15:14     ` Radhey Shyam Pandey
2020-01-10 15:43     ` Andre Przywara
2020-01-10 15:43       ` Andre Przywara
2020-01-10 17:05       ` Radhey Shyam Pandey
2020-01-10 17:05         ` Radhey Shyam Pandey
2020-01-16 18:03         ` Andre Przywara
2020-01-16 18:03           ` Andre Przywara
2020-01-20 18:32           ` Radhey Shyam Pandey
2020-01-20 18:32             ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 04/14] net: axienet: Improve DMA error handling Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-10 15:26   ` Radhey Shyam Pandey
2020-01-10 15:26     ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 05/14] net: axienet: Factor out TX descriptor chain cleanup Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-10 18:04   ` Radhey Shyam Pandey
2020-01-10 18:04     ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 06/14] net: axienet: Check for DMA mapping errors Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-13  5:54   ` Radhey Shyam Pandey
2020-01-13  5:54     ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 07/14] net: axienet: Fix SGMII support Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-10 14:04   ` Andrew Lunn
2020-01-10 14:04     ` Andrew Lunn
2020-01-10 14:20     ` Andre Przywara
2020-01-10 14:20       ` Andre Przywara
2020-01-10 14:26       ` Andrew Lunn
2020-01-10 14:26         ` Andrew Lunn
2020-01-10 15:04       ` Russell King - ARM Linux admin
2020-01-10 15:04         ` Russell King - ARM Linux admin
2020-01-10 15:22         ` Russell King - ARM Linux admin
2020-01-10 15:22           ` Russell King - ARM Linux admin
2020-01-10 17:04           ` Russell King - ARM Linux admin
2020-01-10 17:04             ` Russell King - ARM Linux admin
2020-01-18 11:22             ` Russell King - ARM Linux admin
2020-01-18 11:22               ` Russell King - ARM Linux admin
2020-01-20 14:50               ` Andre Przywara
2020-01-20 14:50                 ` Andre Przywara
2020-01-20 15:45                 ` Russell King - ARM Linux admin
2020-01-20 15:45                   ` Russell King - ARM Linux admin
2020-01-27 17:04                   ` Andre Przywara
2020-01-27 17:04                     ` Andre Przywara
2020-01-27 17:20                     ` Radhey Shyam Pandey
2020-01-27 17:20                       ` Radhey Shyam Pandey
2020-01-27 18:53                     ` Russell King - ARM Linux admin
2020-01-27 18:53                       ` Russell King - ARM Linux admin
2020-04-22  1:45                       ` Xilinx axienet 1000BaseX support (was: Re: [PATCH 07/14] net: axienet: Fix SGMII support) Robert Hancock
2020-04-22  1:45                         ` Robert Hancock
2020-04-22  7:51                         ` Russell King - ARM Linux admin
2020-04-22  7:51                           ` Russell King - ARM Linux admin
2020-04-22 16:31                           ` Xilinx axienet 1000BaseX support Robert Hancock
2020-04-22 16:31                             ` Robert Hancock
2020-04-28 21:59                           ` Robert Hancock
2020-04-28 21:59                             ` Robert Hancock
2020-04-28 23:01                             ` Russell King - ARM Linux admin
2020-04-28 23:01                               ` Russell King - ARM Linux admin
2020-04-28 23:51                               ` Robert Hancock
2020-04-28 23:51                                 ` Robert Hancock
2020-04-29  8:21                                 ` Russell King - ARM Linux admin
2020-04-29  8:21                                   ` Russell King - ARM Linux admin
2020-01-10 14:58   ` [PATCH 07/14] net: axienet: Fix SGMII support Russell King - ARM Linux admin
2020-01-10 14:58     ` Russell King - ARM Linux admin
2020-01-10 17:32     ` Andre Przywara
2020-01-10 17:32       ` Andre Przywara
2020-01-10 18:05       ` Russell King - ARM Linux admin
2020-01-10 18:05         ` Russell King - ARM Linux admin
2020-01-10 19:33         ` Andrew Lunn
2020-01-10 19:33           ` Andrew Lunn
2020-01-10 11:54 ` [PATCH 08/14] net: axienet: Drop MDIO interrupt registers from ethtools dump Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-13  6:02   ` Radhey Shyam Pandey
2020-01-13  6:02     ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 09/14] net: axienet: Add mii-tool support Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-13  6:12   ` Radhey Shyam Pandey
2020-01-13  6:12     ` Radhey Shyam Pandey
2020-03-12 11:41     ` Andre Przywara
2020-03-12 11:41       ` Andre Przywara
2020-01-10 11:54 ` [PATCH 10/14] net: axienet: Wrap DMA pointer writes to prepare for 64 bit Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-10 11:54 ` [PATCH 11/14] net: axienet: Upgrade descriptors to hold 64-bit addresses Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-14 16:35   ` Radhey Shyam Pandey
2020-01-14 16:35     ` Radhey Shyam Pandey
2020-01-14 17:29     ` Andre Przywara
2020-01-14 17:29       ` Andre Przywara
2020-01-10 11:54 ` [PATCH 12/14] net: axienet: Autodetect 64-bit DMA capability Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-10 14:08   ` Andrew Lunn
2020-01-10 14:08     ` Andrew Lunn
2020-01-10 14:13     ` Andre Przywara
2020-01-10 14:13       ` Andre Przywara
2020-01-10 14:22       ` Andrew Lunn
2020-01-10 14:22         ` Andrew Lunn
2020-01-10 15:08         ` Andre Przywara
2020-01-10 15:08           ` Andre Przywara
2020-01-10 15:22           ` Andrew Lunn
2020-01-10 15:22             ` Andrew Lunn
2020-01-14 17:03   ` Radhey Shyam Pandey
2020-01-14 17:03     ` Radhey Shyam Pandey
2020-01-14 17:41     ` Andre Przywara
2020-01-14 17:41       ` Andre Przywara
2020-01-15  6:02       ` Radhey Shyam Pandey
2020-01-15  6:02         ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 13/14] net: axienet: Allow DMA to beyond 4GB Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-10 11:54 ` [PATCH 14/14] net: axienet: Update devicetree binding documentation Andre Przywara
2020-01-10 11:54   ` Andre Przywara
2020-01-21 21:51   ` Rob Herring [this message]
2020-01-21 21:51     ` Rob Herring
2020-01-24 16:29     ` Andre Przywara
2020-01-24 16:29       ` Andre Przywara
2020-01-27  9:28       ` Radhey Shyam Pandey
2020-01-27  9:28         ` Radhey Shyam Pandey

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