All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ramalingam C <ramalingam.c@intel.com>
To: Sean Paul <sean@poorly.run>
Cc: dri-devel@lists.freedesktop.org, daniel.vetter@ffwll.ch,
	intel-gfx@lists.freedesktop.org,
	Sean Paul <seanpaul@chromium.org>,
	juston.li@intel.com, rodrigo.vivi@intel.com
Subject: Re: [PATCH v7 13/17] drm/i915: Plumb port through hdcp init
Date: Thu, 9 Jul 2020 16:25:18 +0530	[thread overview]
Message-ID: <20200709105518.GE13481@intel.com> (raw)
In-Reply-To: <20200623155907.22961-14-sean@poorly.run>

On 2020-06-23 at 11:59:03 -0400, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
> 
> This patch plumbs port through hdcp init instead of relying on
> intel_attached_encoder() to return a non-NULL encoder which won't work
> for MST connectors.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>

> Link: https://patchwork.freedesktop.org/patch/msgid/20200305201236.152307-13-sean@poorly.run #v5
> Link: https://patchwork.freedesktop.org/patch/msgid/20200429195502.39919-13-sean@poorly.run #v6
> 
> Changes in v5:
> -Added to the set
> Changes in v6:
> -None
> Changes in v7:
> -None
> ---
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c |  3 ++-
>  drivers/gpu/drm/i915/display/intel_hdcp.c    | 11 ++++++-----
>  drivers/gpu/drm/i915/display/intel_hdcp.h    |  2 +-
>  drivers/gpu/drm/i915/display/intel_hdmi.c    |  2 +-
>  4 files changed, 10 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index 0e06a1066d61..e26a45f880cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -630,7 +630,8 @@ int intel_dp_init_hdcp(struct intel_digital_port *intel_dig_port,
>  		return 0;
>  
>  	if (!intel_dp_is_edp(intel_dp))
> -		return intel_hdcp_init(intel_connector, &intel_dp_hdcp_shim);
> +		return intel_hdcp_init(intel_connector, port,
> +				       &intel_dp_hdcp_shim);
>  
>  	return 0;
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 5679877c6b4c..d79d4142aea7 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -1955,6 +1955,7 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
>  }
>  
>  static int initialize_hdcp_port_data(struct intel_connector *connector,
> +				     enum port port,
>  				     const struct intel_hdcp_shim *shim)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> @@ -1962,8 +1963,7 @@ static int initialize_hdcp_port_data(struct intel_connector *connector,
>  	struct hdcp_port_data *data = &hdcp->port_data;
>  
>  	if (INTEL_GEN(dev_priv) < 12)
> -		data->fw_ddi =
> -			intel_get_mei_fw_ddi_index(intel_attached_encoder(connector)->port);
> +		data->fw_ddi = intel_get_mei_fw_ddi_index(port);
>  	else
>  		/*
>  		 * As per ME FW API expectation, for GEN 12+, fw_ddi is filled
> @@ -2033,14 +2033,14 @@ void intel_hdcp_component_init(struct drm_i915_private *dev_priv)
>  	}
>  }
>  
> -static void intel_hdcp2_init(struct intel_connector *connector,
> +static void intel_hdcp2_init(struct intel_connector *connector, enum port port,
>  			     const struct intel_hdcp_shim *shim)
>  {
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
>  	struct intel_hdcp *hdcp = &connector->hdcp;
>  	int ret;
>  
> -	ret = initialize_hdcp_port_data(connector, shim);
> +	ret = initialize_hdcp_port_data(connector, port, shim);
>  	if (ret) {
>  		drm_dbg_kms(&i915->drm, "Mei hdcp data init failed\n");
>  		return;
> @@ -2050,6 +2050,7 @@ static void intel_hdcp2_init(struct intel_connector *connector,
>  }
>  
>  int intel_hdcp_init(struct intel_connector *connector,
> +		    enum port port,
>  		    const struct intel_hdcp_shim *shim)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> @@ -2060,7 +2061,7 @@ int intel_hdcp_init(struct intel_connector *connector,
>  		return -EINVAL;
>  
>  	if (is_hdcp2_supported(dev_priv))
> -		intel_hdcp2_init(connector, shim);
> +		intel_hdcp2_init(connector, port, shim);
>  
>  	ret =
>  	drm_connector_attach_content_protection_property(&connector->base,
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
> index 86bbaec120cc..1bbf5b67ed0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> @@ -22,7 +22,7 @@ enum transcoder;
>  void intel_hdcp_atomic_check(struct drm_connector *connector,
>  			     struct drm_connector_state *old_state,
>  			     struct drm_connector_state *new_state);
> -int intel_hdcp_init(struct intel_connector *connector,
> +int intel_hdcp_init(struct intel_connector *connector, enum port port,
>  		    const struct intel_hdcp_shim *hdcp_shim);
>  int intel_hdcp_enable(struct intel_connector *connector,
>  		      enum transcoder cpu_transcoder, u8 content_type);
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index a59acfff456e..ca71ee3dd1c7 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -3260,7 +3260,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
>  	intel_hdmi->attached_connector = intel_connector;
>  
>  	if (is_hdcp_supported(dev_priv, port)) {
> -		int ret = intel_hdcp_init(intel_connector,
> +		int ret = intel_hdcp_init(intel_connector, port,
>  					  &intel_hdmi_hdcp_shim);
>  		if (ret)
>  			drm_dbg_kms(&dev_priv->drm,
> -- 
> Sean Paul, Software Engineer, Google / Chromium OS
> 
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Ramalingam C <ramalingam.c@intel.com>
To: Sean Paul <sean@poorly.run>
Cc: dri-devel@lists.freedesktop.org, daniel.vetter@ffwll.ch,
	intel-gfx@lists.freedesktop.org,
	Sean Paul <seanpaul@chromium.org>
Subject: Re: [Intel-gfx] [PATCH v7 13/17] drm/i915: Plumb port through hdcp init
Date: Thu, 9 Jul 2020 16:25:18 +0530	[thread overview]
Message-ID: <20200709105518.GE13481@intel.com> (raw)
In-Reply-To: <20200623155907.22961-14-sean@poorly.run>

On 2020-06-23 at 11:59:03 -0400, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
> 
> This patch plumbs port through hdcp init instead of relying on
> intel_attached_encoder() to return a non-NULL encoder which won't work
> for MST connectors.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>

> Link: https://patchwork.freedesktop.org/patch/msgid/20200305201236.152307-13-sean@poorly.run #v5
> Link: https://patchwork.freedesktop.org/patch/msgid/20200429195502.39919-13-sean@poorly.run #v6
> 
> Changes in v5:
> -Added to the set
> Changes in v6:
> -None
> Changes in v7:
> -None
> ---
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c |  3 ++-
>  drivers/gpu/drm/i915/display/intel_hdcp.c    | 11 ++++++-----
>  drivers/gpu/drm/i915/display/intel_hdcp.h    |  2 +-
>  drivers/gpu/drm/i915/display/intel_hdmi.c    |  2 +-
>  4 files changed, 10 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index 0e06a1066d61..e26a45f880cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -630,7 +630,8 @@ int intel_dp_init_hdcp(struct intel_digital_port *intel_dig_port,
>  		return 0;
>  
>  	if (!intel_dp_is_edp(intel_dp))
> -		return intel_hdcp_init(intel_connector, &intel_dp_hdcp_shim);
> +		return intel_hdcp_init(intel_connector, port,
> +				       &intel_dp_hdcp_shim);
>  
>  	return 0;
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 5679877c6b4c..d79d4142aea7 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -1955,6 +1955,7 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
>  }
>  
>  static int initialize_hdcp_port_data(struct intel_connector *connector,
> +				     enum port port,
>  				     const struct intel_hdcp_shim *shim)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> @@ -1962,8 +1963,7 @@ static int initialize_hdcp_port_data(struct intel_connector *connector,
>  	struct hdcp_port_data *data = &hdcp->port_data;
>  
>  	if (INTEL_GEN(dev_priv) < 12)
> -		data->fw_ddi =
> -			intel_get_mei_fw_ddi_index(intel_attached_encoder(connector)->port);
> +		data->fw_ddi = intel_get_mei_fw_ddi_index(port);
>  	else
>  		/*
>  		 * As per ME FW API expectation, for GEN 12+, fw_ddi is filled
> @@ -2033,14 +2033,14 @@ void intel_hdcp_component_init(struct drm_i915_private *dev_priv)
>  	}
>  }
>  
> -static void intel_hdcp2_init(struct intel_connector *connector,
> +static void intel_hdcp2_init(struct intel_connector *connector, enum port port,
>  			     const struct intel_hdcp_shim *shim)
>  {
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
>  	struct intel_hdcp *hdcp = &connector->hdcp;
>  	int ret;
>  
> -	ret = initialize_hdcp_port_data(connector, shim);
> +	ret = initialize_hdcp_port_data(connector, port, shim);
>  	if (ret) {
>  		drm_dbg_kms(&i915->drm, "Mei hdcp data init failed\n");
>  		return;
> @@ -2050,6 +2050,7 @@ static void intel_hdcp2_init(struct intel_connector *connector,
>  }
>  
>  int intel_hdcp_init(struct intel_connector *connector,
> +		    enum port port,
>  		    const struct intel_hdcp_shim *shim)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> @@ -2060,7 +2061,7 @@ int intel_hdcp_init(struct intel_connector *connector,
>  		return -EINVAL;
>  
>  	if (is_hdcp2_supported(dev_priv))
> -		intel_hdcp2_init(connector, shim);
> +		intel_hdcp2_init(connector, port, shim);
>  
>  	ret =
>  	drm_connector_attach_content_protection_property(&connector->base,
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
> index 86bbaec120cc..1bbf5b67ed0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> @@ -22,7 +22,7 @@ enum transcoder;
>  void intel_hdcp_atomic_check(struct drm_connector *connector,
>  			     struct drm_connector_state *old_state,
>  			     struct drm_connector_state *new_state);
> -int intel_hdcp_init(struct intel_connector *connector,
> +int intel_hdcp_init(struct intel_connector *connector, enum port port,
>  		    const struct intel_hdcp_shim *hdcp_shim);
>  int intel_hdcp_enable(struct intel_connector *connector,
>  		      enum transcoder cpu_transcoder, u8 content_type);
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index a59acfff456e..ca71ee3dd1c7 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -3260,7 +3260,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
>  	intel_hdmi->attached_connector = intel_connector;
>  
>  	if (is_hdcp_supported(dev_priv, port)) {
> -		int ret = intel_hdcp_init(intel_connector,
> +		int ret = intel_hdcp_init(intel_connector, port,
>  					  &intel_hdmi_hdcp_shim);
>  		if (ret)
>  			drm_dbg_kms(&dev_priv->drm,
> -- 
> Sean Paul, Software Engineer, Google / Chromium OS
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-07-09 11:01 UTC|newest]

Thread overview: 98+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-23 15:58 [PATCH v7 00/17] drm/i915: Add support for HDCP 1.4 over MST Sean Paul
2020-06-23 15:58 ` [Intel-gfx] " Sean Paul
2020-06-23 15:58 ` [PATCH v7 01/17] drm/i915: Fix sha_text population code Sean Paul
2020-06-23 15:58   ` [Intel-gfx] " Sean Paul
2020-06-23 15:58   ` Sean Paul
2020-06-25 14:53   ` Sasha Levin
2020-06-25 14:53     ` [Intel-gfx] " Sasha Levin
2020-06-25 14:53     ` Sasha Levin
2020-06-23 15:58 ` [PATCH v7 02/17] drm/i915: Clear the repeater bit on HDCP disable Sean Paul
2020-06-23 15:58   ` [Intel-gfx] " Sean Paul
2020-06-23 15:58   ` Sean Paul
2020-06-25 14:53   ` Sasha Levin
2020-06-25 14:53     ` [Intel-gfx] " Sasha Levin
2020-06-25 14:53     ` Sasha Levin
2020-06-23 15:58 ` [PATCH v7 03/17] drm/i915: WARN if HDCP signalling is enabled upon disable Sean Paul
2020-06-23 15:58   ` [Intel-gfx] " Sean Paul
2020-06-23 15:58 ` [PATCH v7 04/17] drm/i915: Intercept Aksv writes in the aux hooks Sean Paul
2020-06-23 15:58   ` [Intel-gfx] " Sean Paul
2020-06-23 15:58 ` [PATCH v7 05/17] drm/i915: Use the cpu_transcoder in intel_hdcp to toggle HDCP signalling Sean Paul
2020-06-23 15:58   ` [Intel-gfx] " Sean Paul
2020-06-23 15:58 ` [PATCH v7 06/17] drm/i915: Factor out hdcp->value assignments Sean Paul
2020-06-23 15:58   ` [Intel-gfx] " Sean Paul
2020-06-23 15:58 ` [PATCH v7 07/17] drm/i915: Protect workers against disappearing connectors Sean Paul
2020-06-23 15:58   ` [Intel-gfx] " Sean Paul
2020-06-23 15:58 ` [PATCH v7 08/17] drm/i915: Clean up intel_hdcp_disable Sean Paul
2020-06-23 15:58   ` [Intel-gfx] " Sean Paul
2020-07-03 11:36   ` Anshuman Gupta
2020-07-03 11:36     ` Anshuman Gupta
2020-07-09  5:40   ` Ramalingam C
2020-07-09  5:40     ` [Intel-gfx] " Ramalingam C
2020-06-23 15:58 ` [PATCH v7 09/17] drm/i915: Don't fully disable HDCP on a port if multiple pipes are using it Sean Paul
2020-06-23 15:58   ` [Intel-gfx] " Sean Paul
2020-07-09  5:57   ` Ramalingam C
2020-07-09  5:57     ` [Intel-gfx] " Ramalingam C
2020-06-23 15:59 ` [PATCH v7 10/17] drm/i915: Support DP MST in enc_to_dig_port() function Sean Paul
2020-06-23 15:59   ` [Intel-gfx] " Sean Paul
2020-07-09 10:16   ` Ramalingam C
2020-07-09 10:16     ` [Intel-gfx] " Ramalingam C
2020-06-23 15:59 ` [PATCH v7 11/17] drm/i915: Use ddi_update_pipe in intel_dp_mst Sean Paul
2020-06-23 15:59   ` [Intel-gfx] " Sean Paul
2020-07-09 10:49   ` C, Ramalingam
2020-07-09 10:49     ` [Intel-gfx] " C, Ramalingam
2020-06-23 15:59 ` [PATCH v7 12/17] drm/i915: Factor out HDCP shim functions from dp for use by dp_mst Sean Paul
2020-06-23 15:59   ` [Intel-gfx] " Sean Paul
2020-07-09 10:51   ` C, Ramalingam
2020-07-09 10:51     ` [Intel-gfx] " C, Ramalingam
2020-06-23 15:59 ` [PATCH v7 13/17] drm/i915: Plumb port through hdcp init Sean Paul
2020-06-23 15:59   ` [Intel-gfx] " Sean Paul
2020-07-03 10:22   ` Anshuman Gupta
2020-07-03 10:22     ` Anshuman Gupta
2020-07-09 10:55   ` Ramalingam C [this message]
2020-07-09 10:55     ` Ramalingam C
2020-06-23 15:59 ` [PATCH v7 14/17] drm/i915: Add connector to hdcp_shim->check_link() Sean Paul
2020-06-23 15:59   ` [Intel-gfx] " Sean Paul
2020-07-03 10:13   ` Anshuman Gupta
2020-07-03 10:13     ` Anshuman Gupta
2020-07-09 10:56   ` C, Ramalingam
2020-07-09 10:56     ` [Intel-gfx] " C, Ramalingam
2020-06-23 15:59 ` [PATCH v7 15/17] drm/mst: Add support for QUERY_STREAM_ENCRYPTION_STATUS MST sideband message Sean Paul
2020-06-23 15:59   ` [Intel-gfx] " Sean Paul
2020-06-30 14:09   ` Anshuman Gupta
2020-06-30 14:09     ` Anshuman Gupta
2020-06-30 16:48     ` Sean Paul
2020-06-30 16:48       ` Sean Paul
2020-07-02 14:37       ` Anshuman Gupta
2020-07-02 14:37         ` Anshuman Gupta
2020-07-09 12:58         ` Anshuman Gupta
2020-07-09 12:58           ` Anshuman Gupta
2020-08-11 17:21           ` Sean Paul
2020-08-11 17:21             ` Sean Paul
2020-08-12  8:18             ` Anshuman Gupta
2020-08-12  8:18               ` Anshuman Gupta
2020-08-11 14:43         ` Sean Paul
2020-08-11 14:43           ` Sean Paul
2020-06-23 15:59 ` [PATCH v7 16/17] drm/i915: Print HDCP version info for all connectors Sean Paul
2020-06-23 15:59   ` [Intel-gfx] " Sean Paul
2020-06-23 15:59 ` [PATCH v7 17/17] drm/i915: Add HDCP 1.4 support for MST connectors Sean Paul
2020-06-23 15:59   ` [Intel-gfx] " Sean Paul
2020-07-03 11:18   ` Anshuman Gupta
2020-07-03 11:18     ` Anshuman Gupta
2020-07-03 14:55     ` Anshuman Gupta
2020-07-03 14:55       ` Anshuman Gupta
2020-07-09 10:37   ` Ramalingam C
2020-07-09 10:37     ` [Intel-gfx] " Ramalingam C
2020-07-09 12:28     ` Anshuman Gupta
2020-07-09 12:28       ` Anshuman Gupta
2020-08-11 17:28       ` Sean Paul
2020-08-11 17:28         ` Sean Paul
2020-08-12  7:03         ` Anshuman Gupta
2020-08-12  7:03           ` Anshuman Gupta
2020-08-12 17:21           ` Sean Paul
2020-08-12 17:21             ` Sean Paul
2020-08-13  9:17             ` Anshuman Gupta
2020-08-13  9:17               ` Anshuman Gupta
2020-06-23 16:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for HDCP 1.4 over MST Patchwork
2020-06-23 16:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-06-23 16:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-06-24  2:15 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200709105518.GE13481@intel.com \
    --to=ramalingam.c@intel.com \
    --cc=daniel.vetter@ffwll.ch \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=juston.li@intel.com \
    --cc=rodrigo.vivi@intel.com \
    --cc=sean@poorly.run \
    --cc=seanpaul@chromium.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.