* [PATCH v1 0/2] Add MIPI rx DPI support @ 2020-12-25 10:58 ` Xin Ji 0 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-25 10:58 UTC (permalink / raw) To: Nicolas Boichat, Andrzej Hajda, Neil Armstrong, Laurent Pinchart Cc: Jonas Karlman, Jernej Skrabec, David Airlie, Daniel Vetter, Boris Brezillon, Sam Ravnborg, Hsin-Yi Wang, Torsten Duwe, Vasily Khoruzhick, Marek Szyprowski, Xin Ji, Sheng Pan, dri-devel, linux-kernel, devel Hi all, this patch series implement MIPI rx DPI feature. Please help to review. This is the v1 version, any mistakes, please let me know, I'll fix it in the next series. Change history: v1: initial MIPI rx DPI feature support Xin Ji (2): dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting drm/bridge: anx7625: add MIPI DPI input feature support .../bindings/display/bridge/analogix,anx7625.yaml | 19 ++ drivers/gpu/drm/bridge/analogix/anx7625.c | 352 +++++++++++++++++++-- drivers/gpu/drm/bridge/analogix/anx7625.h | 24 +- 3 files changed, 375 insertions(+), 20 deletions(-) -- 2.7.4 ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v1 0/2] Add MIPI rx DPI support @ 2020-12-25 10:58 ` Xin Ji 0 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-25 10:58 UTC (permalink / raw) To: Nicolas Boichat, Andrzej Hajda, Neil Armstrong, Laurent Pinchart Cc: devel, Jernej Skrabec, Jonas Karlman, David Airlie, linux-kernel, dri-devel, Vasily Khoruzhick, Boris Brezillon, Torsten Duwe, Sheng Pan, Hsin-Yi Wang, Sam Ravnborg, Xin Ji, Marek Szyprowski Hi all, this patch series implement MIPI rx DPI feature. Please help to review. This is the v1 version, any mistakes, please let me know, I'll fix it in the next series. Change history: v1: initial MIPI rx DPI feature support Xin Ji (2): dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting drm/bridge: anx7625: add MIPI DPI input feature support .../bindings/display/bridge/analogix,anx7625.yaml | 19 ++ drivers/gpu/drm/bridge/analogix/anx7625.c | 352 +++++++++++++++++++-- drivers/gpu/drm/bridge/analogix/anx7625.h | 24 +- 3 files changed, 375 insertions(+), 20 deletions(-) -- 2.7.4 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v1 0/2] Add MIPI rx DPI support @ 2020-12-25 10:58 ` Xin Ji 0 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-25 10:58 UTC (permalink / raw) To: Nicolas Boichat, Andrzej Hajda, Neil Armstrong, Laurent Pinchart Cc: devel, Jernej Skrabec, Jonas Karlman, David Airlie, linux-kernel, dri-devel, Vasily Khoruzhick, Boris Brezillon, Torsten Duwe, Sheng Pan, Daniel Vetter, Hsin-Yi Wang, Sam Ravnborg, Xin Ji, Marek Szyprowski Hi all, this patch series implement MIPI rx DPI feature. Please help to review. This is the v1 version, any mistakes, please let me know, I'll fix it in the next series. Change history: v1: initial MIPI rx DPI feature support Xin Ji (2): dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting drm/bridge: anx7625: add MIPI DPI input feature support .../bindings/display/bridge/analogix,anx7625.yaml | 19 ++ drivers/gpu/drm/bridge/analogix/anx7625.c | 352 +++++++++++++++++++-- drivers/gpu/drm/bridge/analogix/anx7625.h | 24 +- 3 files changed, 375 insertions(+), 20 deletions(-) -- 2.7.4 _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting 2020-12-25 10:58 ` Xin Ji @ 2020-12-25 11:01 ` Xin Ji -1 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-25 11:01 UTC (permalink / raw) To: Rob Herring, David Airlie, Nicolas Boichat, Hsin-Yi Wang Cc: Daniel Vetter, Sam Ravnborg, Laurent Pinchart, Maxime Ripard, Mark Brown, Ricardo Cañuelo, dri-devel, devicetree, Sheng Pan, linux-kernel Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add swing setting for adjusting DP tx PHY swing Signed-off-by: Xin Ji <xji@analogixsemi.com> --- .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml index 60585a4..34a7faf 100644 --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml @@ -34,6 +34,14 @@ properties: description: used for reset chip control, RESET_N pin B7. maxItems: 1 + anx,swing-setting: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: an array of swing register setting for DP tx PHY + + anx,mipi-dpi-in: + $ref: /schemas/types.yaml#/definitions/uint32 + description: indicate the MIPI rx signal type is DPI or DSI + ports: type: object @@ -72,6 +80,17 @@ examples: reg = <0x58>; enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; + anx,swing-setting = <0x00 0x14>, <0x01 0x54>, + <0x02 0x64>, <0x03 0x74>, <0x04 0x29>, + <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>, + <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>, + <0x10 0x60>, <0x12 0x40>, <0x13 0x60>, + <0x14 0x14>, <0x15 0x54>, <0x16 0x64>, + <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>, + <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>, + <0x20 0x20>, <0x21 0x60>, <0x24 0x60>, + <0x26 0x40>, <0x27 0x60>; + anx,mipi-dpi-in = <0>; ports { #address-cells = <1>; -- 2.7.4 ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting @ 2020-12-25 11:01 ` Xin Ji 0 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-25 11:01 UTC (permalink / raw) To: Rob Herring, David Airlie, Nicolas Boichat, Hsin-Yi Wang Cc: devicetree, Laurent Pinchart, Sam Ravnborg, linux-kernel, Mark Brown, dri-devel, Ricardo Cañuelo, Sheng Pan Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add swing setting for adjusting DP tx PHY swing Signed-off-by: Xin Ji <xji@analogixsemi.com> --- .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml index 60585a4..34a7faf 100644 --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml @@ -34,6 +34,14 @@ properties: description: used for reset chip control, RESET_N pin B7. maxItems: 1 + anx,swing-setting: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: an array of swing register setting for DP tx PHY + + anx,mipi-dpi-in: + $ref: /schemas/types.yaml#/definitions/uint32 + description: indicate the MIPI rx signal type is DPI or DSI + ports: type: object @@ -72,6 +80,17 @@ examples: reg = <0x58>; enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; + anx,swing-setting = <0x00 0x14>, <0x01 0x54>, + <0x02 0x64>, <0x03 0x74>, <0x04 0x29>, + <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>, + <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>, + <0x10 0x60>, <0x12 0x40>, <0x13 0x60>, + <0x14 0x14>, <0x15 0x54>, <0x16 0x64>, + <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>, + <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>, + <0x20 0x20>, <0x21 0x60>, <0x24 0x60>, + <0x26 0x40>, <0x27 0x60>; + anx,mipi-dpi-in = <0>; ports { #address-cells = <1>; -- 2.7.4 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting 2020-12-25 11:01 ` Xin Ji @ 2020-12-26 0:16 ` Rob Herring -1 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2020-12-26 0:16 UTC (permalink / raw) To: Xin Ji Cc: Hsin-Yi Wang, Sam Ravnborg, David Airlie, devicetree, Nicolas Boichat, Mark Brown, Sheng Pan, linux-kernel, Laurent Pinchart, dri-devel, Daniel Vetter, Rob Herring, Maxime Ripard, Ricardo Cañuelo On Fri, 25 Dec 2020 19:01:09 +0800, Xin Ji wrote: > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > swing setting for adjusting DP tx PHY swing > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > --- > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: anx,swing-setting: 'anyOf' conditional failed, one must be fixed: [[0, 20], [1, 84], [2, 100], [3, 116], [4, 41], [5, 123], [6, 119], [7, 91], [8, 127], [12, 32], [13, 96], [16, 96], [18, 64], [19, 96], [20, 20], [21, 84], [22, 100], [23, 116], [24, 41], [25, 123], [26, 119], [27, 91], [28, 127], [32, 32], [33, 96], [36, 96], [38, 64], [39, 96]] is too long [0, 20] is too long [1, 84] is too long [2, 100] is too long [3, 116] is too long [4, 41] is too long [5, 123] is too long [6, 119] is too long [7, 91] is too long [8, 127] is too long [12, 32] is too long [13, 96] is too long [16, 96] is too long [18, 64] is too long [19, 96] is too long [20, 20] is too long [21, 84] is too long [22, 100] is too long [23, 116] is too long [24, 41] is too long [25, 123] is too long [26, 119] is too long [27, 91] is too long [28, 127] is too long [32, 32] is too long [33, 96] is too long [36, 96] is too long [38, 64] is too long [39, 96] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: 'anx,mipi-dpi-in', 'anx,swing-setting' do not match any of the regexes: '^#.*', '^(at25|bm|devbus|dmacap|dsa|exynos|fsi[ab]|gpio-fan|gpio-key|gpio|gpmc|hdmi|i2c-gpio),.*', '^(keypad|m25p|max8952|max8997|max8998|mpmc),.*', '^(pinctrl-single|#pinctrl-single|PowerPC),.*', '^(pl022|pxa-mmc|rcar_sound|rotary-encoder|s5m8767|sdhci),.*', '^(simple-audio-card|st-plgpio|st-spics|ts),.*', '^70mai,.*', '^GEFanuc,.*', '^ORCL,.*', '^SUNW,.*', '^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$', '^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$', '^abb,.*', '^abilis,.*', '^abracon,.*', '^abt,.*', '^acer,.*', '^acme,.*', '^actions,.*', '^active-semi,.*', '^ad,.*', '^adafruit,.*', '^adapteva,.*', '^adaptrum,.*', '^adh,.*', '^adi,.*', '^advantech,.*', '^aeroflexgaisler,.*', '^al,.*', '^allegro,.*', '^allo,.*', '^allwinner,.*', '^alphascale,.*', '^alps,.*', '^alt,.*', '^altr,.*', '^amarula,.*', '^ amazon,.*', '^amcc,.*', '^amd,.*', '^amediatech,.*', '^amlogic,.*', '^ampere,.*', '^ampire,.*', '^ams,.*', '^amstaos,.*', '^analogix,.*', '^andestech,.*', '^anvo,.*', '^apm,.*', '^aptina,.*', '^arasan,.*', '^archermind,.*', '^arctic,.*', '^arcx,.*', '^aries,.*', '^arm,.*', '^armadeus,.*', '^arrow,.*', '^artesyn,.*', '^asahi-kasei,.*', '^asc,.*', '^aspeed,.*', '^asus,.*', '^atlas,.*', '^atmel,.*', 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'^gef,.*', '^gemei,.*', '^geniatech,.*', '^giantec,.*', '^giantplus,.*', '^globalscale,.*', '^globaltop,.*', '^gmt,.*', '^goodix,.*', '^google,.*', '^grinn,.*', '^grmn,.*', '^gumstix,.*', '^gw,.*', '^hannstar,.*', '^haoyu,.*', '^hardkernel,.*', '^hideep,.*', '^himax,.*', '^hirschmann,.*', '^hisilicon,.*', '^hit,.*', '^hitex,.*', '^holt,.*', '^holtek,.*', '^honestar,.*', '^honeywell,.*', '^hoperun,.*', '^hp,.*', '^hsg,.*', '^hugsun,.*', '^hwacom,.*', '^hydis,.*', '^hyundai,.*', '^i2se,.*', '^ibm,.*', '^icplus,.*', '^idt,.*', '^ifi,.*', '^ilitek,.*', '^img,.*', '^imi,.*', '^incircuit,.*', '^i net-tek,.*', '^infineon,.*', '^inforce,.*', '^ingenic,.*', '^innolux,.*', '^inside-secure,.*', '^inspur,.*', '^intel,.*', '^intercontrol,.*', '^invensense,.*', '^inversepath,.*', '^iom,.*', '^isee,.*', '^isil,.*', '^issi,.*', '^ite,.*', '^itead,.*', '^ivo,.*', '^iwave,.*', '^jdi,.*', '^jedec,.*', '^jesurun,.*', '^jianda,.*', '^kam,.*', '^karo,.*', '^keithkoep,.*', '^keymile,.*', '^khadas,.*', '^kiebackpeter,.*', '^kinetic,.*', '^kingdisplay,.*', '^kingnovel,.*', '^kionix,.*', '^kobo,.*', '^kobol,.*', '^koe,.*', '^kontron,.*', '^kosagi,.*', '^kyo,.*', '^lacie,.*', '^laird,.*', '^lamobo,.*', '^lantiq,.*', '^lattice,.*', '^leadtek,.*', '^leez,.*', '^lego,.*', '^lemaker,.*', '^lenovo,.*', '^lg,.*', '^lgphilips,.*', '^libretech,.*', '^licheepi,.*', '^linaro,.*', '^linksprite,.*', '^linksys,.*', '^linutronix,.*', '^linux,.*', '^linx,.*', '^litex,.*', '^lltc,.*', '^logicpd,.*', '^logictechno,.*', '^longcheer,.*', '^lontium,.*', '^loongson,.*', '^lsi,.*', '^lwn,.*', '^lxa,.*', '^macnica,.*' , '^mantix,.*', '^mapleboard,.*', '^marvell,.*', '^maxbotix,.*', '^maxim,.*', '^mbvl,.*', '^mcube,.*', '^meas,.*', '^mecer,.*', '^mediatek,.*', '^megachips,.*', '^mele,.*', '^melexis,.*', '^melfas,.*', '^mellanox,.*', '^memsic,.*', '^menlo,.*', '^mentor,.*', '^meraki,.*', '^merrii,.*', '^micrel,.*', '^microchip,.*', '^microcrystal,.*', '^micron,.*', '^microsoft,.*', '^microsys,.*', '^mikroe,.*', '^mikrotik,.*', '^miniand,.*', '^minix,.*', '^miramems,.*', '^mitsubishi,.*', '^modtronix,.*', '^mosaixtech,.*', '^motorola,.*', '^moxa,.*', '^mpl,.*', '^mps,.*', '^mqmaker,.*', '^mrvl,.*', '^mscc,.*', '^msi,.*', '^mstar,.*', '^mti,.*', '^multi-inno,.*', '^mundoreader,.*', '^murata,.*', '^mxicy,.*', '^myir,.*', '^national,.*', '^nec,.*', '^neonode,.*', '^netgear,.*', '^netlogic,.*', '^netron-dy,.*', '^netxeon,.*', '^neweast,.*', '^newhaven,.*', '^nexbox,.*', '^nextthing,.*', '^ni,.*', '^nintendo,.*', '^nlt,.*', '^nokia,.*', '^nordic,.*', '^novtech,.*', '^nutsboard,.*', '^nuvoton,.*', '^nvd,. *', '^nvidia,.*', '^nxp,.*', '^oceanic,.*', '^oct,.*', '^okaya,.*', '^oki,.*', '^olimex,.*', '^olpc,.*', '^onion,.*', '^onnn,.*', '^ontat,.*', '^opalkelly,.*', '^opencores,.*', '^openrisc,.*', '^option,.*', '^oranth,.*', '^orisetech,.*', '^ortustech,.*', '^osddisplays,.*', '^ouya,.*', '^overkiz,.*', '^ovti,.*', '^oxsemi,.*', '^ozzmaker,.*', '^panasonic,.*', '^parade,.*', '^parallax,.*', '^pda,.*', '^pericom,.*', '^pervasive,.*', '^phicomm,.*', '^phytec,.*', '^picochip,.*', '^pine64,.*', '^pineriver,.*', '^pixcir,.*', '^plantower,.*', '^plathome,.*', '^plda,.*', '^plx,.*', '^pni,.*', '^pocketbook,.*', '^polaroid,.*', '^portwell,.*', '^poslab,.*', '^pov,.*', '^powertip,.*', '^powervr,.*', '^primux,.*', '^probox2,.*', '^prt,.*', '^pulsedlight,.*', '^purism,.*', '^qca,.*', '^qcom,.*', '^qemu,.*', '^qi,.*', '^qiaodian,.*', '^qihua,.*', '^qnap,.*', '^radxa,.*', '^raidsonic,.*', '^ralink,.*', '^ramtron,.*', '^raspberrypi,.*', '^raydium,.*', '^rda,.*', '^realtek,.*', '^renesas,.*', '^rervis ion,.*', '^revotics,.*', '^rex,.*', '^richtek,.*', '^ricoh,.*', '^rikomagic,.*', '^riot,.*', '^riscv,.*', '^rockchip,.*', '^rocktech,.*', '^rohm,.*', '^ronbo,.*', '^roofull,.*', '^roseapplepi,.*', '^samsung,.*', '^samtec,.*', '^sancloud,.*', '^sandisk,.*', '^satoz,.*', '^sbs,.*', '^schindler,.*', '^seagate,.*', '^seeed,.*', '^seirobotics,.*', '^semtech,.*', '^sensirion,.*', '^sensortek,.*', '^sff,.*', '^sgd,.*', '^sgmicro,.*', '^sgx,.*', '^sharp,.*', '^shimafuji,.*', '^shiratech,.*', '^si-en,.*', '^si-linux,.*', '^sifive,.*', '^sigma,.*', '^sii,.*', '^sil,.*', '^silabs,.*', '^silead,.*', '^silergy,.*', '^silex-insight,.*', '^siliconmitus,.*', '^simtek,.*', '^sinlinx,.*', '^sinovoip,.*', '^sipeed,.*', '^sirf,.*', '^sis,.*', '^sitronix,.*', '^skyworks,.*', '^smartlabs,.*', '^smsc,.*', '^snps,.*', '^sochip,.*', '^socionext,.*', '^solidrun,.*', '^solomon,.*', '^sony,.*', '^spansion,.*', '^sprd,.*', '^sst,.*', '^sstar,.*', '^st,.*', '^st-ericsson,.*', '^starry,.*', '^startek,.*', '^ste,. *', '^stericsson,.*', '^summit,.*', '^sunchip,.*', '^swir,.*', '^syna,.*', '^synology,.*', '^tbs,.*', '^tbs-biometrics,.*', '^tcg,.*', '^tcl,.*', '^tdo,.*', '^technexion,.*', '^technologic,.*', '^techstar,.*', '^tempo,.*', '^terasic,.*', '^tfc,.*', '^thine,.*', '^thingyjp,.*', '^ti,.*', '^tianma,.*', '^tlm,.*', '^tmt,.*', '^topeet,.*', '^toppoly,.*', '^topwise,.*', '^toradex,.*', '^toshiba,.*', '^toumaz,.*', '^tpk,.*', '^tplink,.*', '^tpo,.*', '^tq,.*', '^tronfy,.*', '^tronsmart,.*', '^truly,.*', '^tsd,.*', '^tyan,.*', '^u-blox,.*', '^u-boot,.*', '^ubnt,.*', '^ucrobotics,.*', '^udoo,.*', '^ugoos,.*', '^uniwest,.*', '^upisemi,.*', '^urt,.*', '^usi,.*', '^utoo,.*', '^v3,.*', '^vaisala,.*', '^vamrs,.*', '^variscite,.*', '^vdl,.*', '^via,.*', '^videostrong,.*', '^virtio,.*', '^virtual,.*', '^vishay,.*', '^visionox,.*', '^vitesse,.*', '^vivante,.*', '^vocore,.*', '^voipac,.*', '^vot,.*', '^vxt,.*', '^wand,.*', '^waveshare,.*', '^wd,.*', '^we,.*', '^wetek,.*', '^wexler,.*', '^whwave,.*', '^wi2wi,.*', '^winbond,.*', '^winstar,.*', '^wits,.*', '^wlf,.*', '^wm,.*', '^wobo,.*', '^x-powers,.*', '^xes,.*', '^xiaomi,.*', '^xillybus,.*', '^xingbangda,.*', '^xinpeng,.*', '^xiphera,.*', '^xlnx,.*', '^xnano,.*', '^xunlong,.*', '^xylon,.*', '^yes-optoelectronics,.*', '^ylm,.*', '^yna,.*', '^yones-toptech,.*', '^ysoft,.*', '^zarlink,.*', '^zealz,.*', '^zeitec,.*', '^zidoo,.*', '^zii,.*', '^zinitix,.*', '^zkmagic,.*', '^zte,.*', '^zyxel,.*' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/vendor-prefixes.yaml See https://patchwork.ozlabs.org/patch/1420616 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting @ 2020-12-26 0:16 ` Rob Herring 0 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2020-12-26 0:16 UTC (permalink / raw) To: Xin Ji Cc: devicetree, Laurent Pinchart, Nicolas Boichat, David Airlie, Ricardo Cañuelo, linux-kernel, dri-devel, Rob Herring, Mark Brown, Sheng Pan, Hsin-Yi Wang, Sam Ravnborg On Fri, 25 Dec 2020 19:01:09 +0800, Xin Ji wrote: > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > swing setting for adjusting DP tx PHY swing > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > --- > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: anx,swing-setting: 'anyOf' conditional failed, one must be fixed: [[0, 20], [1, 84], [2, 100], [3, 116], [4, 41], [5, 123], [6, 119], [7, 91], [8, 127], [12, 32], [13, 96], [16, 96], [18, 64], [19, 96], [20, 20], [21, 84], [22, 100], [23, 116], [24, 41], [25, 123], [26, 119], [27, 91], [28, 127], [32, 32], [33, 96], [36, 96], [38, 64], [39, 96]] is too long [0, 20] is too long [1, 84] is too long [2, 100] is too long [3, 116] is too long [4, 41] is too long [5, 123] is too long [6, 119] is too long [7, 91] is too long [8, 127] is too long [12, 32] is too long [13, 96] is too long [16, 96] is too long [18, 64] is too long [19, 96] is too long [20, 20] is too long [21, 84] is too long [22, 100] is too long [23, 116] is too long [24, 41] is too long [25, 123] is too long [26, 119] is too long [27, 91] is too long [28, 127] is too long [32, 32] is too long [33, 96] is too long [36, 96] is too long [38, 64] is too long [39, 96] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: 'anx,mipi-dpi-in', 'anx,swing-setting' do not match any of the regexes: '^#.*', '^(at25|bm|devbus|dmacap|dsa|exynos|fsi[ab]|gpio-fan|gpio-key|gpio|gpmc|hdmi|i2c-gpio),.*', '^(keypad|m25p|max8952|max8997|max8998|mpmc),.*', '^(pinctrl-single|#pinctrl-single|PowerPC),.*', '^(pl022|pxa-mmc|rcar_sound|rotary-encoder|s5m8767|sdhci),.*', '^(simple-audio-card|st-plgpio|st-spics|ts),.*', '^70mai,.*', '^GEFanuc,.*', '^ORCL,.*', '^SUNW,.*', '^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$', '^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$', '^abb,.*', '^abilis,.*', '^abracon,.*', '^abt,.*', '^acer,.*', '^acme,.*', '^actions,.*', '^active-semi,.*', '^ad,.*', '^adafruit,.*', '^adapteva,.*', '^adaptrum,.*', '^adh,.*', '^adi,.*', '^advantech,.*', '^aeroflexgaisler,.*', '^al,.*', '^allegro,.*', '^allo,.*', '^allwinner,.*', '^alphascale,.*', '^alps,.*', '^alt,.*', '^altr,.*', '^amarula,.*', '^ amazon,.*', '^amcc,.*', '^amd,.*', '^amediatech,.*', '^amlogic,.*', '^ampere,.*', '^ampire,.*', '^ams,.*', '^amstaos,.*', '^analogix,.*', '^andestech,.*', '^anvo,.*', '^apm,.*', '^aptina,.*', '^arasan,.*', '^archermind,.*', '^arctic,.*', '^arcx,.*', '^aries,.*', '^arm,.*', '^armadeus,.*', '^arrow,.*', '^artesyn,.*', '^asahi-kasei,.*', '^asc,.*', '^aspeed,.*', '^asus,.*', '^atlas,.*', '^atmel,.*', '^auo,.*', '^auvidea,.*', '^avago,.*', '^avia,.*', '^avic,.*', '^avnet,.*', '^awinic,.*', '^axentia,.*', '^axis,.*', '^azoteq,.*', '^azw,.*', '^baikal,.*', '^bananapi,.*', '^beacon,.*', '^beagle,.*', '^bhf,.*', '^bitmain,.*', '^boe,.*', '^bosch,.*', '^boundary,.*', '^brcm,.*', '^broadmobi,.*', '^bticino,.*', '^buffalo,.*', '^bur,.*', '^calaosystems,.*', '^calxeda,.*', '^caninos,.*', '^capella,.*', '^cascoda,.*', '^catalyst,.*', '^cavium,.*', '^cdns,.*', '^cdtech,.*', '^cellwise,.*', '^ceva,.*', '^checkpoint,.*', '^chefree,.*', '^chipidea,.*', '^chipone,.*', '^chipspark,.*', '^chrontel,.*', '^chrp,.*', '^chunghwa,.*', '^chuwi,.*', '^ciaa,.*', '^cirrus,.*', '^cloudengines,.*', '^cnm,.*', '^cnxt,.*', '^colorfly,.*', '^compulab,.*', '^coreriver,.*', '^corpro,.*', '^cortina,.*', '^cosmic,.*', '^crane,.*', '^creative,.*', '^crystalfontz,.*', '^csky,.*', '^csq,.*', '^cubietech,.*', '^cypress,.*', '^cznic,.*', '^dallas,.*', '^dataimage,.*', '^davicom,.*', '^dell,.*', '^delta,.*', '^denx,.*', '^devantech,.*', '^dfi,.*', '^dh,.*', '^difrnce,.*', '^digi,.*', '^digilent,.*', '^dioo,.*', '^dlc,.*', '^dlg,.*', '^dlink,.*', '^dmo,.*', '^domintech,.*', '^dongwoon,.*', '^dptechnics,.*', '^dragino,.*', '^dserve,.*', '^dynaimage,.*', '^ea,.*', '^ebs-systart,.*', '^ebv,.*', '^eckelmann,.*', '^edt,.*', '^eeti,.*', '^einfochips,.*', '^elan,.*', '^element14,.*', '^elgin,.*', '^elida,.*', '^elimo,.*', '^embest,.*', '^emlid,.*', '^emmicro,.*', '^empire-electronix,.*', '^emtrion,.*', '^endless,.*', '^ene,.*', '^energymicro,.*', '^engicam,.*', '^epcos,.*', '^epfl,.*', '^epson,.*', '^esp,.*', '^ est,.*', '^ettus,.*', '^eukrea,.*', '^everest,.*', '^everspin,.*', '^evervision,.*', '^exar,.*', '^excito,.*', '^ezchip,.*', '^facebook,.*', '^fairphone,.*', '^faraday,.*', '^fastrax,.*', '^fcs,.*', '^feixin,.*', '^feiyang,.*', '^fii,.*', '^firefly,.*', '^focaltech,.*', '^frida,.*', '^friendlyarm,.*', '^fsl,.*', '^fujitsu,.*', '^gardena,.*', '^gateworks,.*', '^gcw,.*', '^ge,.*', '^geekbuying,.*', '^gef,.*', '^gemei,.*', '^geniatech,.*', '^giantec,.*', '^giantplus,.*', '^globalscale,.*', '^globaltop,.*', '^gmt,.*', '^goodix,.*', '^google,.*', '^grinn,.*', '^grmn,.*', '^gumstix,.*', '^gw,.*', '^hannstar,.*', '^haoyu,.*', '^hardkernel,.*', '^hideep,.*', '^himax,.*', '^hirschmann,.*', '^hisilicon,.*', '^hit,.*', '^hitex,.*', '^holt,.*', '^holtek,.*', '^honestar,.*', '^honeywell,.*', '^hoperun,.*', '^hp,.*', '^hsg,.*', '^hugsun,.*', '^hwacom,.*', '^hydis,.*', '^hyundai,.*', '^i2se,.*', '^ibm,.*', '^icplus,.*', '^idt,.*', '^ifi,.*', '^ilitek,.*', '^img,.*', '^imi,.*', '^incircuit,.*', '^i net-tek,.*', '^infineon,.*', '^inforce,.*', '^ingenic,.*', '^innolux,.*', '^inside-secure,.*', '^inspur,.*', '^intel,.*', '^intercontrol,.*', '^invensense,.*', '^inversepath,.*', '^iom,.*', '^isee,.*', '^isil,.*', '^issi,.*', '^ite,.*', '^itead,.*', '^ivo,.*', '^iwave,.*', '^jdi,.*', '^jedec,.*', '^jesurun,.*', '^jianda,.*', '^kam,.*', '^karo,.*', '^keithkoep,.*', '^keymile,.*', '^khadas,.*', '^kiebackpeter,.*', '^kinetic,.*', '^kingdisplay,.*', '^kingnovel,.*', '^kionix,.*', '^kobo,.*', '^kobol,.*', '^koe,.*', '^kontron,.*', '^kosagi,.*', '^kyo,.*', '^lacie,.*', '^laird,.*', '^lamobo,.*', '^lantiq,.*', '^lattice,.*', '^leadtek,.*', '^leez,.*', '^lego,.*', '^lemaker,.*', '^lenovo,.*', '^lg,.*', '^lgphilips,.*', '^libretech,.*', '^licheepi,.*', '^linaro,.*', '^linksprite,.*', '^linksys,.*', '^linutronix,.*', '^linux,.*', '^linx,.*', '^litex,.*', '^lltc,.*', '^logicpd,.*', '^logictechno,.*', '^longcheer,.*', '^lontium,.*', '^loongson,.*', '^lsi,.*', '^lwn,.*', '^lxa,.*', '^macnica,.*' , '^mantix,.*', '^mapleboard,.*', '^marvell,.*', '^maxbotix,.*', '^maxim,.*', '^mbvl,.*', '^mcube,.*', '^meas,.*', '^mecer,.*', '^mediatek,.*', '^megachips,.*', '^mele,.*', '^melexis,.*', '^melfas,.*', '^mellanox,.*', '^memsic,.*', '^menlo,.*', '^mentor,.*', '^meraki,.*', '^merrii,.*', '^micrel,.*', '^microchip,.*', '^microcrystal,.*', '^micron,.*', '^microsoft,.*', '^microsys,.*', '^mikroe,.*', '^mikrotik,.*', '^miniand,.*', '^minix,.*', '^miramems,.*', '^mitsubishi,.*', '^modtronix,.*', '^mosaixtech,.*', '^motorola,.*', '^moxa,.*', '^mpl,.*', '^mps,.*', '^mqmaker,.*', '^mrvl,.*', '^mscc,.*', '^msi,.*', '^mstar,.*', '^mti,.*', '^multi-inno,.*', '^mundoreader,.*', '^murata,.*', '^mxicy,.*', '^myir,.*', '^national,.*', '^nec,.*', '^neonode,.*', '^netgear,.*', '^netlogic,.*', '^netron-dy,.*', '^netxeon,.*', '^neweast,.*', '^newhaven,.*', '^nexbox,.*', '^nextthing,.*', '^ni,.*', '^nintendo,.*', '^nlt,.*', '^nokia,.*', '^nordic,.*', '^novtech,.*', '^nutsboard,.*', '^nuvoton,.*', '^nvd,. *', '^nvidia,.*', '^nxp,.*', '^oceanic,.*', '^oct,.*', '^okaya,.*', '^oki,.*', '^olimex,.*', '^olpc,.*', '^onion,.*', '^onnn,.*', '^ontat,.*', '^opalkelly,.*', '^opencores,.*', '^openrisc,.*', '^option,.*', '^oranth,.*', '^orisetech,.*', '^ortustech,.*', '^osddisplays,.*', '^ouya,.*', '^overkiz,.*', '^ovti,.*', '^oxsemi,.*', '^ozzmaker,.*', '^panasonic,.*', '^parade,.*', '^parallax,.*', '^pda,.*', '^pericom,.*', '^pervasive,.*', '^phicomm,.*', '^phytec,.*', '^picochip,.*', '^pine64,.*', '^pineriver,.*', '^pixcir,.*', '^plantower,.*', '^plathome,.*', '^plda,.*', '^plx,.*', '^pni,.*', '^pocketbook,.*', '^polaroid,.*', '^portwell,.*', '^poslab,.*', '^pov,.*', '^powertip,.*', '^powervr,.*', '^primux,.*', '^probox2,.*', '^prt,.*', '^pulsedlight,.*', '^purism,.*', '^qca,.*', '^qcom,.*', '^qemu,.*', '^qi,.*', '^qiaodian,.*', '^qihua,.*', '^qnap,.*', '^radxa,.*', '^raidsonic,.*', '^ralink,.*', '^ramtron,.*', '^raspberrypi,.*', '^raydium,.*', '^rda,.*', '^realtek,.*', '^renesas,.*', '^rervis ion,.*', '^revotics,.*', '^rex,.*', '^richtek,.*', '^ricoh,.*', '^rikomagic,.*', '^riot,.*', '^riscv,.*', '^rockchip,.*', '^rocktech,.*', '^rohm,.*', '^ronbo,.*', '^roofull,.*', '^roseapplepi,.*', '^samsung,.*', '^samtec,.*', '^sancloud,.*', '^sandisk,.*', '^satoz,.*', '^sbs,.*', '^schindler,.*', '^seagate,.*', '^seeed,.*', '^seirobotics,.*', '^semtech,.*', '^sensirion,.*', '^sensortek,.*', '^sff,.*', '^sgd,.*', '^sgmicro,.*', '^sgx,.*', '^sharp,.*', '^shimafuji,.*', '^shiratech,.*', '^si-en,.*', '^si-linux,.*', '^sifive,.*', '^sigma,.*', '^sii,.*', '^sil,.*', '^silabs,.*', '^silead,.*', '^silergy,.*', '^silex-insight,.*', '^siliconmitus,.*', '^simtek,.*', '^sinlinx,.*', '^sinovoip,.*', '^sipeed,.*', '^sirf,.*', '^sis,.*', '^sitronix,.*', '^skyworks,.*', '^smartlabs,.*', '^smsc,.*', '^snps,.*', '^sochip,.*', '^socionext,.*', '^solidrun,.*', '^solomon,.*', '^sony,.*', '^spansion,.*', '^sprd,.*', '^sst,.*', '^sstar,.*', '^st,.*', '^st-ericsson,.*', '^starry,.*', '^startek,.*', '^ste,. *', '^stericsson,.*', '^summit,.*', '^sunchip,.*', '^swir,.*', '^syna,.*', '^synology,.*', '^tbs,.*', '^tbs-biometrics,.*', '^tcg,.*', '^tcl,.*', '^tdo,.*', '^technexion,.*', '^technologic,.*', '^techstar,.*', '^tempo,.*', '^terasic,.*', '^tfc,.*', '^thine,.*', '^thingyjp,.*', '^ti,.*', '^tianma,.*', '^tlm,.*', '^tmt,.*', '^topeet,.*', '^toppoly,.*', '^topwise,.*', '^toradex,.*', '^toshiba,.*', '^toumaz,.*', '^tpk,.*', '^tplink,.*', '^tpo,.*', '^tq,.*', '^tronfy,.*', '^tronsmart,.*', '^truly,.*', '^tsd,.*', '^tyan,.*', '^u-blox,.*', '^u-boot,.*', '^ubnt,.*', '^ucrobotics,.*', '^udoo,.*', '^ugoos,.*', '^uniwest,.*', '^upisemi,.*', '^urt,.*', '^usi,.*', '^utoo,.*', '^v3,.*', '^vaisala,.*', '^vamrs,.*', '^variscite,.*', '^vdl,.*', '^via,.*', '^videostrong,.*', '^virtio,.*', '^virtual,.*', '^vishay,.*', '^visionox,.*', '^vitesse,.*', '^vivante,.*', '^vocore,.*', '^voipac,.*', '^vot,.*', '^vxt,.*', '^wand,.*', '^waveshare,.*', '^wd,.*', '^we,.*', '^wetek,.*', '^wexler,.*', '^whwave,.*', '^wi2wi,.*', '^winbond,.*', '^winstar,.*', '^wits,.*', '^wlf,.*', '^wm,.*', '^wobo,.*', '^x-powers,.*', '^xes,.*', '^xiaomi,.*', '^xillybus,.*', '^xingbangda,.*', '^xinpeng,.*', '^xiphera,.*', '^xlnx,.*', '^xnano,.*', '^xunlong,.*', '^xylon,.*', '^yes-optoelectronics,.*', '^ylm,.*', '^yna,.*', '^yones-toptech,.*', '^ysoft,.*', '^zarlink,.*', '^zealz,.*', '^zeitec,.*', '^zidoo,.*', '^zii,.*', '^zinitix,.*', '^zkmagic,.*', '^zte,.*', '^zyxel,.*' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/vendor-prefixes.yaml See https://patchwork.ozlabs.org/patch/1420616 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting 2020-12-25 11:01 ` Xin Ji @ 2020-12-27 16:56 ` Rob Herring -1 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2020-12-27 16:56 UTC (permalink / raw) To: Xin Ji Cc: Hsin-Yi Wang, Sam Ravnborg, David Airlie, devicetree, Nicolas Boichat, Mark Brown, Sheng Pan, linux-kernel, Laurent Pinchart, dri-devel, Daniel Vetter, Rob Herring, Maxime Ripard, Ricardo Cañuelo On Fri, 25 Dec 2020 19:01:09 +0800, Xin Ji wrote: > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > swing setting for adjusting DP tx PHY swing > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > --- > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: anx,swing-setting: 'anyOf' conditional failed, one must be fixed: [[0, 20], [1, 84], [2, 100], [3, 116], [4, 41], [5, 123], [6, 119], [7, 91], [8, 127], [12, 32], [13, 96], [16, 96], [18, 64], [19, 96], [20, 20], [21, 84], [22, 100], [23, 116], [24, 41], [25, 123], [26, 119], [27, 91], [28, 127], [32, 32], [33, 96], [36, 96], [38, 64], [39, 96]] is too long [0, 20] is too long [1, 84] is too long [2, 100] is too long [3, 116] is too long [4, 41] is too long [5, 123] is too long [6, 119] is too long [7, 91] is too long [8, 127] is too long [12, 32] is too long [13, 96] is too long [16, 96] is too long [18, 64] is too long [19, 96] is too long [20, 20] is too long [21, 84] is too long [22, 100] is too long [23, 116] is too long [24, 41] is too long [25, 123] is too long [26, 119] is too long [27, 91] is too long [28, 127] is too long [32, 32] is too long [33, 96] is too long [36, 96] is too long [38, 64] is too long [39, 96] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: 'anx,mipi-dpi-in', 'anx,swing-setting' do not match any of the regexes: '^#.*', '^(at25|bm|devbus|dmacap|dsa|exynos|fsi[ab]|gpio-fan|gpio-key|gpio|gpmc|hdmi|i2c-gpio),.*', '^(keypad|m25p|max8952|max8997|max8998|mpmc),.*', '^(pinctrl-single|#pinctrl-single|PowerPC),.*', '^(pl022|pxa-mmc|rcar_sound|rotary-encoder|s5m8767|sdhci),.*', '^(simple-audio-card|st-plgpio|st-spics|ts),.*', '^70mai,.*', '^GEFanuc,.*', '^ORCL,.*', '^SUNW,.*', '^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$', '^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$', '^abb,.*', '^abilis,.*', '^abracon,.*', '^abt,.*', '^acer,.*', '^acme,.*', '^actions,.*', '^active-semi,.*', '^ad,.*', '^adafruit,.*', '^adapteva,.*', '^adaptrum,.*', '^adh,.*', '^adi,.*', '^advantech,.*', '^aeroflexgaisler,.*', '^al,.*', '^allegro,.*', '^allo,.*', '^allwinner,.*', '^alphascale,.*', '^alps,.*', '^alt,.*', '^altr,.*', '^amarula,.*', '^ amazon,.*', '^amcc,.*', '^amd,.*', '^amediatech,.*', '^amlogic,.*', '^ampere,.*', '^ampire,.*', '^ams,.*', '^amstaos,.*', '^analogix,.*', '^andestech,.*', '^anvo,.*', '^apm,.*', '^aptina,.*', '^arasan,.*', '^archermind,.*', '^arctic,.*', '^arcx,.*', '^aries,.*', '^arm,.*', '^armadeus,.*', '^arrow,.*', '^artesyn,.*', '^asahi-kasei,.*', '^asc,.*', '^aspeed,.*', '^asus,.*', '^atlas,.*', '^atmel,.*', '^auo,.*', '^auvidea,.*', '^avago,.*', '^avia,.*', '^avic,.*', '^avnet,.*', '^awinic,.*', '^axentia,.*', '^axis,.*', '^azoteq,.*', '^azw,.*', '^baikal,.*', '^bananapi,.*', '^beacon,.*', '^beagle,.*', '^bhf,.*', '^bitmain,.*', '^boe,.*', '^bosch,.*', '^boundary,.*', '^brcm,.*', '^broadmobi,.*', '^bticino,.*', '^buffalo,.*', '^bur,.*', '^calaosystems,.*', '^calxeda,.*', '^caninos,.*', '^capella,.*', '^cascoda,.*', '^catalyst,.*', '^cavium,.*', '^cdns,.*', '^cdtech,.*', '^cellwise,.*', '^ceva,.*', '^checkpoint,.*', '^chefree,.*', '^chipidea,.*', '^chipone,.*', '^chipspark,.*', '^chrontel,.*', '^chrp,.*', '^chunghwa,.*', '^chuwi,.*', '^ciaa,.*', '^cirrus,.*', '^cloudengines,.*', '^cnm,.*', '^cnxt,.*', '^colorfly,.*', '^compulab,.*', '^coreriver,.*', '^corpro,.*', '^cortina,.*', '^cosmic,.*', '^crane,.*', '^creative,.*', '^crystalfontz,.*', '^csky,.*', '^csq,.*', '^cubietech,.*', '^cypress,.*', '^cznic,.*', '^dallas,.*', '^dataimage,.*', '^davicom,.*', '^dell,.*', '^delta,.*', '^denx,.*', '^devantech,.*', '^dfi,.*', '^dh,.*', '^difrnce,.*', '^digi,.*', '^digilent,.*', '^dioo,.*', '^dlc,.*', '^dlg,.*', '^dlink,.*', '^dmo,.*', '^domintech,.*', '^dongwoon,.*', '^dptechnics,.*', '^dragino,.*', '^dserve,.*', '^dynaimage,.*', '^ea,.*', '^ebs-systart,.*', '^ebv,.*', '^eckelmann,.*', '^edt,.*', '^eeti,.*', '^einfochips,.*', '^elan,.*', '^element14,.*', '^elgin,.*', '^elida,.*', '^elimo,.*', '^embest,.*', '^emlid,.*', '^emmicro,.*', '^empire-electronix,.*', '^emtrion,.*', '^endless,.*', '^ene,.*', '^energymicro,.*', '^engicam,.*', '^epcos,.*', '^epfl,.*', '^epson,.*', '^esp,.*', '^ est,.*', '^ettus,.*', '^eukrea,.*', '^everest,.*', '^everspin,.*', '^evervision,.*', '^exar,.*', '^excito,.*', '^ezchip,.*', '^facebook,.*', '^fairphone,.*', '^faraday,.*', '^fastrax,.*', '^fcs,.*', '^feixin,.*', '^feiyang,.*', '^fii,.*', '^firefly,.*', '^focaltech,.*', '^frida,.*', '^friendlyarm,.*', '^fsl,.*', '^fujitsu,.*', '^gardena,.*', '^gateworks,.*', '^gcw,.*', '^ge,.*', '^geekbuying,.*', '^gef,.*', '^gemei,.*', '^geniatech,.*', '^giantec,.*', '^giantplus,.*', '^globalscale,.*', '^globaltop,.*', '^gmt,.*', '^goodix,.*', '^google,.*', '^grinn,.*', '^grmn,.*', '^gumstix,.*', '^gw,.*', '^hannstar,.*', '^haoyu,.*', '^hardkernel,.*', '^hideep,.*', '^himax,.*', '^hirschmann,.*', '^hisilicon,.*', '^hit,.*', '^hitex,.*', '^holt,.*', '^holtek,.*', '^honestar,.*', '^honeywell,.*', '^hoperun,.*', '^hp,.*', '^hsg,.*', '^hugsun,.*', '^hwacom,.*', '^hydis,.*', '^hyundai,.*', '^i2se,.*', '^ibm,.*', '^icplus,.*', '^idt,.*', '^ifi,.*', '^ilitek,.*', '^img,.*', '^imi,.*', '^incircuit,.*', '^i net-tek,.*', '^infineon,.*', '^inforce,.*', '^ingenic,.*', '^innolux,.*', '^inside-secure,.*', '^inspur,.*', '^intel,.*', '^intercontrol,.*', '^invensense,.*', '^inversepath,.*', '^iom,.*', '^isee,.*', '^isil,.*', '^issi,.*', '^ite,.*', '^itead,.*', '^ivo,.*', '^iwave,.*', '^jdi,.*', '^jedec,.*', '^jesurun,.*', '^jianda,.*', '^kam,.*', '^karo,.*', '^keithkoep,.*', '^keymile,.*', '^khadas,.*', '^kiebackpeter,.*', '^kinetic,.*', '^kingdisplay,.*', '^kingnovel,.*', '^kionix,.*', '^kobo,.*', '^kobol,.*', '^koe,.*', '^kontron,.*', '^kosagi,.*', '^kyo,.*', '^lacie,.*', '^laird,.*', '^lamobo,.*', '^lantiq,.*', '^lattice,.*', '^leadtek,.*', '^leez,.*', '^lego,.*', '^lemaker,.*', '^lenovo,.*', '^lg,.*', '^lgphilips,.*', '^libretech,.*', '^licheepi,.*', '^linaro,.*', '^linksprite,.*', '^linksys,.*', '^linutronix,.*', '^linux,.*', '^linx,.*', '^litex,.*', '^lltc,.*', '^logicpd,.*', '^logictechno,.*', '^longcheer,.*', '^lontium,.*', '^loongson,.*', '^lsi,.*', '^lwn,.*', '^lxa,.*', '^macnica,.*' , '^mantix,.*', '^mapleboard,.*', '^marvell,.*', '^maxbotix,.*', '^maxim,.*', '^mbvl,.*', '^mcube,.*', '^meas,.*', '^mecer,.*', '^mediatek,.*', '^megachips,.*', '^mele,.*', '^melexis,.*', '^melfas,.*', '^mellanox,.*', '^memsic,.*', '^menlo,.*', '^mentor,.*', '^meraki,.*', '^merrii,.*', '^micrel,.*', '^microchip,.*', '^microcrystal,.*', '^micron,.*', '^microsoft,.*', '^microsys,.*', '^mikroe,.*', '^mikrotik,.*', '^miniand,.*', '^minix,.*', '^miramems,.*', '^mitsubishi,.*', '^modtronix,.*', '^mosaixtech,.*', '^motorola,.*', '^moxa,.*', '^mpl,.*', '^mps,.*', '^mqmaker,.*', '^mrvl,.*', '^mscc,.*', '^msi,.*', '^mstar,.*', '^mti,.*', '^multi-inno,.*', '^mundoreader,.*', '^murata,.*', '^mxicy,.*', '^myir,.*', '^national,.*', '^nec,.*', '^neonode,.*', '^netgear,.*', '^netlogic,.*', '^netron-dy,.*', '^netxeon,.*', '^neweast,.*', '^newhaven,.*', '^nexbox,.*', '^nextthing,.*', '^ni,.*', '^nintendo,.*', '^nlt,.*', '^nokia,.*', '^nordic,.*', '^novtech,.*', '^nutsboard,.*', '^nuvoton,.*', '^nvd,. *', '^nvidia,.*', '^nxp,.*', '^oceanic,.*', '^oct,.*', '^okaya,.*', '^oki,.*', '^olimex,.*', '^olpc,.*', '^onion,.*', '^onnn,.*', '^ontat,.*', '^opalkelly,.*', '^opencores,.*', '^openrisc,.*', '^option,.*', '^oranth,.*', '^orisetech,.*', '^ortustech,.*', '^osddisplays,.*', '^ouya,.*', '^overkiz,.*', '^ovti,.*', '^oxsemi,.*', '^ozzmaker,.*', '^panasonic,.*', '^parade,.*', '^parallax,.*', '^pda,.*', '^pericom,.*', '^pervasive,.*', '^phicomm,.*', '^phytec,.*', '^picochip,.*', '^pine64,.*', '^pineriver,.*', '^pixcir,.*', '^plantower,.*', '^plathome,.*', '^plda,.*', '^plx,.*', '^pni,.*', '^pocketbook,.*', '^polaroid,.*', '^portwell,.*', '^poslab,.*', '^pov,.*', '^powertip,.*', '^powervr,.*', '^primux,.*', '^probox2,.*', '^prt,.*', '^pulsedlight,.*', '^purism,.*', '^qca,.*', '^qcom,.*', '^qemu,.*', '^qi,.*', '^qiaodian,.*', '^qihua,.*', '^qnap,.*', '^radxa,.*', '^raidsonic,.*', '^ralink,.*', '^ramtron,.*', '^raspberrypi,.*', '^raydium,.*', '^rda,.*', '^realtek,.*', '^renesas,.*', '^rervis ion,.*', '^revotics,.*', '^rex,.*', '^richtek,.*', '^ricoh,.*', '^rikomagic,.*', '^riot,.*', '^riscv,.*', '^rockchip,.*', '^rocktech,.*', '^rohm,.*', '^ronbo,.*', '^roofull,.*', '^roseapplepi,.*', '^samsung,.*', '^samtec,.*', '^sancloud,.*', '^sandisk,.*', '^satoz,.*', '^sbs,.*', '^schindler,.*', '^seagate,.*', '^seeed,.*', '^seirobotics,.*', '^semtech,.*', '^sensirion,.*', '^sensortek,.*', '^sff,.*', '^sgd,.*', '^sgmicro,.*', '^sgx,.*', '^sharp,.*', '^shimafuji,.*', '^shiratech,.*', '^si-en,.*', '^si-linux,.*', '^sifive,.*', '^sigma,.*', '^sii,.*', '^sil,.*', '^silabs,.*', '^silead,.*', '^silergy,.*', '^silex-insight,.*', '^siliconmitus,.*', '^simtek,.*', '^sinlinx,.*', '^sinovoip,.*', '^sipeed,.*', '^sirf,.*', '^sis,.*', '^sitronix,.*', '^skyworks,.*', '^smartlabs,.*', '^smsc,.*', '^snps,.*', '^sochip,.*', '^socionext,.*', '^solidrun,.*', '^solomon,.*', '^sony,.*', '^spansion,.*', '^sprd,.*', '^sst,.*', '^sstar,.*', '^st,.*', '^st-ericsson,.*', '^starry,.*', '^startek,.*', '^ste,. *', '^stericsson,.*', '^summit,.*', '^sunchip,.*', '^swir,.*', '^syna,.*', '^synology,.*', '^tbs,.*', '^tbs-biometrics,.*', '^tcg,.*', '^tcl,.*', '^tdo,.*', '^technexion,.*', '^technologic,.*', '^techstar,.*', '^tempo,.*', '^terasic,.*', '^tfc,.*', '^thine,.*', '^thingyjp,.*', '^ti,.*', '^tianma,.*', '^tlm,.*', '^tmt,.*', '^topeet,.*', '^toppoly,.*', '^topwise,.*', '^toradex,.*', '^toshiba,.*', '^toumaz,.*', '^tpk,.*', '^tplink,.*', '^tpo,.*', '^tq,.*', '^tronfy,.*', '^tronsmart,.*', '^truly,.*', '^tsd,.*', '^tyan,.*', '^u-blox,.*', '^u-boot,.*', '^ubnt,.*', '^ucrobotics,.*', '^udoo,.*', '^ugoos,.*', '^uniwest,.*', '^upisemi,.*', '^urt,.*', '^usi,.*', '^utoo,.*', '^v3,.*', '^vaisala,.*', '^vamrs,.*', '^variscite,.*', '^vdl,.*', '^via,.*', '^videostrong,.*', '^virtio,.*', '^virtual,.*', '^vishay,.*', '^visionox,.*', '^vitesse,.*', '^vivante,.*', '^vocore,.*', '^voipac,.*', '^vot,.*', '^vxt,.*', '^wand,.*', '^waveshare,.*', '^wd,.*', '^we,.*', '^wetek,.*', '^wexler,.*', '^whwave,.*', '^wi2wi,.*', '^winbond,.*', '^winstar,.*', '^wits,.*', '^wlf,.*', '^wm,.*', '^wobo,.*', '^x-powers,.*', '^xes,.*', '^xiaomi,.*', '^xillybus,.*', '^xingbangda,.*', '^xinpeng,.*', '^xiphera,.*', '^xlnx,.*', '^xnano,.*', '^xunlong,.*', '^xylon,.*', '^yes-optoelectronics,.*', '^ylm,.*', '^yna,.*', '^yones-toptech,.*', '^ysoft,.*', '^zarlink,.*', '^zealz,.*', '^zeitec,.*', '^zidoo,.*', '^zii,.*', '^zinitix,.*', '^zkmagic,.*', '^zte,.*', '^zyxel,.*' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/vendor-prefixes.yaml See https://patchwork.ozlabs.org/patch/1420616 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting @ 2020-12-27 16:56 ` Rob Herring 0 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2020-12-27 16:56 UTC (permalink / raw) To: Xin Ji Cc: devicetree, Laurent Pinchart, Nicolas Boichat, David Airlie, Ricardo Cañuelo, linux-kernel, dri-devel, Rob Herring, Mark Brown, Sheng Pan, Hsin-Yi Wang, Sam Ravnborg On Fri, 25 Dec 2020 19:01:09 +0800, Xin Ji wrote: > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > swing setting for adjusting DP tx PHY swing > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > --- > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: anx,swing-setting: 'anyOf' conditional failed, one must be fixed: [[0, 20], [1, 84], [2, 100], [3, 116], [4, 41], [5, 123], [6, 119], [7, 91], [8, 127], [12, 32], [13, 96], [16, 96], [18, 64], [19, 96], [20, 20], [21, 84], [22, 100], [23, 116], [24, 41], [25, 123], [26, 119], [27, 91], [28, 127], [32, 32], [33, 96], [36, 96], [38, 64], [39, 96]] is too long [0, 20] is too long [1, 84] is too long [2, 100] is too long [3, 116] is too long [4, 41] is too long [5, 123] is too long [6, 119] is too long [7, 91] is too long [8, 127] is too long [12, 32] is too long [13, 96] is too long [16, 96] is too long [18, 64] is too long [19, 96] is too long [20, 20] is too long [21, 84] is too long [22, 100] is too long [23, 116] is too long [24, 41] is too long [25, 123] is too long [26, 119] is too long [27, 91] is too long [28, 127] is too long [32, 32] is too long [33, 96] is too long [36, 96] is too long [38, 64] is too long [39, 96] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: 'anx,mipi-dpi-in', 'anx,swing-setting' do not match any of the regexes: '^#.*', '^(at25|bm|devbus|dmacap|dsa|exynos|fsi[ab]|gpio-fan|gpio-key|gpio|gpmc|hdmi|i2c-gpio),.*', '^(keypad|m25p|max8952|max8997|max8998|mpmc),.*', '^(pinctrl-single|#pinctrl-single|PowerPC),.*', '^(pl022|pxa-mmc|rcar_sound|rotary-encoder|s5m8767|sdhci),.*', '^(simple-audio-card|st-plgpio|st-spics|ts),.*', '^70mai,.*', '^GEFanuc,.*', '^ORCL,.*', '^SUNW,.*', '^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$', '^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$', '^abb,.*', '^abilis,.*', '^abracon,.*', '^abt,.*', '^acer,.*', '^acme,.*', '^actions,.*', '^active-semi,.*', '^ad,.*', '^adafruit,.*', '^adapteva,.*', '^adaptrum,.*', '^adh,.*', '^adi,.*', '^advantech,.*', '^aeroflexgaisler,.*', '^al,.*', '^allegro,.*', '^allo,.*', '^allwinner,.*', '^alphascale,.*', '^alps,.*', '^alt,.*', '^altr,.*', '^amarula,.*', '^ amazon,.*', '^amcc,.*', '^amd,.*', '^amediatech,.*', '^amlogic,.*', '^ampere,.*', '^ampire,.*', '^ams,.*', '^amstaos,.*', '^analogix,.*', '^andestech,.*', '^anvo,.*', '^apm,.*', '^aptina,.*', '^arasan,.*', '^archermind,.*', '^arctic,.*', '^arcx,.*', '^aries,.*', '^arm,.*', '^armadeus,.*', '^arrow,.*', '^artesyn,.*', '^asahi-kasei,.*', '^asc,.*', '^aspeed,.*', '^asus,.*', '^atlas,.*', '^atmel,.*', '^auo,.*', '^auvidea,.*', '^avago,.*', '^avia,.*', '^avic,.*', '^avnet,.*', '^awinic,.*', '^axentia,.*', '^axis,.*', '^azoteq,.*', '^azw,.*', '^baikal,.*', '^bananapi,.*', '^beacon,.*', '^beagle,.*', '^bhf,.*', '^bitmain,.*', '^boe,.*', '^bosch,.*', '^boundary,.*', '^brcm,.*', '^broadmobi,.*', '^bticino,.*', '^buffalo,.*', '^bur,.*', '^calaosystems,.*', '^calxeda,.*', '^caninos,.*', '^capella,.*', '^cascoda,.*', '^catalyst,.*', '^cavium,.*', '^cdns,.*', '^cdtech,.*', '^cellwise,.*', '^ceva,.*', '^checkpoint,.*', '^chefree,.*', '^chipidea,.*', '^chipone,.*', '^chipspark,.*', '^chrontel,.*', '^chrp,.*', '^chunghwa,.*', '^chuwi,.*', '^ciaa,.*', '^cirrus,.*', '^cloudengines,.*', '^cnm,.*', '^cnxt,.*', '^colorfly,.*', '^compulab,.*', '^coreriver,.*', '^corpro,.*', '^cortina,.*', '^cosmic,.*', '^crane,.*', '^creative,.*', '^crystalfontz,.*', '^csky,.*', '^csq,.*', '^cubietech,.*', '^cypress,.*', '^cznic,.*', '^dallas,.*', '^dataimage,.*', '^davicom,.*', '^dell,.*', '^delta,.*', '^denx,.*', '^devantech,.*', '^dfi,.*', '^dh,.*', '^difrnce,.*', '^digi,.*', '^digilent,.*', '^dioo,.*', '^dlc,.*', '^dlg,.*', '^dlink,.*', '^dmo,.*', '^domintech,.*', '^dongwoon,.*', '^dptechnics,.*', '^dragino,.*', '^dserve,.*', '^dynaimage,.*', '^ea,.*', '^ebs-systart,.*', '^ebv,.*', '^eckelmann,.*', '^edt,.*', '^eeti,.*', '^einfochips,.*', '^elan,.*', '^element14,.*', '^elgin,.*', '^elida,.*', '^elimo,.*', '^embest,.*', '^emlid,.*', '^emmicro,.*', '^empire-electronix,.*', '^emtrion,.*', '^endless,.*', '^ene,.*', '^energymicro,.*', '^engicam,.*', '^epcos,.*', '^epfl,.*', '^epson,.*', '^esp,.*', '^ est,.*', '^ettus,.*', '^eukrea,.*', '^everest,.*', '^everspin,.*', '^evervision,.*', '^exar,.*', '^excito,.*', '^ezchip,.*', '^facebook,.*', '^fairphone,.*', '^faraday,.*', '^fastrax,.*', '^fcs,.*', '^feixin,.*', '^feiyang,.*', '^fii,.*', '^firefly,.*', '^focaltech,.*', '^frida,.*', '^friendlyarm,.*', '^fsl,.*', '^fujitsu,.*', '^gardena,.*', '^gateworks,.*', '^gcw,.*', '^ge,.*', '^geekbuying,.*', '^gef,.*', '^gemei,.*', '^geniatech,.*', '^giantec,.*', '^giantplus,.*', '^globalscale,.*', '^globaltop,.*', '^gmt,.*', '^goodix,.*', '^google,.*', '^grinn,.*', '^grmn,.*', '^gumstix,.*', '^gw,.*', '^hannstar,.*', '^haoyu,.*', '^hardkernel,.*', '^hideep,.*', '^himax,.*', '^hirschmann,.*', '^hisilicon,.*', '^hit,.*', '^hitex,.*', '^holt,.*', '^holtek,.*', '^honestar,.*', '^honeywell,.*', '^hoperun,.*', '^hp,.*', '^hsg,.*', '^hugsun,.*', '^hwacom,.*', '^hydis,.*', '^hyundai,.*', '^i2se,.*', '^ibm,.*', '^icplus,.*', '^idt,.*', '^ifi,.*', '^ilitek,.*', '^img,.*', '^imi,.*', '^incircuit,.*', '^i net-tek,.*', '^infineon,.*', '^inforce,.*', '^ingenic,.*', '^innolux,.*', '^inside-secure,.*', '^inspur,.*', '^intel,.*', '^intercontrol,.*', '^invensense,.*', '^inversepath,.*', '^iom,.*', '^isee,.*', '^isil,.*', '^issi,.*', '^ite,.*', '^itead,.*', '^ivo,.*', '^iwave,.*', '^jdi,.*', '^jedec,.*', '^jesurun,.*', '^jianda,.*', '^kam,.*', '^karo,.*', '^keithkoep,.*', '^keymile,.*', '^khadas,.*', '^kiebackpeter,.*', '^kinetic,.*', '^kingdisplay,.*', '^kingnovel,.*', '^kionix,.*', '^kobo,.*', '^kobol,.*', '^koe,.*', '^kontron,.*', '^kosagi,.*', '^kyo,.*', '^lacie,.*', '^laird,.*', '^lamobo,.*', '^lantiq,.*', '^lattice,.*', '^leadtek,.*', '^leez,.*', '^lego,.*', '^lemaker,.*', '^lenovo,.*', '^lg,.*', '^lgphilips,.*', '^libretech,.*', '^licheepi,.*', '^linaro,.*', '^linksprite,.*', '^linksys,.*', '^linutronix,.*', '^linux,.*', '^linx,.*', '^litex,.*', '^lltc,.*', '^logicpd,.*', '^logictechno,.*', '^longcheer,.*', '^lontium,.*', '^loongson,.*', '^lsi,.*', '^lwn,.*', '^lxa,.*', '^macnica,.*' , '^mantix,.*', '^mapleboard,.*', '^marvell,.*', '^maxbotix,.*', '^maxim,.*', '^mbvl,.*', '^mcube,.*', '^meas,.*', '^mecer,.*', '^mediatek,.*', '^megachips,.*', '^mele,.*', '^melexis,.*', '^melfas,.*', '^mellanox,.*', '^memsic,.*', '^menlo,.*', '^mentor,.*', '^meraki,.*', '^merrii,.*', '^micrel,.*', '^microchip,.*', '^microcrystal,.*', '^micron,.*', '^microsoft,.*', '^microsys,.*', '^mikroe,.*', '^mikrotik,.*', '^miniand,.*', '^minix,.*', '^miramems,.*', '^mitsubishi,.*', '^modtronix,.*', '^mosaixtech,.*', '^motorola,.*', '^moxa,.*', '^mpl,.*', '^mps,.*', '^mqmaker,.*', '^mrvl,.*', '^mscc,.*', '^msi,.*', '^mstar,.*', '^mti,.*', '^multi-inno,.*', '^mundoreader,.*', '^murata,.*', '^mxicy,.*', '^myir,.*', '^national,.*', '^nec,.*', '^neonode,.*', '^netgear,.*', '^netlogic,.*', '^netron-dy,.*', '^netxeon,.*', '^neweast,.*', '^newhaven,.*', '^nexbox,.*', '^nextthing,.*', '^ni,.*', '^nintendo,.*', '^nlt,.*', '^nokia,.*', '^nordic,.*', '^novtech,.*', '^nutsboard,.*', '^nuvoton,.*', '^nvd,. *', '^nvidia,.*', '^nxp,.*', '^oceanic,.*', '^oct,.*', '^okaya,.*', '^oki,.*', '^olimex,.*', '^olpc,.*', '^onion,.*', '^onnn,.*', '^ontat,.*', '^opalkelly,.*', '^opencores,.*', '^openrisc,.*', '^option,.*', '^oranth,.*', '^orisetech,.*', '^ortustech,.*', '^osddisplays,.*', '^ouya,.*', '^overkiz,.*', '^ovti,.*', '^oxsemi,.*', '^ozzmaker,.*', '^panasonic,.*', '^parade,.*', '^parallax,.*', '^pda,.*', '^pericom,.*', '^pervasive,.*', '^phicomm,.*', '^phytec,.*', '^picochip,.*', '^pine64,.*', '^pineriver,.*', '^pixcir,.*', '^plantower,.*', '^plathome,.*', '^plda,.*', '^plx,.*', '^pni,.*', '^pocketbook,.*', '^polaroid,.*', '^portwell,.*', '^poslab,.*', '^pov,.*', '^powertip,.*', '^powervr,.*', '^primux,.*', '^probox2,.*', '^prt,.*', '^pulsedlight,.*', '^purism,.*', '^qca,.*', '^qcom,.*', '^qemu,.*', '^qi,.*', '^qiaodian,.*', '^qihua,.*', '^qnap,.*', '^radxa,.*', '^raidsonic,.*', '^ralink,.*', '^ramtron,.*', '^raspberrypi,.*', '^raydium,.*', '^rda,.*', '^realtek,.*', '^renesas,.*', '^rervis ion,.*', '^revotics,.*', '^rex,.*', '^richtek,.*', '^ricoh,.*', '^rikomagic,.*', '^riot,.*', '^riscv,.*', '^rockchip,.*', '^rocktech,.*', '^rohm,.*', '^ronbo,.*', '^roofull,.*', '^roseapplepi,.*', '^samsung,.*', '^samtec,.*', '^sancloud,.*', '^sandisk,.*', '^satoz,.*', '^sbs,.*', '^schindler,.*', '^seagate,.*', '^seeed,.*', '^seirobotics,.*', '^semtech,.*', '^sensirion,.*', '^sensortek,.*', '^sff,.*', '^sgd,.*', '^sgmicro,.*', '^sgx,.*', '^sharp,.*', '^shimafuji,.*', '^shiratech,.*', '^si-en,.*', '^si-linux,.*', '^sifive,.*', '^sigma,.*', '^sii,.*', '^sil,.*', '^silabs,.*', '^silead,.*', '^silergy,.*', '^silex-insight,.*', '^siliconmitus,.*', '^simtek,.*', '^sinlinx,.*', '^sinovoip,.*', '^sipeed,.*', '^sirf,.*', '^sis,.*', '^sitronix,.*', '^skyworks,.*', '^smartlabs,.*', '^smsc,.*', '^snps,.*', '^sochip,.*', '^socionext,.*', '^solidrun,.*', '^solomon,.*', '^sony,.*', '^spansion,.*', '^sprd,.*', '^sst,.*', '^sstar,.*', '^st,.*', '^st-ericsson,.*', '^starry,.*', '^startek,.*', '^ste,. *', '^stericsson,.*', '^summit,.*', '^sunchip,.*', '^swir,.*', '^syna,.*', '^synology,.*', '^tbs,.*', '^tbs-biometrics,.*', '^tcg,.*', '^tcl,.*', '^tdo,.*', '^technexion,.*', '^technologic,.*', '^techstar,.*', '^tempo,.*', '^terasic,.*', '^tfc,.*', '^thine,.*', '^thingyjp,.*', '^ti,.*', '^tianma,.*', '^tlm,.*', '^tmt,.*', '^topeet,.*', '^toppoly,.*', '^topwise,.*', '^toradex,.*', '^toshiba,.*', '^toumaz,.*', '^tpk,.*', '^tplink,.*', '^tpo,.*', '^tq,.*', '^tronfy,.*', '^tronsmart,.*', '^truly,.*', '^tsd,.*', '^tyan,.*', '^u-blox,.*', '^u-boot,.*', '^ubnt,.*', '^ucrobotics,.*', '^udoo,.*', '^ugoos,.*', '^uniwest,.*', '^upisemi,.*', '^urt,.*', '^usi,.*', '^utoo,.*', '^v3,.*', '^vaisala,.*', '^vamrs,.*', '^variscite,.*', '^vdl,.*', '^via,.*', '^videostrong,.*', '^virtio,.*', '^virtual,.*', '^vishay,.*', '^visionox,.*', '^vitesse,.*', '^vivante,.*', '^vocore,.*', '^voipac,.*', '^vot,.*', '^vxt,.*', '^wand,.*', '^waveshare,.*', '^wd,.*', '^we,.*', '^wetek,.*', '^wexler,.*', '^whwave,.*', '^wi2wi,.*', '^winbond,.*', '^winstar,.*', '^wits,.*', '^wlf,.*', '^wm,.*', '^wobo,.*', '^x-powers,.*', '^xes,.*', '^xiaomi,.*', '^xillybus,.*', '^xingbangda,.*', '^xinpeng,.*', '^xiphera,.*', '^xlnx,.*', '^xnano,.*', '^xunlong,.*', '^xylon,.*', '^yes-optoelectronics,.*', '^ylm,.*', '^yna,.*', '^yones-toptech,.*', '^ysoft,.*', '^zarlink,.*', '^zealz,.*', '^zeitec,.*', '^zidoo,.*', '^zii,.*', '^zinitix,.*', '^zkmagic,.*', '^zte,.*', '^zyxel,.*' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/vendor-prefixes.yaml See https://patchwork.ozlabs.org/patch/1420616 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting 2020-12-27 16:56 ` Rob Herring @ 2020-12-29 5:55 ` Xin Ji -1 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-29 5:55 UTC (permalink / raw) To: Rob Herring Cc: David Airlie, Nicolas Boichat, Hsin-Yi Wang, Daniel Vetter, Sam Ravnborg, Laurent Pinchart, Maxime Ripard, Mark Brown, Ricardo Cañuelo, dri-devel, devicetree, Sheng Pan, linux-kernel On Sun, Dec 27, 2020 at 09:56:21AM -0700, Rob Herring wrote: > On Fri, 25 Dec 2020 19:01:09 +0800, Xin Ji wrote: > > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > > swing setting for adjusting DP tx PHY swing > > > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > > --- > > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > My bot found errors running 'make dt_binding_check' on your patch: Hi Rob Herring, I'll fix this issue in the next serial, thanks! > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: anx,swing-setting: 'anyOf' conditional failed, one must be fixed: > [[0, 20], [1, 84], [2, 100], [3, 116], [4, 41], [5, 123], [6, 119], [7, 91], [8, 127], [12, 32], [13, 96], [16, 96], [18, 64], [19, 96], [20, 20], [21, 84], [22, 100], [23, 116], [24, 41], [25, 123], [26, 119], [27, 91], [28, 127], [32, 32], [33, 96], [36, 96], [38, 64], [39, 96]] is too long > [0, 20] is too long > [1, 84] is too long > [2, 100] is too long > [3, 116] is too long > [4, 41] is too long > [5, 123] is too long > [6, 119] is too long > [7, 91] is too long > [8, 127] is too long > [12, 32] is too long > [13, 96] is too long > [16, 96] is too long > [18, 64] is too long > [19, 96] is too long > [20, 20] is too long > [21, 84] is too long > [22, 100] is too long > [23, 116] is too long > [24, 41] is too long > [25, 123] is too long > [26, 119] is too long > [27, 91] is too long > [28, 127] is too long > [32, 32] is too long > [33, 96] is too long > [36, 96] is too long > [38, 64] is too long > [39, 96] is too long > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: 'anx,mipi-dpi-in', 'anx,swing-setting' do not match any of the regexes: '^#.*', '^(at25|bm|devbus|dmacap|dsa|exynos|fsi[ab]|gpio-fan|gpio-key|gpio|gpmc|hdmi|i2c-gpio),.*', '^(keypad|m25p|max8952|max8997|max8998|mpmc),.*', '^(pinctrl-single|#pinctrl-single|PowerPC),.*', '^(pl022|pxa-mmc|rcar_sound|rotary-encoder|s5m8767|sdhci),.*', '^(simple-audio-card|st-plgpio|st-spics|ts),.*', '^70mai,.*', '^GEFanuc,.*', '^ORCL,.*', '^SUNW,.*', '^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$', '^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$', '^abb,.*', '^abilis,.*', '^abracon,.*', '^abt,.*', '^acer,.*', '^acme,.*', '^actions,.*', '^active-semi,.*', '^ad,.*', '^adafruit,.*', '^adapteva,.*', '^adaptrum,.*', '^adh,.*', '^adi,.*', '^advantech,.*', '^aeroflexgaisler,.*', '^al,.*', '^allegro,.*', '^allo,.*', '^allwinner,.*', '^alphascale,.*', '^alps,.*', '^alt,.*', '^altr,.*', '^amarula,.*', '^amazon,.*', '^amcc,.*', '^amd,.*', '^amediatech,.*', '^amlogic,.*', '^ampere,.*', '^ampire,.*', '^ams,.*', '^amstaos,.*', '^analogix,.*', '^andestech,.*', '^anvo,.*', '^apm,.*', '^aptina,.*', '^arasan,.*', '^archermind,.*', '^arctic,.*', '^arcx,.*', '^aries,.*', '^arm,.*', '^armadeus,.*', '^arrow,.*', '^artesyn,.*', '^asahi-kasei,.*', '^asc,.*', '^aspeed,.*', '^asus,.*', '^atlas,.*', '^atmel,.*', '^auo,.*', '^auvidea,.*', '^avago,.*', '^avia,.*', '^avic,.*', '^avnet,.*', '^awinic,.*', '^axentia,.*', '^axis,.*', '^azoteq,.*', '^azw,.*', '^baikal,.*', '^bananapi,.*', '^beacon,.*', '^beagle,.*', '^bhf,.*', '^bitmain,.*', '^boe,.*', '^bosch,.*', '^boundary,.*', '^brcm,.*', '^broadmobi,.*', '^bticino,.*', '^buffalo,.*', '^bur,.*', '^calaosystems,.*', '^calxeda,.*', '^caninos,.*', '^capella,.*', '^cascoda,.*', '^catalyst,.*', '^cavium,.*', '^cdns,.*', '^cdtech,.*', '^cellwise,.*', '^ceva,.*', '^checkpoint,.*', '^chefree,.*', '^chipidea,.*', '^chipone,.*', '^chipspark,.*', '^chrontel,.*', '^chrp,.*', '^chunghwa,.*', '^chuwi,.*', '^ciaa,.*', '^cirrus,.*', '^cloudengines,.*', '^cnm,.*', '^cnxt,.*', '^colorfly,.*', '^compulab,.*', '^coreriver,.*', '^corpro,.*', '^cortina,.*', '^cosmic,.*', '^crane,.*', '^creative,.*', '^crystalfontz,.*', '^csky,.*', '^csq,.*', '^cubietech,.*', '^cypress,.*', '^cznic,.*', '^dallas,.*', '^dataimage,.*', '^davicom,.*', '^dell,.*', '^delta,.*', '^denx,.*', '^devantech,.*', '^dfi,.*', '^dh,.*', '^difrnce,.*', '^digi,.*', '^digilent,.*', '^dioo,.*', '^dlc,.*', '^dlg,.*', '^dlink,.*', '^dmo,.*', '^domintech,.*', '^dongwoon,.*', '^dptechnics,.*', '^dragino,.*', '^dserve,.*', '^dynaimage,.*', '^ea,.*', '^ebs-systart,.*', '^ebv,.*', '^eckelmann,.*', '^edt,.*', '^eeti,.*', '^einfochips,.*', '^elan,.*', '^element14,.*', '^elgin,.*', '^elida,.*', '^elimo,.*', '^embest,.*', '^emlid,.*', '^emmicro,.*', '^empire-electronix,.*', '^emtrion,.*', '^endless,.*', '^ene,.*', '^energymicro,.*', '^engicam,.*', '^epcos,.*', '^epfl,.*', '^epson,.*', '^esp,.*', '^est,.*', '^ettus,.*', '^eukrea,.*', '^everest,.*', '^everspin,.*', '^evervision,.*', '^exar,.*', '^excito,.*', '^ezchip,.*', '^facebook,.*', '^fairphone,.*', '^faraday,.*', '^fastrax,.*', '^fcs,.*', '^feixin,.*', '^feiyang,.*', '^fii,.*', '^firefly,.*', '^focaltech,.*', '^frida,.*', '^friendlyarm,.*', '^fsl,.*', '^fujitsu,.*', '^gardena,.*', '^gateworks,.*', '^gcw,.*', '^ge,.*', '^geekbuying,.*', '^gef,.*', '^gemei,.*', '^geniatech,.*', '^giantec,.*', '^giantplus,.*', '^globalscale,.*', '^globaltop,.*', '^gmt,.*', '^goodix,.*', '^google,.*', '^grinn,.*', '^grmn,.*', '^gumstix,.*', '^gw,.*', '^hannstar,.*', '^haoyu,.*', '^hardkernel,.*', '^hideep,.*', '^himax,.*', '^hirschmann,.*', '^hisilicon,.*', '^hit,.*', '^hitex,.*', '^holt,.*', '^holtek,.*', '^honestar,.*', '^honeywell,.*', '^hoperun,.*', '^hp,.*', '^hsg,.*', '^hugsun,.*', '^hwacom,.*', '^hydis,.*', '^hyundai,.*', '^i2se,.*', '^ibm,.*', '^icplus,.*', '^idt,.*', '^ifi,.*', '^ilitek,.*', '^img,.*', '^imi,.*', '^incircuit,.*', '^inet-tek,.*', '^infineon,.*', '^inforce,.*', '^ingenic,.*', '^innolux,.*', '^inside-secure,.*', '^inspur,.*', '^intel,.*', '^intercontrol,.*', '^invensense,.*', '^inversepath,.*', '^iom,.*', '^isee,.*', '^isil,.*', '^issi,.*', '^ite,.*', '^itead,.*', '^ivo,.*', '^iwave,.*', '^jdi,.*', '^jedec,.*', '^jesurun,.*', '^jianda,.*', '^kam,.*', '^karo,.*', '^keithkoep,.*', '^keymile,.*', '^khadas,.*', '^kiebackpeter,.*', '^kinetic,.*', '^kingdisplay,.*', '^kingnovel,.*', '^kionix,.*', '^kobo,.*', '^kobol,.*', '^koe,.*', '^kontron,.*', '^kosagi,.*', '^kyo,.*', '^lacie,.*', '^laird,.*', '^lamobo,.*', '^lantiq,.*', '^lattice,.*', '^leadtek,.*', '^leez,.*', '^lego,.*', '^lemaker,.*', '^lenovo,.*', '^lg,.*', '^lgphilips,.*', '^libretech,.*', '^licheepi,.*', '^linaro,.*', '^linksprite,.*', '^linksys,.*', '^linutronix,.*', '^linux,.*', '^linx,.*', '^litex,.*', '^lltc,.*', '^logicpd,.*', '^logictechno,.*', '^longcheer,.*', '^lontium,.*', '^loongson,.*', '^lsi,.*', '^lwn,.*', '^lxa,.*', '^macnica,.*', '^mantix,.*', '^mapleboard,.*', '^marvell,.*', '^maxbotix,.*', '^maxim,.*', '^mbvl,.*', '^mcube,.*', '^meas,.*', '^mecer,.*', '^mediatek,.*', '^megachips,.*', '^mele,.*', '^melexis,.*', '^melfas,.*', '^mellanox,.*', '^memsic,.*', '^menlo,.*', '^mentor,.*', '^meraki,.*', '^merrii,.*', '^micrel,.*', '^microchip,.*', '^microcrystal,.*', '^micron,.*', '^microsoft,.*', '^microsys,.*', '^mikroe,.*', '^mikrotik,.*', '^miniand,.*', '^minix,.*', '^miramems,.*', '^mitsubishi,.*', '^modtronix,.*', '^mosaixtech,.*', '^motorola,.*', '^moxa,.*', '^mpl,.*', '^mps,.*', '^mqmaker,.*', '^mrvl,.*', '^mscc,.*', '^msi,.*', '^mstar,.*', '^mti,.*', '^multi-inno,.*', '^mundoreader,.*', '^murata,.*', '^mxicy,.*', '^myir,.*', '^national,.*', '^nec,.*', '^neonode,.*', '^netgear,.*', '^netlogic,.*', '^netron-dy,.*', '^netxeon,.*', '^neweast,.*', '^newhaven,.*', '^nexbox,.*', '^nextthing,.*', '^ni,.*', '^nintendo,.*', '^nlt,.*', '^nokia,.*', '^nordic,.*', '^novtech,.*', '^nutsboard,.*', '^nuvoton,.*', '^nvd,.*', '^nvidia,.*', '^nxp,.*', '^oceanic,.*', '^oct,.*', '^okaya,.*', '^oki,.*', '^olimex,.*', '^olpc,.*', '^onion,.*', '^onnn,.*', '^ontat,.*', '^opalkelly,.*', '^opencores,.*', '^openrisc,.*', '^option,.*', '^oranth,.*', '^orisetech,.*', '^ortustech,.*', '^osddisplays,.*', '^ouya,.*', '^overkiz,.*', '^ovti,.*', '^oxsemi,.*', '^ozzmaker,.*', '^panasonic,.*', '^parade,.*', '^parallax,.*', '^pda,.*', '^pericom,.*', '^pervasive,.*', '^phicomm,.*', '^phytec,.*', '^picochip,.*', '^pine64,.*', '^pineriver,.*', '^pixcir,.*', '^plantower,.*', '^plathome,.*', '^plda,.*', '^plx,.*', '^pni,.*', '^pocketbook,.*', '^polaroid,.*', '^portwell,.*', '^poslab,.*', '^pov,.*', '^powertip,.*', '^powervr,.*', '^primux,.*', '^probox2,.*', '^prt,.*', '^pulsedlight,.*', '^purism,.*', '^qca,.*', '^qcom,.*', '^qemu,.*', '^qi,.*', '^qiaodian,.*', '^qihua,.*', '^qnap,.*', '^radxa,.*', '^raidsonic,.*', '^ralink,.*', '^ramtron,.*', '^raspberrypi,.*', '^raydium,.*', '^rda,.*', '^realtek,.*', '^renesas,.*', '^rervision,.*', '^revotics,.*', '^rex,.*', '^richtek,.*', '^ricoh,.*', '^rikomagic,.*', '^riot,.*', '^riscv,.*', '^rockchip,.*', '^rocktech,.*', '^rohm,.*', '^ronbo,.*', '^roofull,.*', '^roseapplepi,.*', '^samsung,.*', '^samtec,.*', '^sancloud,.*', '^sandisk,.*', '^satoz,.*', '^sbs,.*', '^schindler,.*', '^seagate,.*', '^seeed,.*', '^seirobotics,.*', '^semtech,.*', '^sensirion,.*', '^sensortek,.*', '^sff,.*', '^sgd,.*', '^sgmicro,.*', '^sgx,.*', '^sharp,.*', '^shimafuji,.*', '^shiratech,.*', '^si-en,.*', '^si-linux,.*', '^sifive,.*', '^sigma,.*', '^sii,.*', '^sil,.*', '^silabs,.*', '^silead,.*', '^silergy,.*', '^silex-insight,.*', '^siliconmitus,.*', '^simtek,.*', '^sinlinx,.*', '^sinovoip,.*', '^sipeed,.*', '^sirf,.*', '^sis,.*', '^sitronix,.*', '^skyworks,.*', '^smartlabs,.*', '^smsc,.*', '^snps,.*', '^sochip,.*', '^socionext,.*', '^solidrun,.*', '^solomon,.*', '^sony,.*', '^spansion,.*', '^sprd,.*', '^sst,.*', '^sstar,.*', '^st,.*', '^st-ericsson,.*', '^starry,.*', '^startek,.*', '^ste,.*', '^stericsson,.*', '^summit,.*', '^sunchip,.*', '^swir,.*', '^syna,.*', '^synology,.*', '^tbs,.*', '^tbs-biometrics,.*', '^tcg,.*', '^tcl,.*', '^tdo,.*', '^technexion,.*', '^technologic,.*', '^techstar,.*', '^te > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/vendor-prefixes.yaml > > See https://patchwork.ozlabs.org/patch/1420616 > > This check can fail if there are any dependencies. The base for a patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting @ 2020-12-29 5:55 ` Xin Ji 0 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-29 5:55 UTC (permalink / raw) To: Rob Herring Cc: Nicolas Boichat, Laurent Pinchart, devicetree, David Airlie, Ricardo Cañuelo, linux-kernel, Mark Brown, dri-devel, Hsin-Yi Wang, Sam Ravnborg, Sheng Pan On Sun, Dec 27, 2020 at 09:56:21AM -0700, Rob Herring wrote: > On Fri, 25 Dec 2020 19:01:09 +0800, Xin Ji wrote: > > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > > swing setting for adjusting DP tx PHY swing > > > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > > --- > > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > My bot found errors running 'make dt_binding_check' on your patch: Hi Rob Herring, I'll fix this issue in the next serial, thanks! > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: anx,swing-setting: 'anyOf' conditional failed, one must be fixed: > [[0, 20], [1, 84], [2, 100], [3, 116], [4, 41], [5, 123], [6, 119], [7, 91], [8, 127], [12, 32], [13, 96], [16, 96], [18, 64], [19, 96], [20, 20], [21, 84], [22, 100], [23, 116], [24, 41], [25, 123], [26, 119], [27, 91], [28, 127], [32, 32], [33, 96], [36, 96], [38, 64], [39, 96]] is too long > [0, 20] is too long > [1, 84] is too long > [2, 100] is too long > [3, 116] is too long > [4, 41] is too long > [5, 123] is too long > [6, 119] is too long > [7, 91] is too long > [8, 127] is too long > [12, 32] is too long > [13, 96] is too long > [16, 96] is too long > [18, 64] is too long > [19, 96] is too long > [20, 20] is too long > [21, 84] is too long > [22, 100] is too long > [23, 116] is too long > [24, 41] is too long > [25, 123] is too long > [26, 119] is too long > [27, 91] is too long > [28, 127] is too long > [32, 32] is too long > [33, 96] is too long > [36, 96] is too long > [38, 64] is too long > [39, 96] is too long > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.example.dt.yaml: encoder@58: 'anx,mipi-dpi-in', 'anx,swing-setting' do not match any of the regexes: '^#.*', '^(at25|bm|devbus|dmacap|dsa|exynos|fsi[ab]|gpio-fan|gpio-key|gpio|gpmc|hdmi|i2c-gpio),.*', '^(keypad|m25p|max8952|max8997|max8998|mpmc),.*', '^(pinctrl-single|#pinctrl-single|PowerPC),.*', '^(pl022|pxa-mmc|rcar_sound|rotary-encoder|s5m8767|sdhci),.*', '^(simple-audio-card|st-plgpio|st-spics|ts),.*', '^70mai,.*', '^GEFanuc,.*', '^ORCL,.*', '^SUNW,.*', '^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$', '^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$', '^abb,.*', '^abilis,.*', '^abracon,.*', '^abt,.*', '^acer,.*', '^acme,.*', '^actions,.*', '^active-semi,.*', '^ad,.*', '^adafruit,.*', '^adapteva,.*', '^adaptrum,.*', '^adh,.*', '^adi,.*', '^advantech,.*', '^aeroflexgaisler,.*', '^al,.*', '^allegro,.*', '^allo,.*', '^allwinner,.*', '^alphascale,.*', '^alps,.*', '^alt,.*', '^altr,.*', '^amarula,.*', '^amazon,.*', '^amcc,.*', '^amd,.*', '^amediatech,.*', '^amlogic,.*', '^ampere,.*', '^ampire,.*', '^ams,.*', '^amstaos,.*', '^analogix,.*', '^andestech,.*', '^anvo,.*', '^apm,.*', '^aptina,.*', '^arasan,.*', '^archermind,.*', '^arctic,.*', '^arcx,.*', '^aries,.*', '^arm,.*', '^armadeus,.*', '^arrow,.*', '^artesyn,.*', '^asahi-kasei,.*', '^asc,.*', '^aspeed,.*', '^asus,.*', '^atlas,.*', '^atmel,.*', '^auo,.*', '^auvidea,.*', '^avago,.*', '^avia,.*', '^avic,.*', '^avnet,.*', '^awinic,.*', '^axentia,.*', '^axis,.*', '^azoteq,.*', '^azw,.*', '^baikal,.*', '^bananapi,.*', '^beacon,.*', '^beagle,.*', '^bhf,.*', '^bitmain,.*', '^boe,.*', '^bosch,.*', '^boundary,.*', '^brcm,.*', '^broadmobi,.*', '^bticino,.*', '^buffalo,.*', '^bur,.*', '^calaosystems,.*', '^calxeda,.*', '^caninos,.*', '^capella,.*', '^cascoda,.*', '^catalyst,.*', '^cavium,.*', '^cdns,.*', '^cdtech,.*', '^cellwise,.*', '^ceva,.*', '^checkpoint,.*', '^chefree,.*', '^chipidea,.*', '^chipone,.*', '^chipspark,.*', '^chrontel,.*' , '^chrp,.*', '^chunghwa,.*', '^chuwi,.*', '^ciaa,.*', '^cirrus,.*', '^cloudengines,.*', '^cnm,.*', '^cnxt,.*', '^colorfly,.*', '^compulab,.*', '^coreriver,.*', '^corpro,.*', '^cortina,.*', '^cosmic,.*', '^crane,.*', '^creative,.*', '^crystalfontz,.*', '^csky,.*', '^csq,.*', '^cubietech,.*', '^cypress,.*', '^cznic,.*', '^dallas,.*', '^dataimage,.*', '^davicom,.*', '^dell,.*', '^delta,.*', '^denx,.*', '^devantech,.*', '^dfi,.*', '^dh,.*', '^difrnce,.*', '^digi,.*', '^digilent,.*', '^dioo,.*', '^dlc,.*', '^dlg,.*', '^dlink,.*', '^dmo,.*', '^domintech,.*', '^dongwoon,.*', '^dptechnics,.*', '^dragino,.*', '^dserve,.*', '^dynaimage,.*', '^ea,.*', '^ebs-systart,.*', '^ebv,.*', '^eckelmann,.*', '^edt,.*', '^eeti,.*', '^einfochips,.*', '^elan,.*', '^element14,.*', '^elgin,.*', '^elida,.*', '^elimo,.*', '^embest,.*', '^emlid,.*', '^emmicro,.*', '^empire-electronix,.*', '^emtrion,.*', '^endless,.*', '^ene,.*', '^energymicro,.*', '^engicam,.*', '^epcos,.*', '^epfl,.*', '^epson,.*', '^esp,.*', '^est,.*', '^ettus,.*', '^eukrea,.*', '^everest,.*', '^everspin,.*', '^evervision,.*', '^exar,.*', '^excito,.*', '^ezchip,.*', '^facebook,.*', '^fairphone,.*', '^faraday,.*', '^fastrax,.*', '^fcs,.*', '^feixin,.*', '^feiyang,.*', '^fii,.*', '^firefly,.*', '^focaltech,.*', '^frida,.*', '^friendlyarm,.*', '^fsl,.*', '^fujitsu,.*', '^gardena,.*', '^gateworks,.*', '^gcw,.*', '^ge,.*', '^geekbuying,.*', '^gef,.*', '^gemei,.*', '^geniatech,.*', '^giantec,.*', '^giantplus,.*', '^globalscale,.*', '^globaltop,.*', '^gmt,.*', '^goodix,.*', '^google,.*', '^grinn,.*', '^grmn,.*', '^gumstix,.*', '^gw,.*', '^hannstar,.*', '^haoyu,.*', '^hardkernel,.*', '^hideep,.*', '^himax,.*', '^hirschmann,.*', '^hisilicon,.*', '^hit,.*', '^hitex,.*', '^holt,.*', '^holtek,.*', '^honestar,.*', '^honeywell,.*', '^hoperun,.*', '^hp,.*', '^hsg,.*', '^hugsun,.*', '^hwacom,.*', '^hydis,.*', '^hyundai,.*', '^i2se,.*', '^ibm,.*', '^icplus,.*', '^idt,.*', '^ifi,.*', '^ilitek,.*', '^img,.*', '^imi,.*', '^incircuit,.*', ' ^inet-tek,.*', '^infineon,.*', '^inforce,.*', '^ingenic,.*', '^innolux,.*', '^inside-secure,.*', '^inspur,.*', '^intel,.*', '^intercontrol,.*', '^invensense,.*', '^inversepath,.*', '^iom,.*', '^isee,.*', '^isil,.*', '^issi,.*', '^ite,.*', '^itead,.*', '^ivo,.*', '^iwave,.*', '^jdi,.*', '^jedec,.*', '^jesurun,.*', '^jianda,.*', '^kam,.*', '^karo,.*', '^keithkoep,.*', '^keymile,.*', '^khadas,.*', '^kiebackpeter,.*', '^kinetic,.*', '^kingdisplay,.*', '^kingnovel,.*', '^kionix,.*', '^kobo,.*', '^kobol,.*', '^koe,.*', '^kontron,.*', '^kosagi,.*', '^kyo,.*', '^lacie,.*', '^laird,.*', '^lamobo,.*', '^lantiq,.*', '^lattice,.*', '^leadtek,.*', '^leez,.*', '^lego,.*', '^lemaker,.*', '^lenovo,.*', '^lg,.*', '^lgphilips,.*', '^libretech,.*', '^licheepi,.*', '^linaro,.*', '^linksprite,.*', '^linksys,.*', '^linutronix,.*', '^linux,.*', '^linx,.*', '^litex,.*', '^lltc,.*', '^logicpd,.*', '^logictechno,.*', '^longcheer,.*', '^lontium,.*', '^loongson,.*', '^lsi,.*', '^lwn,.*', '^lxa,.*', '^macnica,. *', '^mantix,.*', '^mapleboard,.*', '^marvell,.*', '^maxbotix,.*', '^maxim,.*', '^mbvl,.*', '^mcube,.*', '^meas,.*', '^mecer,.*', '^mediatek,.*', '^megachips,.*', '^mele,.*', '^melexis,.*', '^melfas,.*', '^mellanox,.*', '^memsic,.*', '^menlo,.*', '^mentor,.*', '^meraki,.*', '^merrii,.*', '^micrel,.*', '^microchip,.*', '^microcrystal,.*', '^micron,.*', '^microsoft,.*', '^microsys,.*', '^mikroe,.*', '^mikrotik,.*', '^miniand,.*', '^minix,.*', '^miramems,.*', '^mitsubishi,.*', '^modtronix,.*', '^mosaixtech,.*', '^motorola,.*', '^moxa,.*', '^mpl,.*', '^mps,.*', '^mqmaker,.*', '^mrvl,.*', '^mscc,.*', '^msi,.*', '^mstar,.*', '^mti,.*', '^multi-inno,.*', '^mundoreader,.*', '^murata,.*', '^mxicy,.*', '^myir,.*', '^national,.*', '^nec,.*', '^neonode,.*', '^netgear,.*', '^netlogic,.*', '^netron-dy,.*', '^netxeon,.*', '^neweast,.*', '^newhaven,.*', '^nexbox,.*', '^nextthing,.*', '^ni,.*', '^nintendo,.*', '^nlt,.*', '^nokia,.*', '^nordic,.*', '^novtech,.*', '^nutsboard,.*', '^nuvoton,.*', '^nvd ,.*', '^nvidia,.*', '^nxp,.*', '^oceanic,.*', '^oct,.*', '^okaya,.*', '^oki,.*', '^olimex,.*', '^olpc,.*', '^onion,.*', '^onnn,.*', '^ontat,.*', '^opalkelly,.*', '^opencores,.*', '^openrisc,.*', '^option,.*', '^oranth,.*', '^orisetech,.*', '^ortustech,.*', '^osddisplays,.*', '^ouya,.*', '^overkiz,.*', '^ovti,.*', '^oxsemi,.*', '^ozzmaker,.*', '^panasonic,.*', '^parade,.*', '^parallax,.*', '^pda,.*', '^pericom,.*', '^pervasive,.*', '^phicomm,.*', '^phytec,.*', '^picochip,.*', '^pine64,.*', '^pineriver,.*', '^pixcir,.*', '^plantower,.*', '^plathome,.*', '^plda,.*', '^plx,.*', '^pni,.*', '^pocketbook,.*', '^polaroid,.*', '^portwell,.*', '^poslab,.*', '^pov,.*', '^powertip,.*', '^powervr,.*', '^primux,.*', '^probox2,.*', '^prt,.*', '^pulsedlight,.*', '^purism,.*', '^qca,.*', '^qcom,.*', '^qemu,.*', '^qi,.*', '^qiaodian,.*', '^qihua,.*', '^qnap,.*', '^radxa,.*', '^raidsonic,.*', '^ralink,.*', '^ramtron,.*', '^raspberrypi,.*', '^raydium,.*', '^rda,.*', '^realtek,.*', '^renesas,.*', '^rerv ision,.*', '^revotics,.*', '^rex,.*', '^richtek,.*', '^ricoh,.*', '^rikomagic,.*', '^riot,.*', '^riscv,.*', '^rockchip,.*', '^rocktech,.*', '^rohm,.*', '^ronbo,.*', '^roofull,.*', '^roseapplepi,.*', '^samsung,.*', '^samtec,.*', '^sancloud,.*', '^sandisk,.*', '^satoz,.*', '^sbs,.*', '^schindler,.*', '^seagate,.*', '^seeed,.*', '^seirobotics,.*', '^semtech,.*', '^sensirion,.*', '^sensortek,.*', '^sff,.*', '^sgd,.*', '^sgmicro,.*', '^sgx,.*', '^sharp,.*', '^shimafuji,.*', '^shiratech,.*', '^si-en,.*', '^si-linux,.*', '^sifive,.*', '^sigma,.*', '^sii,.*', '^sil,.*', '^silabs,.*', '^silead,.*', '^silergy,.*', '^silex-insight,.*', '^siliconmitus,.*', '^simtek,.*', '^sinlinx,.*', '^sinovoip,.*', '^sipeed,.*', '^sirf,.*', '^sis,.*', '^sitronix,.*', '^skyworks,.*', '^smartlabs,.*', '^smsc,.*', '^snps,.*', '^sochip,.*', '^socionext,.*', '^solidrun,.*', '^solomon,.*', '^sony,.*', '^spansion,.*', '^sprd,.*', '^sst,.*', '^sstar,.*', '^st,.*', '^st-ericsson,.*', '^starry,.*', '^startek,.*', '^ste ,.*', '^stericsson,.*', '^summit,.*', '^sunchip,.*', '^swir,.*', '^syna,.*', '^synology,.*', '^tbs,.*', '^tbs-biometrics,.*', '^tcg,.*', '^tcl,.*', '^tdo,.*', '^technexion,.*', '^technologic,.*', '^techstar,.*', '^te > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/vendor-prefixes.yaml > > See https://patchwork.ozlabs.org/patch/1420616 > > This check can fail if there are any dependencies. The base for a patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting 2020-12-25 11:01 ` Xin Ji @ 2020-12-28 15:08 ` Laurent Pinchart -1 siblings, 0 replies; 30+ messages in thread From: Laurent Pinchart @ 2020-12-28 15:08 UTC (permalink / raw) To: Xin Ji Cc: Rob Herring, David Airlie, Nicolas Boichat, Hsin-Yi Wang, Daniel Vetter, Sam Ravnborg, Laurent Pinchart, Maxime Ripard, Mark Brown, Ricardo Cañuelo, dri-devel, devicetree, Sheng Pan, linux-kernel Hi Xin Ji, Thank you for the patch. On Fri, Dec 25, 2020 at 07:01:09PM +0800, Xin Ji wrote: > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > swing setting for adjusting DP tx PHY swing > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > --- > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > index 60585a4..34a7faf 100644 > --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > @@ -34,6 +34,14 @@ properties: > description: used for reset chip control, RESET_N pin B7. > maxItems: 1 > > + anx,swing-setting: > + $ref: /schemas/types.yaml#/definitions/uint32-array > + description: an array of swing register setting for DP tx PHY Register values in DT are frowned upon. > + anx,mipi-dpi-in: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: indicate the MIPI rx signal type is DPI or DSI This sounds similar to the bus-type property defined in Documentation/devicetree/bindings/media/video-interfaces.txt (which is getting converted to YAML, Rob has posted a patch series, I expect it to land in v5.13). I think it would make sense to extend bus-type to support DSI, and use that property. > + > ports: > type: object > > @@ -72,6 +80,17 @@ examples: > reg = <0x58>; > enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; > reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; > + anx,swing-setting = <0x00 0x14>, <0x01 0x54>, > + <0x02 0x64>, <0x03 0x74>, <0x04 0x29>, > + <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>, > + <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>, > + <0x10 0x60>, <0x12 0x40>, <0x13 0x60>, > + <0x14 0x14>, <0x15 0x54>, <0x16 0x64>, > + <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>, > + <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>, > + <0x20 0x20>, <0x21 0x60>, <0x24 0x60>, > + <0x26 0x40>, <0x27 0x60>; > + anx,mipi-dpi-in = <0>; > > ports { > #address-cells = <1>; -- Regards, Laurent Pinchart ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting @ 2020-12-28 15:08 ` Laurent Pinchart 0 siblings, 0 replies; 30+ messages in thread From: Laurent Pinchart @ 2020-12-28 15:08 UTC (permalink / raw) To: Xin Ji Cc: Nicolas Boichat, Laurent Pinchart, devicetree, David Airlie, Ricardo Cañuelo, Mark Brown, linux-kernel, Rob Herring, dri-devel, Hsin-Yi Wang, Sam Ravnborg, Sheng Pan Hi Xin Ji, Thank you for the patch. On Fri, Dec 25, 2020 at 07:01:09PM +0800, Xin Ji wrote: > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > swing setting for adjusting DP tx PHY swing > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > --- > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > index 60585a4..34a7faf 100644 > --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > @@ -34,6 +34,14 @@ properties: > description: used for reset chip control, RESET_N pin B7. > maxItems: 1 > > + anx,swing-setting: > + $ref: /schemas/types.yaml#/definitions/uint32-array > + description: an array of swing register setting for DP tx PHY Register values in DT are frowned upon. > + anx,mipi-dpi-in: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: indicate the MIPI rx signal type is DPI or DSI This sounds similar to the bus-type property defined in Documentation/devicetree/bindings/media/video-interfaces.txt (which is getting converted to YAML, Rob has posted a patch series, I expect it to land in v5.13). I think it would make sense to extend bus-type to support DSI, and use that property. > + > ports: > type: object > > @@ -72,6 +80,17 @@ examples: > reg = <0x58>; > enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; > reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; > + anx,swing-setting = <0x00 0x14>, <0x01 0x54>, > + <0x02 0x64>, <0x03 0x74>, <0x04 0x29>, > + <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>, > + <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>, > + <0x10 0x60>, <0x12 0x40>, <0x13 0x60>, > + <0x14 0x14>, <0x15 0x54>, <0x16 0x64>, > + <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>, > + <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>, > + <0x20 0x20>, <0x21 0x60>, <0x24 0x60>, > + <0x26 0x40>, <0x27 0x60>; > + anx,mipi-dpi-in = <0>; > > ports { > #address-cells = <1>; -- Regards, Laurent Pinchart _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting 2020-12-28 15:08 ` Laurent Pinchart @ 2020-12-29 6:50 ` Xin Ji -1 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-29 6:50 UTC (permalink / raw) To: Laurent Pinchart Cc: Rob Herring, David Airlie, Nicolas Boichat, Hsin-Yi Wang, Daniel Vetter, Sam Ravnborg, Laurent Pinchart, Maxime Ripard, Mark Brown, Ricardo Cañuelo, dri-devel, devicetree, Sheng Pan, linux-kernel On Mon, Dec 28, 2020 at 05:08:56PM +0200, Laurent Pinchart wrote: > Hi Xin Ji, > > Thank you for the patch. > > On Fri, Dec 25, 2020 at 07:01:09PM +0800, Xin Ji wrote: > > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > > swing setting for adjusting DP tx PHY swing > > > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > > --- > > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > index 60585a4..34a7faf 100644 > > --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > @@ -34,6 +34,14 @@ properties: > > description: used for reset chip control, RESET_N pin B7. > > maxItems: 1 > > > > + anx,swing-setting: > > + $ref: /schemas/types.yaml#/definitions/uint32-array > > + description: an array of swing register setting for DP tx PHY > > Register values in DT are frowned upon. Hi Laurent Pinchart, as the different vendor has the different PCB layout, it effects DP CTS test result, so they may need config DP tx Swing register to adjust signal swing(the default swing setting is not satisfy for every platform). If we move the config code to driver file, it must define swing register setting for each vendor, so the DT is the best way. Do you have any idea for it if you don't agree to add in DT. > > > + anx,mipi-dpi-in: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: indicate the MIPI rx signal type is DPI or DSI > > This sounds similar to the bus-type property defined in > Documentation/devicetree/bindings/media/video-interfaces.txt (which is > getting converted to YAML, Rob has posted a patch series, I expect it to > land in v5.13). I think it would make sense to extend bus-type to > support DSI, and use that property. Sorry, I didn't found any define for DPI or DSI flag in Rob's patches. Do you mean I just remove this flag define and call a special function to read the port's type(DSI or DPI)? > > > + > > ports: > > type: object > > > > @@ -72,6 +80,17 @@ examples: > > reg = <0x58>; > > enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; > > reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; > > + anx,swing-setting = <0x00 0x14>, <0x01 0x54>, > > + <0x02 0x64>, <0x03 0x74>, <0x04 0x29>, > > + <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>, > > + <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>, > > + <0x10 0x60>, <0x12 0x40>, <0x13 0x60>, > > + <0x14 0x14>, <0x15 0x54>, <0x16 0x64>, > > + <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>, > > + <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>, > > + <0x20 0x20>, <0x21 0x60>, <0x24 0x60>, > > + <0x26 0x40>, <0x27 0x60>; > > + anx,mipi-dpi-in = <0>; > > > > ports { > > #address-cells = <1>; > > -- > Regards, > > Laurent Pinchart ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting @ 2020-12-29 6:50 ` Xin Ji 0 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-29 6:50 UTC (permalink / raw) To: Laurent Pinchart Cc: Nicolas Boichat, Laurent Pinchart, devicetree, David Airlie, Ricardo Cañuelo, Mark Brown, linux-kernel, Rob Herring, dri-devel, Hsin-Yi Wang, Sam Ravnborg, Sheng Pan On Mon, Dec 28, 2020 at 05:08:56PM +0200, Laurent Pinchart wrote: > Hi Xin Ji, > > Thank you for the patch. > > On Fri, Dec 25, 2020 at 07:01:09PM +0800, Xin Ji wrote: > > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > > swing setting for adjusting DP tx PHY swing > > > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > > --- > > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > index 60585a4..34a7faf 100644 > > --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > @@ -34,6 +34,14 @@ properties: > > description: used for reset chip control, RESET_N pin B7. > > maxItems: 1 > > > > + anx,swing-setting: > > + $ref: /schemas/types.yaml#/definitions/uint32-array > > + description: an array of swing register setting for DP tx PHY > > Register values in DT are frowned upon. Hi Laurent Pinchart, as the different vendor has the different PCB layout, it effects DP CTS test result, so they may need config DP tx Swing register to adjust signal swing(the default swing setting is not satisfy for every platform). If we move the config code to driver file, it must define swing register setting for each vendor, so the DT is the best way. Do you have any idea for it if you don't agree to add in DT. > > > + anx,mipi-dpi-in: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: indicate the MIPI rx signal type is DPI or DSI > > This sounds similar to the bus-type property defined in > Documentation/devicetree/bindings/media/video-interfaces.txt (which is > getting converted to YAML, Rob has posted a patch series, I expect it to > land in v5.13). I think it would make sense to extend bus-type to > support DSI, and use that property. Sorry, I didn't found any define for DPI or DSI flag in Rob's patches. Do you mean I just remove this flag define and call a special function to read the port's type(DSI or DPI)? > > > + > > ports: > > type: object > > > > @@ -72,6 +80,17 @@ examples: > > reg = <0x58>; > > enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; > > reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; > > + anx,swing-setting = <0x00 0x14>, <0x01 0x54>, > > + <0x02 0x64>, <0x03 0x74>, <0x04 0x29>, > > + <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>, > > + <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>, > > + <0x10 0x60>, <0x12 0x40>, <0x13 0x60>, > > + <0x14 0x14>, <0x15 0x54>, <0x16 0x64>, > > + <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>, > > + <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>, > > + <0x20 0x20>, <0x21 0x60>, <0x24 0x60>, > > + <0x26 0x40>, <0x27 0x60>; > > + anx,mipi-dpi-in = <0>; > > > > ports { > > #address-cells = <1>; > > -- > Regards, > > Laurent Pinchart _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting 2020-12-29 6:50 ` Xin Ji @ 2020-12-29 14:34 ` Laurent Pinchart -1 siblings, 0 replies; 30+ messages in thread From: Laurent Pinchart @ 2020-12-29 14:34 UTC (permalink / raw) To: Xin Ji Cc: Rob Herring, David Airlie, Nicolas Boichat, Hsin-Yi Wang, Daniel Vetter, Sam Ravnborg, Laurent Pinchart, Maxime Ripard, Mark Brown, Ricardo Cañuelo, dri-devel, devicetree, Sheng Pan, linux-kernel Hi Xin Ji, On Tue, Dec 29, 2020 at 02:50:48PM +0800, Xin Ji wrote: > On Mon, Dec 28, 2020 at 05:08:56PM +0200, Laurent Pinchart wrote: > > On Fri, Dec 25, 2020 at 07:01:09PM +0800, Xin Ji wrote: > > > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > > > swing setting for adjusting DP tx PHY swing > > > > > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > > > --- > > > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > > > 1 file changed, 19 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > index 60585a4..34a7faf 100644 > > > --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > @@ -34,6 +34,14 @@ properties: > > > description: used for reset chip control, RESET_N pin B7. > > > maxItems: 1 > > > > > > + anx,swing-setting: > > > + $ref: /schemas/types.yaml#/definitions/uint32-array > > > + description: an array of swing register setting for DP tx PHY > > > > Register values in DT are frowned upon. > > Hi Laurent Pinchart, as the different vendor has the different PCB layout, > it effects DP CTS test result, so they may need config DP tx Swing register > to adjust signal swing(the default swing setting is not satisfy for > every platform). If we move the config code to driver file, it must define > swing register setting for each vendor, so the DT is the best way. Do you > have any idea for it if you don't agree to add in DT. If it depends on the PCB layout then it should indeed be in DT. What I wonder is if there would be a better way to specify the data than register values. The ANX7625 datasheet isn't public, so there's effectively no way for someone to write a device tree compliant with this binding only with the information contained here. Reviewing the bindings is equally difficult. It would be best if this property instead contained information that could be documented clearly. > > > + anx,mipi-dpi-in: > > > + $ref: /schemas/types.yaml#/definitions/uint32 > > > + description: indicate the MIPI rx signal type is DPI or DSI > > > > This sounds similar to the bus-type property defined in > > Documentation/devicetree/bindings/media/video-interfaces.txt (which is > > getting converted to YAML, Rob has posted a patch series, I expect it to > > land in v5.13). I think it would make sense to extend bus-type to > > support DSI, and use that property. > > Sorry, I didn't found any define for DPI or DSI flag in Rob's patches. > Do you mean I just remove this flag define and call a special function > to read the port's type(DSI or DPI)? video-interfaces.yaml has initially been written for cameras, so it doesn't support DSI. I think it would make sense to extend the bus-type property with a DSI type, and use it here instead of a vendor-specific property. Alternatively, I'm wondering if this isn't information we could query at runtime. DRM bridges and panels have a type, so we could look at the next bridge or panel to find the type of the connected device instead of specifying it in DT. > > > + > > > ports: > > > type: object > > > > > > @@ -72,6 +80,17 @@ examples: > > > reg = <0x58>; > > > enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; > > > reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; > > > + anx,swing-setting = <0x00 0x14>, <0x01 0x54>, > > > + <0x02 0x64>, <0x03 0x74>, <0x04 0x29>, > > > + <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>, > > > + <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>, > > > + <0x10 0x60>, <0x12 0x40>, <0x13 0x60>, > > > + <0x14 0x14>, <0x15 0x54>, <0x16 0x64>, > > > + <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>, > > > + <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>, > > > + <0x20 0x20>, <0x21 0x60>, <0x24 0x60>, > > > + <0x26 0x40>, <0x27 0x60>; > > > + anx,mipi-dpi-in = <0>; > > > > > > ports { > > > #address-cells = <1>; -- Regards, Laurent Pinchart ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting @ 2020-12-29 14:34 ` Laurent Pinchart 0 siblings, 0 replies; 30+ messages in thread From: Laurent Pinchart @ 2020-12-29 14:34 UTC (permalink / raw) To: Xin Ji Cc: Nicolas Boichat, Laurent Pinchart, devicetree, David Airlie, Ricardo Cañuelo, Mark Brown, linux-kernel, Rob Herring, dri-devel, Hsin-Yi Wang, Sam Ravnborg, Sheng Pan Hi Xin Ji, On Tue, Dec 29, 2020 at 02:50:48PM +0800, Xin Ji wrote: > On Mon, Dec 28, 2020 at 05:08:56PM +0200, Laurent Pinchart wrote: > > On Fri, Dec 25, 2020 at 07:01:09PM +0800, Xin Ji wrote: > > > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > > > swing setting for adjusting DP tx PHY swing > > > > > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > > > --- > > > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > > > 1 file changed, 19 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > index 60585a4..34a7faf 100644 > > > --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > @@ -34,6 +34,14 @@ properties: > > > description: used for reset chip control, RESET_N pin B7. > > > maxItems: 1 > > > > > > + anx,swing-setting: > > > + $ref: /schemas/types.yaml#/definitions/uint32-array > > > + description: an array of swing register setting for DP tx PHY > > > > Register values in DT are frowned upon. > > Hi Laurent Pinchart, as the different vendor has the different PCB layout, > it effects DP CTS test result, so they may need config DP tx Swing register > to adjust signal swing(the default swing setting is not satisfy for > every platform). If we move the config code to driver file, it must define > swing register setting for each vendor, so the DT is the best way. Do you > have any idea for it if you don't agree to add in DT. If it depends on the PCB layout then it should indeed be in DT. What I wonder is if there would be a better way to specify the data than register values. The ANX7625 datasheet isn't public, so there's effectively no way for someone to write a device tree compliant with this binding only with the information contained here. Reviewing the bindings is equally difficult. It would be best if this property instead contained information that could be documented clearly. > > > + anx,mipi-dpi-in: > > > + $ref: /schemas/types.yaml#/definitions/uint32 > > > + description: indicate the MIPI rx signal type is DPI or DSI > > > > This sounds similar to the bus-type property defined in > > Documentation/devicetree/bindings/media/video-interfaces.txt (which is > > getting converted to YAML, Rob has posted a patch series, I expect it to > > land in v5.13). I think it would make sense to extend bus-type to > > support DSI, and use that property. > > Sorry, I didn't found any define for DPI or DSI flag in Rob's patches. > Do you mean I just remove this flag define and call a special function > to read the port's type(DSI or DPI)? video-interfaces.yaml has initially been written for cameras, so it doesn't support DSI. I think it would make sense to extend the bus-type property with a DSI type, and use it here instead of a vendor-specific property. Alternatively, I'm wondering if this isn't information we could query at runtime. DRM bridges and panels have a type, so we could look at the next bridge or panel to find the type of the connected device instead of specifying it in DT. > > > + > > > ports: > > > type: object > > > > > > @@ -72,6 +80,17 @@ examples: > > > reg = <0x58>; > > > enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; > > > reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; > > > + anx,swing-setting = <0x00 0x14>, <0x01 0x54>, > > > + <0x02 0x64>, <0x03 0x74>, <0x04 0x29>, > > > + <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>, > > > + <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>, > > > + <0x10 0x60>, <0x12 0x40>, <0x13 0x60>, > > > + <0x14 0x14>, <0x15 0x54>, <0x16 0x64>, > > > + <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>, > > > + <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>, > > > + <0x20 0x20>, <0x21 0x60>, <0x24 0x60>, > > > + <0x26 0x40>, <0x27 0x60>; > > > + anx,mipi-dpi-in = <0>; > > > > > > ports { > > > #address-cells = <1>; -- Regards, Laurent Pinchart _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting 2020-12-29 14:34 ` Laurent Pinchart @ 2020-12-30 6:52 ` Xin Ji -1 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-30 6:52 UTC (permalink / raw) To: Laurent Pinchart Cc: Rob Herring, David Airlie, Nicolas Boichat, Hsin-Yi Wang, Daniel Vetter, Sam Ravnborg, Maxime Ripard, Mark Brown, Ricardo Cañuelo, dri-devel, devicetree, Sheng Pan, linux-kernel On Tue, Dec 29, 2020 at 04:34:20PM +0200, Laurent Pinchart wrote: > Hi Xin Ji, > > On Tue, Dec 29, 2020 at 02:50:48PM +0800, Xin Ji wrote: > > On Mon, Dec 28, 2020 at 05:08:56PM +0200, Laurent Pinchart wrote: > > > On Fri, Dec 25, 2020 at 07:01:09PM +0800, Xin Ji wrote: > > > > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > > > > swing setting for adjusting DP tx PHY swing > > > > > > > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > > > > --- > > > > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > > > > 1 file changed, 19 insertions(+) > > > > > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > > index 60585a4..34a7faf 100644 > > > > --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > > +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > > @@ -34,6 +34,14 @@ properties: > > > > description: used for reset chip control, RESET_N pin B7. > > > > maxItems: 1 > > > > > > > > + anx,swing-setting: > > > > + $ref: /schemas/types.yaml#/definitions/uint32-array > > > > + description: an array of swing register setting for DP tx PHY > > > > > > Register values in DT are frowned upon. > > > > Hi Laurent Pinchart, as the different vendor has the different PCB layout, > > it effects DP CTS test result, so they may need config DP tx Swing register > > to adjust signal swing(the default swing setting is not satisfy for > > every platform). If we move the config code to driver file, it must define > > swing register setting for each vendor, so the DT is the best way. Do you > > have any idea for it if you don't agree to add in DT. > > If it depends on the PCB layout then it should indeed be in DT. What I > wonder is if there would be a better way to specify the data than > register values. The ANX7625 datasheet isn't public, so there's > effectively no way for someone to write a device tree compliant with > this binding only with the information contained here. Reviewing the > bindings is equally difficult. It would be best if this property instead > contained information that could be documented clearly. Hi Laurent Pinchart, the swing register setting is optional. Basically, no need to care about it if customer PCB layout match our chip requirement. The property define just in case. So far, we just found one customer encountered DP tx swing issue. As the datasheet swing register adjusting algorithm has a little complex, we will help customer to adjust the DP tx swing case by case. > > > > > + anx,mipi-dpi-in: > > > > + $ref: /schemas/types.yaml#/definitions/uint32 > > > > + description: indicate the MIPI rx signal type is DPI or DSI > > > > > > This sounds similar to the bus-type property defined in > > > Documentation/devicetree/bindings/media/video-interfaces.txt (which is > > > getting converted to YAML, Rob has posted a patch series, I expect it to > > > land in v5.13). I think it would make sense to extend bus-type to > > > support DSI, and use that property. > > > > Sorry, I didn't found any define for DPI or DSI flag in Rob's patches. > > Do you mean I just remove this flag define and call a special function > > to read the port's type(DSI or DPI)? > > video-interfaces.yaml has initially been written for cameras, so it > doesn't support DSI. I think it would make sense to extend the bus-type > property with a DSI type, and use it here instead of a vendor-specific > property. > > Alternatively, I'm wondering if this isn't information we could query at > runtime. DRM bridges and panels have a type, so we could look at the > next bridge or panel to find the type of the connected device instead of > specifying it in DT. At anx7625 driver probe stage, for the DSI, driver needs call some special interface to attach to DSI interface. For the DPI port, there is no such limitation, so we need to know what kind of MIPI signal type at driver initial stage. Maybe we can keep this flag, if the future has defined DSI, I'll submit new patch to remove this flag. Thanks, Xin > > > > > + > > > > ports: > > > > type: object > > > > > > > > @@ -72,6 +80,17 @@ examples: > > > > reg = <0x58>; > > > > enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; > > > > reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; > > > > + anx,swing-setting = <0x00 0x14>, <0x01 0x54>, > > > > + <0x02 0x64>, <0x03 0x74>, <0x04 0x29>, > > > > + <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>, > > > > + <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>, > > > > + <0x10 0x60>, <0x12 0x40>, <0x13 0x60>, > > > > + <0x14 0x14>, <0x15 0x54>, <0x16 0x64>, > > > > + <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>, > > > > + <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>, > > > > + <0x20 0x20>, <0x21 0x60>, <0x24 0x60>, > > > > + <0x26 0x40>, <0x27 0x60>; > > > > + anx,mipi-dpi-in = <0>; > > > > > > > > ports { > > > > #address-cells = <1>; > > -- > Regards, > > Laurent Pinchart ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting @ 2020-12-30 6:52 ` Xin Ji 0 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-30 6:52 UTC (permalink / raw) To: Laurent Pinchart Cc: Nicolas Boichat, devicetree, David Airlie, Ricardo Cañuelo, Mark Brown, linux-kernel, Rob Herring, dri-devel, Hsin-Yi Wang, Sam Ravnborg, Sheng Pan On Tue, Dec 29, 2020 at 04:34:20PM +0200, Laurent Pinchart wrote: > Hi Xin Ji, > > On Tue, Dec 29, 2020 at 02:50:48PM +0800, Xin Ji wrote: > > On Mon, Dec 28, 2020 at 05:08:56PM +0200, Laurent Pinchart wrote: > > > On Fri, Dec 25, 2020 at 07:01:09PM +0800, Xin Ji wrote: > > > > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add > > > > swing setting for adjusting DP tx PHY swing > > > > > > > > Signed-off-by: Xin Ji <xji@analogixsemi.com> > > > > --- > > > > .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++++++++++++++++++ > > > > 1 file changed, 19 insertions(+) > > > > > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > > index 60585a4..34a7faf 100644 > > > > --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > > +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > > > > @@ -34,6 +34,14 @@ properties: > > > > description: used for reset chip control, RESET_N pin B7. > > > > maxItems: 1 > > > > > > > > + anx,swing-setting: > > > > + $ref: /schemas/types.yaml#/definitions/uint32-array > > > > + description: an array of swing register setting for DP tx PHY > > > > > > Register values in DT are frowned upon. > > > > Hi Laurent Pinchart, as the different vendor has the different PCB layout, > > it effects DP CTS test result, so they may need config DP tx Swing register > > to adjust signal swing(the default swing setting is not satisfy for > > every platform). If we move the config code to driver file, it must define > > swing register setting for each vendor, so the DT is the best way. Do you > > have any idea for it if you don't agree to add in DT. > > If it depends on the PCB layout then it should indeed be in DT. What I > wonder is if there would be a better way to specify the data than > register values. The ANX7625 datasheet isn't public, so there's > effectively no way for someone to write a device tree compliant with > this binding only with the information contained here. Reviewing the > bindings is equally difficult. It would be best if this property instead > contained information that could be documented clearly. Hi Laurent Pinchart, the swing register setting is optional. Basically, no need to care about it if customer PCB layout match our chip requirement. The property define just in case. So far, we just found one customer encountered DP tx swing issue. As the datasheet swing register adjusting algorithm has a little complex, we will help customer to adjust the DP tx swing case by case. > > > > > + anx,mipi-dpi-in: > > > > + $ref: /schemas/types.yaml#/definitions/uint32 > > > > + description: indicate the MIPI rx signal type is DPI or DSI > > > > > > This sounds similar to the bus-type property defined in > > > Documentation/devicetree/bindings/media/video-interfaces.txt (which is > > > getting converted to YAML, Rob has posted a patch series, I expect it to > > > land in v5.13). I think it would make sense to extend bus-type to > > > support DSI, and use that property. > > > > Sorry, I didn't found any define for DPI or DSI flag in Rob's patches. > > Do you mean I just remove this flag define and call a special function > > to read the port's type(DSI or DPI)? > > video-interfaces.yaml has initially been written for cameras, so it > doesn't support DSI. I think it would make sense to extend the bus-type > property with a DSI type, and use it here instead of a vendor-specific > property. > > Alternatively, I'm wondering if this isn't information we could query at > runtime. DRM bridges and panels have a type, so we could look at the > next bridge or panel to find the type of the connected device instead of > specifying it in DT. At anx7625 driver probe stage, for the DSI, driver needs call some special interface to attach to DSI interface. For the DPI port, there is no such limitation, so we need to know what kind of MIPI signal type at driver initial stage. Maybe we can keep this flag, if the future has defined DSI, I'll submit new patch to remove this flag. Thanks, Xin > > > > > + > > > > ports: > > > > type: object > > > > > > > > @@ -72,6 +80,17 @@ examples: > > > > reg = <0x58>; > > > > enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; > > > > reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; > > > > + anx,swing-setting = <0x00 0x14>, <0x01 0x54>, > > > > + <0x02 0x64>, <0x03 0x74>, <0x04 0x29>, > > > > + <0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>, > > > > + <0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>, > > > > + <0x10 0x60>, <0x12 0x40>, <0x13 0x60>, > > > > + <0x14 0x14>, <0x15 0x54>, <0x16 0x64>, > > > > + <0x17 0x74>, <0x18 0x29>, <0x19 0x7b>, > > > > + <0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>, > > > > + <0x20 0x20>, <0x21 0x60>, <0x24 0x60>, > > > > + <0x26 0x40>, <0x27 0x60>; > > > > + anx,mipi-dpi-in = <0>; > > > > > > > > ports { > > > > #address-cells = <1>; > > -- > Regards, > > Laurent Pinchart _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support 2020-12-25 10:58 ` Xin Ji (?) @ 2020-12-25 11:02 ` Xin Ji -1 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-25 11:02 UTC (permalink / raw) To: Nicolas Boichat, Andrzej Hajda, Neil Armstrong, Laurent Pinchart Cc: Jonas Karlman, Jernej Skrabec, David Airlie, Daniel Vetter, Boris Brezillon, Sam Ravnborg, Hsin-Yi Wang, Torsten Duwe, Vasily Khoruzhick, Marek Szyprowski, Xin Ji, Sheng Pan, dri-devel, linux-kernel, devel Add MIPI rx DPI input support Signed-off-by: Xin Ji <xji@analogixsemi.com> --- drivers/gpu/drm/bridge/analogix/anx7625.c | 352 ++++++++++++++++++++++++++++-- drivers/gpu/drm/bridge/analogix/anx7625.h | 24 +- 2 files changed, 356 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 65cc059..0bb2adc 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -164,6 +164,20 @@ static int anx7625_write_and_or(struct anx7625_data *ctx, offset, (val & and_mask) | (or_mask)); } +static int anx7625_config_bit_matrix(struct anx7625_data *ctx) +{ + int i, ret; + + ret = anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, + AUDIO_CONTROL_REGISTER, 0x80); + for (i = 0; i < 13; i++) + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, + VIDEO_BIT_MATRIX_12 + i, + 0x18 + i); + + return ret; +} + static int anx7625_read_ctrl_status_p0(struct anx7625_data *ctx) { return anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, AP_AUX_CTRL_STATUS); @@ -189,10 +203,64 @@ static int wait_aux_op_finish(struct anx7625_data *ctx) AP_AUX_CTRL_STATUS); if (val < 0 || (val & 0x0F)) { DRM_DEV_ERROR(dev, "aux status %02x\n", val); - val = -EIO; + return -EIO; + } + + return 0; +} + +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx, + u8 addrh, u8 addrm, u8 addrl, + u8 len, u8 *buf) +{ + struct device *dev = &ctx->client->dev; + int ret; + u8 cmd; + + if (len > MAX_DPCD_BUFFER_SIZE) { + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n"); + return -E2BIG; + } + + cmd = ((len - 1) << 4) | 0x09; + + /* Set command and length */ + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + AP_AUX_COMMAND, cmd); + + /* Set aux access address */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + AP_AUX_ADDR_7_0, addrl); + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + AP_AUX_ADDR_15_8, addrm); + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, + AP_AUX_ADDR_19_16, addrh); + + /* Enable aux access */ + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client, + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN); + + if (ret < 0) { + DRM_DEV_ERROR(dev, "cannot access aux related register.\n"); + return -EIO; + } + + usleep_range(2000, 2100); + + ret = wait_aux_op_finish(ctx); + if (ret) { + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n"); + return ret; + } + + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client, + AP_AUX_BUFF_START, len, buf); + if (ret < 0) { + DRM_DEV_ERROR(dev, "read dpcd register failed\n"); + return -EIO; } - return val; + return 0; } static int anx7625_video_mute_control(struct anx7625_data *ctx, @@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx) return ret; } +static int anx7625_api_dpi_config(struct anx7625_data *ctx) +{ + struct device *dev = &ctx->client->dev; + u16 freq = ctx->dt.pixelclock.min / 1000; + int ret; + + /* configure pixel clock */ + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + PIXEL_CLOCK_L, freq & 0xFF); + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + PIXEL_CLOCK_H, (freq >> 8)); + + /* set DPI mode */ + /* set to DPI PLL module sel */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, + MIPI_DIGITAL_PLL_9, 0x20); + /* power down MIPI */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, + MIPI_LANE_CTRL_10, 0x08); + /* enable DPI mode */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, + MIPI_DIGITAL_PLL_18, 0x1C); + /* set first edge */ + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, + VIDEO_CONTROL_0, 0x06); + if (ret < 0) + DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n"); + + return ret; +} + +static int anx7625_dpi_config(struct anx7625_data *ctx) +{ + struct device *dev = &ctx->client->dev; + int ret; + + DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n"); + + /* DSC disable */ + ret = anx7625_write_and(ctx, ctx->i2c.rx_p0_client, + R_DSC_CTRL_0, ~DSC_EN); + if (ret < 0) { + DRM_DEV_ERROR(dev, "IO error : disable dsc failed.\n"); + return ret; + } + + ret = anx7625_config_bit_matrix(ctx); + if (ret < 0) { + DRM_DEV_ERROR(dev, "config bit matrix failed.\n"); + return ret; + } + + ret = anx7625_api_dpi_config(ctx); + if (ret < 0) { + DRM_DEV_ERROR(dev, "mipi phy(dpi) setup failed.\n"); + return ret; + } + + /* set MIPI RX EN */ + ret = anx7625_write_or(ctx, ctx->i2c.rx_p0_client, + AP_AV_STATUS, AP_MIPI_RX_EN); + /* clear mute flag */ + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, + AP_AV_STATUS, (u8)~AP_MIPI_MUTE); + if (ret < 0) + DRM_DEV_ERROR(dev, "IO error : enable mipi rx failed.\n"); + + return ret; +} + +static int anx7625_hdcp_setting(struct anx7625_data *ctx) +{ + u8 bcap; + struct device *dev = &ctx->client->dev; + + if (!(ctx->hdcp_support && ctx->hdcp_en)) { + DRM_DEV_DEBUG_DRIVER(dev, "hdcp_support(%d), hdcp_en(%d)\n", + ctx->hdcp_support, ctx->hdcp_en); + DRM_DEV_DEBUG_DRIVER(dev, "disable HDCP by config\n"); + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, + 0xee, 0x9f); + } + + anx7625_aux_dpcd_read(ctx, 0x06, 0x80, 0x28, 1, &bcap); + if (!(bcap & 0x01)) { + DRM_WARN("downstream not support HDCP 1.4, cap(%x).\n", bcap); + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, + 0xee, 0x9f); + } + + DRM_DEV_DEBUG_DRIVER(dev, "enable HDCP 1.4\n"); + + return anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xee, 0x20); +} + static void anx7625_dp_start(struct anx7625_data *ctx) { int ret; @@ -605,9 +768,15 @@ static void anx7625_dp_start(struct anx7625_data *ctx) return; } + /* HDCP config */ + anx7625_hdcp_setting(ctx); + anx7625_config_audio_input(ctx); - ret = anx7625_dsi_config(ctx); + if (ctx->pdata.is_dpi) + ret = anx7625_dpi_config(ctx); + else + ret = anx7625_dsi_config(ctx); if (ret < 0) DRM_DEV_ERROR(dev, "MIPI phy setup error.\n"); @@ -688,8 +857,53 @@ static int sp_tx_get_edid_block(struct anx7625_data *ctx) return c; } -static int edid_read(struct anx7625_data *ctx, - u8 offset, u8 *pblock_buf) +static int check_hdcp_support(struct anx7625_data *ctx) +{ + int ret; + struct device *dev = &ctx->client->dev; + + /* Select HDCP1.4 Key load */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_SRAM_SEL, 0x12); + /* Select flash addr low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_LOW, 0x91); + /* Select flash addr high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_HIGH, 0xa0); + /* Select sram length high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_HIGH, 0x00); + /* Select sram length low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_LOW, 0x27); + /* Select flash length high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_HIGH, 0x02); + /* Select flash length low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_LOW, 0x70); + /* Select sram addr high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_HIGH, 0x00); + /* Select sram addr low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_LOW, 0x00); + /* Enable load with decrypt_en */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA, 0x03); + + usleep_range(10000, 11000); + + /* Check load status */ + ret = anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA); + if (ret < 0) { + DRM_DEV_ERROR(dev, "IO error : access flash load.\n"); + return ret; + } + + if ((ret & 0xF2) != 0xF2) { + ctx->hdcp_support = 0; + DRM_DEV_DEBUG_DRIVER(dev, "not support HDCP\n"); + } else { + ctx->hdcp_support = 1; + DRM_DEV_DEBUG_DRIVER(dev, "support HDCP\n"); + } + + return 0; +} + +static int edid_read(struct anx7625_data *ctx, u8 offset, u8 *pblock_buf) { int ret, cnt; struct device *dev = &ctx->client->dev; @@ -718,6 +932,15 @@ static int edid_read(struct anx7625_data *ctx, return 0; } +void hdcp_enable(struct anx7625_data *ctx, int en) +{ + struct device *dev = &ctx->client->dev; + + DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en); + + ctx->hdcp_en = !!en; +} + static int segments_edid_read(struct anx7625_data *ctx, u8 segment, u8 *buf, u8 offset) { @@ -992,8 +1215,10 @@ static void anx7625_chip_control(struct anx7625_data *ctx, int state) if (state) { atomic_inc(&ctx->power_status); - if (atomic_read(&ctx->power_status) == 1) + if (atomic_read(&ctx->power_status) == 1) { anx7625_power_on_init(ctx); + check_hdcp_support(ctx); + } } else { if (atomic_read(&ctx->power_status)) { atomic_dec(&ctx->power_status); @@ -1051,6 +1276,7 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) return; } + ctx->hpd_status = 1; ctx->hpd_high_cnt++; /* Not support HDCP */ @@ -1060,8 +1286,10 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xec, 0x10); /* Interrupt for DRM */ ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xff, 0x01); - if (ret < 0) + if (ret < 0) { + DRM_DEV_ERROR(dev, "fail to setting HDCP/auth\n"); return; + } ret = anx7625_reg_read(ctx, ctx->i2c.rx_p1_client, 0x86); if (ret < 0) @@ -1080,6 +1308,10 @@ static void anx7625_hpd_polling(struct anx7625_data *ctx) int ret, val; struct device *dev = &ctx->client->dev; + /* Interrupt mode, no need poll HPD status, just return */ + if (ctx->pdata.intp_irq) + return; + if (atomic_read(&ctx->power_status) != 1) { DRM_DEV_DEBUG_DRIVER(dev, "No need to poling HPD status.\n"); return; @@ -1130,6 +1362,22 @@ static void anx7625_remove_edid(struct anx7625_data *ctx) ctx->slimport_edid_p.edid_block_num = -1; } +static void anx7625_dp_adjust_swing(struct anx7625_data *ctx) +{ + struct device *dev = &ctx->client->dev; + int i; + + if (!ctx->pdata.reg_table_size) + return; + + DRM_DEV_DEBUG_DRIVER(dev, "adjust DP tx swing\n"); + + for (i = 0; i < ctx->pdata.reg_table_size; i++) + anx7625_reg_write(ctx, ctx->i2c.tx_p1_client, + ctx->pdata.art[i].offset & 0xFF, + ctx->pdata.art[i].data & 0xFF); +} + static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) { struct device *dev = &ctx->client->dev; @@ -1145,9 +1393,8 @@ static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) } else { DRM_DEV_DEBUG_DRIVER(dev, " HPD high\n"); anx7625_start_dp_work(ctx); + anx7625_dp_adjust_swing(ctx); } - - ctx->hpd_status = 1; } static int anx7625_hpd_change_detect(struct anx7625_data *ctx) @@ -1224,12 +1471,63 @@ static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data) return IRQ_HANDLED; } +static int anx7625_get_u32_value(struct device_node *np, + const char *name, + int start_pos, + int *reg_data) +{ + int i, ret; + + /* each slot has 2 cells */ + for (i = 0; i < 2; i++) { + ret = of_property_read_u32_index(np, name, + start_pos + i, + ®_data[i]); + if (ret) + return ret; + } + + return 0; +} + static int anx7625_parse_dt(struct device *dev, struct anx7625_platform_data *pdata) { struct device_node *np = dev->of_node; struct drm_panel *panel; - int ret; + int ret, i; + int reg_data[2]; + int total_size, num_regs, start_pos; + + if (of_get_property(dev->of_node, "anx,swing-setting", &total_size)) { + /* each slot has 2 cells */ + num_regs = total_size / (sizeof(u32) * 2); + if (num_regs > MAX_REG_SIZE) + num_regs = MAX_REG_SIZE; + + pdata->reg_table_size = num_regs; + + for (i = 0; i < num_regs; i++) { + start_pos = i * 2; + ret = anx7625_get_u32_value(np, "anx,swing-setting", + start_pos, reg_data); + if (ret) { + DRM_DEV_ERROR(dev, "get swing-setting at %d\n", + start_pos); + return -ENODEV; + } + pdata->art[i].offset = reg_data[0]; + pdata->art[i].data = reg_data[1]; + } + } + + ret = of_property_read_u32(dev->of_node, "anx,mipi-dpi-in", + &pdata->is_dpi); + if (ret) + pdata->is_dpi = 0; /* default dsi mode */ + + DRM_DEV_DEBUG_DRIVER(dev, "MIPI RX is %s.\n", + pdata->is_dpi ? "DPI" : "DSI"); pdata->mipi_host_node = of_graph_get_remote_node(np, 0, 0); if (!pdata->mipi_host_node) { @@ -1237,7 +1535,7 @@ static int anx7625_parse_dt(struct device *dev, return -ENODEV; } - DRM_DEV_DEBUG_DRIVER(dev, "found dsi host node.\n"); + DRM_DEV_DEBUG_DRIVER(dev, "found MIPI host node.\n"); ret = drm_of_find_panel_or_bridge(np, 1, 0, &panel, NULL); if (ret < 0) { @@ -1300,9 +1598,13 @@ static enum drm_connector_status anx7625_sink_detect(struct anx7625_data *ctx) { struct device *dev = &ctx->client->dev; - DRM_DEV_DEBUG_DRIVER(dev, "sink detect, return connected\n"); + DRM_DEV_DEBUG_DRIVER(dev, "sink detect\n"); + + if (ctx->pdata.panel_bridge) + return connector_status_connected; - return connector_status_connected; + return ctx->hpd_status ? connector_status_connected : + connector_status_disconnected; } static int anx7625_attach_dsi(struct anx7625_data *ctx) @@ -1376,10 +1678,12 @@ static int anx7625_bridge_attach(struct drm_bridge *bridge, return -ENODEV; } - err = anx7625_attach_dsi(ctx); - if (err) { - DRM_DEV_ERROR(dev, "Fail to attach to dsi : %d\n", err); - return err; + if (!ctx->pdata.is_dpi) { + err = anx7625_attach_dsi(ctx); + if (err) { + DRM_DEV_ERROR(dev, "Fail to attach to dsi : %d\n", err); + return err; + } } if (ctx->pdata.panel_bridge) { @@ -1478,6 +1782,10 @@ static bool anx7625_bridge_mode_fixup(struct drm_bridge *bridge, DRM_DEV_DEBUG_DRIVER(dev, "drm mode fixup set\n"); + /* No need fixup for external monitor */ + if (!ctx->pdata.panel_bridge) + return true; + hsync = mode->hsync_end - mode->hsync_start; hfp = mode->hsync_start - mode->hdisplay; hbp = mode->htotal - mode->hsync_end; @@ -1777,6 +2085,7 @@ static int anx7625_i2c_probe(struct i2c_client *client, if (platform->pdata.low_power_mode == 0) { anx7625_disable_pd_protocol(platform); + check_hdcp_support(platform); atomic_set(&platform->power_status, 1); } @@ -1786,8 +2095,13 @@ static int anx7625_i2c_probe(struct i2c_client *client, platform->bridge.funcs = &anx7625_bridge_funcs; platform->bridge.of_node = client->dev.of_node; - platform->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_HPD; - platform->bridge.type = DRM_MODE_CONNECTOR_eDP; + platform->bridge.ops = DRM_BRIDGE_OP_EDID; + if (!platform->pdata.panel_bridge) + platform->bridge.ops |= DRM_BRIDGE_OP_HPD | + DRM_BRIDGE_OP_DETECT; + platform->bridge.type = platform->pdata.panel_bridge ? + DRM_MODE_CONNECTOR_eDP : + DRM_MODE_CONNECTOR_DisplayPort; drm_bridge_add(&platform->bridge); DRM_DEV_DEBUG_DRIVER(dev, "probe done\n"); diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/bridge/analogix/anx7625.h index 193ad86..0223e07 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.h +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h @@ -146,9 +146,19 @@ #define I2C_ADDR_7E_FLASH_CONTROLLER 0x7E -#define FLASH_LOAD_STA 0x05 +#define FLASH_SRAM_SEL 0x00 +#define SRAM_ADDR_HIGH 0x01 +#define SRAM_ADDR_LOW 0x02 +#define SRAM_LEN_HIGH 0x03 +#define SRAM_LEN_LOW 0x04 +#define FLASH_LOAD_STA 0x05 #define FLASH_LOAD_STA_CHK BIT(7) +#define FLASH_ADDR_LOW 0x0F +#define FLASH_ADDR_HIGH 0x10 +#define FLASH_LEN_HIGH 0x31 +#define FLASH_LEN_LOW 0x32 + #define XTAL_FRQ_SEL 0x3F /* bit field positions */ #define XTAL_FRQ_SEL_POS 5 @@ -340,6 +350,8 @@ enum audio_wd_len { #define EDID_TRY_CNT 3 #define SUPPORT_PIXEL_CLOCK 300000 +#define MAX_REG_SIZE 64 + struct s_edid_data { int edid_block_num; u8 edid_raw_data[FOUR_BLOCK_SIZE]; @@ -347,11 +359,19 @@ struct s_edid_data { /***************** Display End *****************/ +struct anx7625_reg_table { + int offset; + int data; +}; + struct anx7625_platform_data { struct gpio_desc *gpio_p_on; struct gpio_desc *gpio_reset; struct drm_bridge *panel_bridge; int intp_irq; + int is_dpi; + int reg_table_size; + struct anx7625_reg_table art[MAX_REG_SIZE]; u32 low_power_mode; struct device_node *mipi_host_node; }; @@ -371,6 +391,8 @@ struct anx7625_data { atomic_t power_status; int hpd_status; int hpd_high_cnt; + int hdcp_support; + int hdcp_en; /* Lock for work queue */ struct mutex lock; struct i2c_client *client; -- 2.7.4 ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support @ 2020-12-25 11:02 ` Xin Ji 0 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-25 11:02 UTC (permalink / raw) To: Nicolas Boichat, Andrzej Hajda, Neil Armstrong, Laurent Pinchart Cc: devel, Jernej Skrabec, Jonas Karlman, David Airlie, linux-kernel, dri-devel, Vasily Khoruzhick, Boris Brezillon, Torsten Duwe, Sheng Pan, Hsin-Yi Wang, Sam Ravnborg, Xin Ji, Marek Szyprowski Add MIPI rx DPI input support Signed-off-by: Xin Ji <xji@analogixsemi.com> --- drivers/gpu/drm/bridge/analogix/anx7625.c | 352 ++++++++++++++++++++++++++++-- drivers/gpu/drm/bridge/analogix/anx7625.h | 24 +- 2 files changed, 356 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 65cc059..0bb2adc 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -164,6 +164,20 @@ static int anx7625_write_and_or(struct anx7625_data *ctx, offset, (val & and_mask) | (or_mask)); } +static int anx7625_config_bit_matrix(struct anx7625_data *ctx) +{ + int i, ret; + + ret = anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, + AUDIO_CONTROL_REGISTER, 0x80); + for (i = 0; i < 13; i++) + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, + VIDEO_BIT_MATRIX_12 + i, + 0x18 + i); + + return ret; +} + static int anx7625_read_ctrl_status_p0(struct anx7625_data *ctx) { return anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, AP_AUX_CTRL_STATUS); @@ -189,10 +203,64 @@ static int wait_aux_op_finish(struct anx7625_data *ctx) AP_AUX_CTRL_STATUS); if (val < 0 || (val & 0x0F)) { DRM_DEV_ERROR(dev, "aux status %02x\n", val); - val = -EIO; + return -EIO; + } + + return 0; +} + +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx, + u8 addrh, u8 addrm, u8 addrl, + u8 len, u8 *buf) +{ + struct device *dev = &ctx->client->dev; + int ret; + u8 cmd; + + if (len > MAX_DPCD_BUFFER_SIZE) { + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n"); + return -E2BIG; + } + + cmd = ((len - 1) << 4) | 0x09; + + /* Set command and length */ + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + AP_AUX_COMMAND, cmd); + + /* Set aux access address */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + AP_AUX_ADDR_7_0, addrl); + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + AP_AUX_ADDR_15_8, addrm); + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, + AP_AUX_ADDR_19_16, addrh); + + /* Enable aux access */ + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client, + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN); + + if (ret < 0) { + DRM_DEV_ERROR(dev, "cannot access aux related register.\n"); + return -EIO; + } + + usleep_range(2000, 2100); + + ret = wait_aux_op_finish(ctx); + if (ret) { + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n"); + return ret; + } + + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client, + AP_AUX_BUFF_START, len, buf); + if (ret < 0) { + DRM_DEV_ERROR(dev, "read dpcd register failed\n"); + return -EIO; } - return val; + return 0; } static int anx7625_video_mute_control(struct anx7625_data *ctx, @@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx) return ret; } +static int anx7625_api_dpi_config(struct anx7625_data *ctx) +{ + struct device *dev = &ctx->client->dev; + u16 freq = ctx->dt.pixelclock.min / 1000; + int ret; + + /* configure pixel clock */ + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + PIXEL_CLOCK_L, freq & 0xFF); + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + PIXEL_CLOCK_H, (freq >> 8)); + + /* set DPI mode */ + /* set to DPI PLL module sel */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, + MIPI_DIGITAL_PLL_9, 0x20); + /* power down MIPI */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, + MIPI_LANE_CTRL_10, 0x08); + /* enable DPI mode */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, + MIPI_DIGITAL_PLL_18, 0x1C); + /* set first edge */ + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, + VIDEO_CONTROL_0, 0x06); + if (ret < 0) + DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n"); + + return ret; +} + +static int anx7625_dpi_config(struct anx7625_data *ctx) +{ + struct device *dev = &ctx->client->dev; + int ret; + + DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n"); + + /* DSC disable */ + ret = anx7625_write_and(ctx, ctx->i2c.rx_p0_client, + R_DSC_CTRL_0, ~DSC_EN); + if (ret < 0) { + DRM_DEV_ERROR(dev, "IO error : disable dsc failed.\n"); + return ret; + } + + ret = anx7625_config_bit_matrix(ctx); + if (ret < 0) { + DRM_DEV_ERROR(dev, "config bit matrix failed.\n"); + return ret; + } + + ret = anx7625_api_dpi_config(ctx); + if (ret < 0) { + DRM_DEV_ERROR(dev, "mipi phy(dpi) setup failed.\n"); + return ret; + } + + /* set MIPI RX EN */ + ret = anx7625_write_or(ctx, ctx->i2c.rx_p0_client, + AP_AV_STATUS, AP_MIPI_RX_EN); + /* clear mute flag */ + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, + AP_AV_STATUS, (u8)~AP_MIPI_MUTE); + if (ret < 0) + DRM_DEV_ERROR(dev, "IO error : enable mipi rx failed.\n"); + + return ret; +} + +static int anx7625_hdcp_setting(struct anx7625_data *ctx) +{ + u8 bcap; + struct device *dev = &ctx->client->dev; + + if (!(ctx->hdcp_support && ctx->hdcp_en)) { + DRM_DEV_DEBUG_DRIVER(dev, "hdcp_support(%d), hdcp_en(%d)\n", + ctx->hdcp_support, ctx->hdcp_en); + DRM_DEV_DEBUG_DRIVER(dev, "disable HDCP by config\n"); + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, + 0xee, 0x9f); + } + + anx7625_aux_dpcd_read(ctx, 0x06, 0x80, 0x28, 1, &bcap); + if (!(bcap & 0x01)) { + DRM_WARN("downstream not support HDCP 1.4, cap(%x).\n", bcap); + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, + 0xee, 0x9f); + } + + DRM_DEV_DEBUG_DRIVER(dev, "enable HDCP 1.4\n"); + + return anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xee, 0x20); +} + static void anx7625_dp_start(struct anx7625_data *ctx) { int ret; @@ -605,9 +768,15 @@ static void anx7625_dp_start(struct anx7625_data *ctx) return; } + /* HDCP config */ + anx7625_hdcp_setting(ctx); + anx7625_config_audio_input(ctx); - ret = anx7625_dsi_config(ctx); + if (ctx->pdata.is_dpi) + ret = anx7625_dpi_config(ctx); + else + ret = anx7625_dsi_config(ctx); if (ret < 0) DRM_DEV_ERROR(dev, "MIPI phy setup error.\n"); @@ -688,8 +857,53 @@ static int sp_tx_get_edid_block(struct anx7625_data *ctx) return c; } -static int edid_read(struct anx7625_data *ctx, - u8 offset, u8 *pblock_buf) +static int check_hdcp_support(struct anx7625_data *ctx) +{ + int ret; + struct device *dev = &ctx->client->dev; + + /* Select HDCP1.4 Key load */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_SRAM_SEL, 0x12); + /* Select flash addr low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_LOW, 0x91); + /* Select flash addr high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_HIGH, 0xa0); + /* Select sram length high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_HIGH, 0x00); + /* Select sram length low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_LOW, 0x27); + /* Select flash length high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_HIGH, 0x02); + /* Select flash length low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_LOW, 0x70); + /* Select sram addr high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_HIGH, 0x00); + /* Select sram addr low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_LOW, 0x00); + /* Enable load with decrypt_en */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA, 0x03); + + usleep_range(10000, 11000); + + /* Check load status */ + ret = anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA); + if (ret < 0) { + DRM_DEV_ERROR(dev, "IO error : access flash load.\n"); + return ret; + } + + if ((ret & 0xF2) != 0xF2) { + ctx->hdcp_support = 0; + DRM_DEV_DEBUG_DRIVER(dev, "not support HDCP\n"); + } else { + ctx->hdcp_support = 1; + DRM_DEV_DEBUG_DRIVER(dev, "support HDCP\n"); + } + + return 0; +} + +static int edid_read(struct anx7625_data *ctx, u8 offset, u8 *pblock_buf) { int ret, cnt; struct device *dev = &ctx->client->dev; @@ -718,6 +932,15 @@ static int edid_read(struct anx7625_data *ctx, return 0; } +void hdcp_enable(struct anx7625_data *ctx, int en) +{ + struct device *dev = &ctx->client->dev; + + DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en); + + ctx->hdcp_en = !!en; +} + static int segments_edid_read(struct anx7625_data *ctx, u8 segment, u8 *buf, u8 offset) { @@ -992,8 +1215,10 @@ static void anx7625_chip_control(struct anx7625_data *ctx, int state) if (state) { atomic_inc(&ctx->power_status); - if (atomic_read(&ctx->power_status) == 1) + if (atomic_read(&ctx->power_status) == 1) { anx7625_power_on_init(ctx); + check_hdcp_support(ctx); + } } else { if (atomic_read(&ctx->power_status)) { atomic_dec(&ctx->power_status); @@ -1051,6 +1276,7 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) return; } + ctx->hpd_status = 1; ctx->hpd_high_cnt++; /* Not support HDCP */ @@ -1060,8 +1286,10 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xec, 0x10); /* Interrupt for DRM */ ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xff, 0x01); - if (ret < 0) + if (ret < 0) { + DRM_DEV_ERROR(dev, "fail to setting HDCP/auth\n"); return; + } ret = anx7625_reg_read(ctx, ctx->i2c.rx_p1_client, 0x86); if (ret < 0) @@ -1080,6 +1308,10 @@ static void anx7625_hpd_polling(struct anx7625_data *ctx) int ret, val; struct device *dev = &ctx->client->dev; + /* Interrupt mode, no need poll HPD status, just return */ + if (ctx->pdata.intp_irq) + return; + if (atomic_read(&ctx->power_status) != 1) { DRM_DEV_DEBUG_DRIVER(dev, "No need to poling HPD status.\n"); return; @@ -1130,6 +1362,22 @@ static void anx7625_remove_edid(struct anx7625_data *ctx) ctx->slimport_edid_p.edid_block_num = -1; } +static void anx7625_dp_adjust_swing(struct anx7625_data *ctx) +{ + struct device *dev = &ctx->client->dev; + int i; + + if (!ctx->pdata.reg_table_size) + return; + + DRM_DEV_DEBUG_DRIVER(dev, "adjust DP tx swing\n"); + + for (i = 0; i < ctx->pdata.reg_table_size; i++) + anx7625_reg_write(ctx, ctx->i2c.tx_p1_client, + ctx->pdata.art[i].offset & 0xFF, + ctx->pdata.art[i].data & 0xFF); +} + static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) { struct device *dev = &ctx->client->dev; @@ -1145,9 +1393,8 @@ static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) } else { DRM_DEV_DEBUG_DRIVER(dev, " HPD high\n"); anx7625_start_dp_work(ctx); + anx7625_dp_adjust_swing(ctx); } - - ctx->hpd_status = 1; } static int anx7625_hpd_change_detect(struct anx7625_data *ctx) @@ -1224,12 +1471,63 @@ static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data) return IRQ_HANDLED; } +static int anx7625_get_u32_value(struct device_node *np, + const char *name, + int start_pos, + int *reg_data) +{ + int i, ret; + + /* each slot has 2 cells */ + for (i = 0; i < 2; i++) { + ret = of_property_read_u32_index(np, name, + start_pos + i, + ®_data[i]); + if (ret) + return ret; + } + + return 0; +} + static int anx7625_parse_dt(struct device *dev, struct anx7625_platform_data *pdata) { struct device_node *np = dev->of_node; struct drm_panel *panel; - int ret; + int ret, i; + int reg_data[2]; + int total_size, num_regs, start_pos; + + if (of_get_property(dev->of_node, "anx,swing-setting", &total_size)) { + /* each slot has 2 cells */ + num_regs = total_size / (sizeof(u32) * 2); + if (num_regs > MAX_REG_SIZE) + num_regs = MAX_REG_SIZE; + + pdata->reg_table_size = num_regs; + + for (i = 0; i < num_regs; i++) { + start_pos = i * 2; + ret = anx7625_get_u32_value(np, "anx,swing-setting", + start_pos, reg_data); + if (ret) { + DRM_DEV_ERROR(dev, "get swing-setting at %d\n", + start_pos); + return -ENODEV; + } + pdata->art[i].offset = reg_data[0]; + pdata->art[i].data = reg_data[1]; + } + } + + ret = of_property_read_u32(dev->of_node, "anx,mipi-dpi-in", + &pdata->is_dpi); + if (ret) + pdata->is_dpi = 0; /* default dsi mode */ + + DRM_DEV_DEBUG_DRIVER(dev, "MIPI RX is %s.\n", + pdata->is_dpi ? "DPI" : "DSI"); pdata->mipi_host_node = of_graph_get_remote_node(np, 0, 0); if (!pdata->mipi_host_node) { @@ -1237,7 +1535,7 @@ static int anx7625_parse_dt(struct device *dev, return -ENODEV; } - DRM_DEV_DEBUG_DRIVER(dev, "found dsi host node.\n"); + DRM_DEV_DEBUG_DRIVER(dev, "found MIPI host node.\n"); ret = drm_of_find_panel_or_bridge(np, 1, 0, &panel, NULL); if (ret < 0) { @@ -1300,9 +1598,13 @@ static enum drm_connector_status anx7625_sink_detect(struct anx7625_data *ctx) { struct device *dev = &ctx->client->dev; - DRM_DEV_DEBUG_DRIVER(dev, "sink detect, return connected\n"); + DRM_DEV_DEBUG_DRIVER(dev, "sink detect\n"); + + if (ctx->pdata.panel_bridge) + return connector_status_connected; - return connector_status_connected; + return ctx->hpd_status ? connector_status_connected : + connector_status_disconnected; } static int anx7625_attach_dsi(struct anx7625_data *ctx) @@ -1376,10 +1678,12 @@ static int anx7625_bridge_attach(struct drm_bridge *bridge, return -ENODEV; } - err = anx7625_attach_dsi(ctx); - if (err) { - DRM_DEV_ERROR(dev, "Fail to attach to dsi : %d\n", err); - return err; + if (!ctx->pdata.is_dpi) { + err = anx7625_attach_dsi(ctx); + if (err) { + DRM_DEV_ERROR(dev, "Fail to attach to dsi : %d\n", err); + return err; + } } if (ctx->pdata.panel_bridge) { @@ -1478,6 +1782,10 @@ static bool anx7625_bridge_mode_fixup(struct drm_bridge *bridge, DRM_DEV_DEBUG_DRIVER(dev, "drm mode fixup set\n"); + /* No need fixup for external monitor */ + if (!ctx->pdata.panel_bridge) + return true; + hsync = mode->hsync_end - mode->hsync_start; hfp = mode->hsync_start - mode->hdisplay; hbp = mode->htotal - mode->hsync_end; @@ -1777,6 +2085,7 @@ static int anx7625_i2c_probe(struct i2c_client *client, if (platform->pdata.low_power_mode == 0) { anx7625_disable_pd_protocol(platform); + check_hdcp_support(platform); atomic_set(&platform->power_status, 1); } @@ -1786,8 +2095,13 @@ static int anx7625_i2c_probe(struct i2c_client *client, platform->bridge.funcs = &anx7625_bridge_funcs; platform->bridge.of_node = client->dev.of_node; - platform->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_HPD; - platform->bridge.type = DRM_MODE_CONNECTOR_eDP; + platform->bridge.ops = DRM_BRIDGE_OP_EDID; + if (!platform->pdata.panel_bridge) + platform->bridge.ops |= DRM_BRIDGE_OP_HPD | + DRM_BRIDGE_OP_DETECT; + platform->bridge.type = platform->pdata.panel_bridge ? + DRM_MODE_CONNECTOR_eDP : + DRM_MODE_CONNECTOR_DisplayPort; drm_bridge_add(&platform->bridge); DRM_DEV_DEBUG_DRIVER(dev, "probe done\n"); diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/bridge/analogix/anx7625.h index 193ad86..0223e07 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.h +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h @@ -146,9 +146,19 @@ #define I2C_ADDR_7E_FLASH_CONTROLLER 0x7E -#define FLASH_LOAD_STA 0x05 +#define FLASH_SRAM_SEL 0x00 +#define SRAM_ADDR_HIGH 0x01 +#define SRAM_ADDR_LOW 0x02 +#define SRAM_LEN_HIGH 0x03 +#define SRAM_LEN_LOW 0x04 +#define FLASH_LOAD_STA 0x05 #define FLASH_LOAD_STA_CHK BIT(7) +#define FLASH_ADDR_LOW 0x0F +#define FLASH_ADDR_HIGH 0x10 +#define FLASH_LEN_HIGH 0x31 +#define FLASH_LEN_LOW 0x32 + #define XTAL_FRQ_SEL 0x3F /* bit field positions */ #define XTAL_FRQ_SEL_POS 5 @@ -340,6 +350,8 @@ enum audio_wd_len { #define EDID_TRY_CNT 3 #define SUPPORT_PIXEL_CLOCK 300000 +#define MAX_REG_SIZE 64 + struct s_edid_data { int edid_block_num; u8 edid_raw_data[FOUR_BLOCK_SIZE]; @@ -347,11 +359,19 @@ struct s_edid_data { /***************** Display End *****************/ +struct anx7625_reg_table { + int offset; + int data; +}; + struct anx7625_platform_data { struct gpio_desc *gpio_p_on; struct gpio_desc *gpio_reset; struct drm_bridge *panel_bridge; int intp_irq; + int is_dpi; + int reg_table_size; + struct anx7625_reg_table art[MAX_REG_SIZE]; u32 low_power_mode; struct device_node *mipi_host_node; }; @@ -371,6 +391,8 @@ struct anx7625_data { atomic_t power_status; int hpd_status; int hpd_high_cnt; + int hdcp_support; + int hdcp_en; /* Lock for work queue */ struct mutex lock; struct i2c_client *client; -- 2.7.4 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support @ 2020-12-25 11:02 ` Xin Ji 0 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2020-12-25 11:02 UTC (permalink / raw) To: Nicolas Boichat, Andrzej Hajda, Neil Armstrong, Laurent Pinchart Cc: devel, Jernej Skrabec, Jonas Karlman, David Airlie, linux-kernel, dri-devel, Vasily Khoruzhick, Boris Brezillon, Torsten Duwe, Sheng Pan, Daniel Vetter, Hsin-Yi Wang, Sam Ravnborg, Xin Ji, Marek Szyprowski Add MIPI rx DPI input support Signed-off-by: Xin Ji <xji@analogixsemi.com> --- drivers/gpu/drm/bridge/analogix/anx7625.c | 352 ++++++++++++++++++++++++++++-- drivers/gpu/drm/bridge/analogix/anx7625.h | 24 +- 2 files changed, 356 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 65cc059..0bb2adc 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -164,6 +164,20 @@ static int anx7625_write_and_or(struct anx7625_data *ctx, offset, (val & and_mask) | (or_mask)); } +static int anx7625_config_bit_matrix(struct anx7625_data *ctx) +{ + int i, ret; + + ret = anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, + AUDIO_CONTROL_REGISTER, 0x80); + for (i = 0; i < 13; i++) + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, + VIDEO_BIT_MATRIX_12 + i, + 0x18 + i); + + return ret; +} + static int anx7625_read_ctrl_status_p0(struct anx7625_data *ctx) { return anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, AP_AUX_CTRL_STATUS); @@ -189,10 +203,64 @@ static int wait_aux_op_finish(struct anx7625_data *ctx) AP_AUX_CTRL_STATUS); if (val < 0 || (val & 0x0F)) { DRM_DEV_ERROR(dev, "aux status %02x\n", val); - val = -EIO; + return -EIO; + } + + return 0; +} + +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx, + u8 addrh, u8 addrm, u8 addrl, + u8 len, u8 *buf) +{ + struct device *dev = &ctx->client->dev; + int ret; + u8 cmd; + + if (len > MAX_DPCD_BUFFER_SIZE) { + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n"); + return -E2BIG; + } + + cmd = ((len - 1) << 4) | 0x09; + + /* Set command and length */ + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + AP_AUX_COMMAND, cmd); + + /* Set aux access address */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + AP_AUX_ADDR_7_0, addrl); + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + AP_AUX_ADDR_15_8, addrm); + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, + AP_AUX_ADDR_19_16, addrh); + + /* Enable aux access */ + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client, + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN); + + if (ret < 0) { + DRM_DEV_ERROR(dev, "cannot access aux related register.\n"); + return -EIO; + } + + usleep_range(2000, 2100); + + ret = wait_aux_op_finish(ctx); + if (ret) { + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n"); + return ret; + } + + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client, + AP_AUX_BUFF_START, len, buf); + if (ret < 0) { + DRM_DEV_ERROR(dev, "read dpcd register failed\n"); + return -EIO; } - return val; + return 0; } static int anx7625_video_mute_control(struct anx7625_data *ctx, @@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx) return ret; } +static int anx7625_api_dpi_config(struct anx7625_data *ctx) +{ + struct device *dev = &ctx->client->dev; + u16 freq = ctx->dt.pixelclock.min / 1000; + int ret; + + /* configure pixel clock */ + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + PIXEL_CLOCK_L, freq & 0xFF); + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, + PIXEL_CLOCK_H, (freq >> 8)); + + /* set DPI mode */ + /* set to DPI PLL module sel */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, + MIPI_DIGITAL_PLL_9, 0x20); + /* power down MIPI */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, + MIPI_LANE_CTRL_10, 0x08); + /* enable DPI mode */ + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, + MIPI_DIGITAL_PLL_18, 0x1C); + /* set first edge */ + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, + VIDEO_CONTROL_0, 0x06); + if (ret < 0) + DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n"); + + return ret; +} + +static int anx7625_dpi_config(struct anx7625_data *ctx) +{ + struct device *dev = &ctx->client->dev; + int ret; + + DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n"); + + /* DSC disable */ + ret = anx7625_write_and(ctx, ctx->i2c.rx_p0_client, + R_DSC_CTRL_0, ~DSC_EN); + if (ret < 0) { + DRM_DEV_ERROR(dev, "IO error : disable dsc failed.\n"); + return ret; + } + + ret = anx7625_config_bit_matrix(ctx); + if (ret < 0) { + DRM_DEV_ERROR(dev, "config bit matrix failed.\n"); + return ret; + } + + ret = anx7625_api_dpi_config(ctx); + if (ret < 0) { + DRM_DEV_ERROR(dev, "mipi phy(dpi) setup failed.\n"); + return ret; + } + + /* set MIPI RX EN */ + ret = anx7625_write_or(ctx, ctx->i2c.rx_p0_client, + AP_AV_STATUS, AP_MIPI_RX_EN); + /* clear mute flag */ + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, + AP_AV_STATUS, (u8)~AP_MIPI_MUTE); + if (ret < 0) + DRM_DEV_ERROR(dev, "IO error : enable mipi rx failed.\n"); + + return ret; +} + +static int anx7625_hdcp_setting(struct anx7625_data *ctx) +{ + u8 bcap; + struct device *dev = &ctx->client->dev; + + if (!(ctx->hdcp_support && ctx->hdcp_en)) { + DRM_DEV_DEBUG_DRIVER(dev, "hdcp_support(%d), hdcp_en(%d)\n", + ctx->hdcp_support, ctx->hdcp_en); + DRM_DEV_DEBUG_DRIVER(dev, "disable HDCP by config\n"); + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, + 0xee, 0x9f); + } + + anx7625_aux_dpcd_read(ctx, 0x06, 0x80, 0x28, 1, &bcap); + if (!(bcap & 0x01)) { + DRM_WARN("downstream not support HDCP 1.4, cap(%x).\n", bcap); + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, + 0xee, 0x9f); + } + + DRM_DEV_DEBUG_DRIVER(dev, "enable HDCP 1.4\n"); + + return anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xee, 0x20); +} + static void anx7625_dp_start(struct anx7625_data *ctx) { int ret; @@ -605,9 +768,15 @@ static void anx7625_dp_start(struct anx7625_data *ctx) return; } + /* HDCP config */ + anx7625_hdcp_setting(ctx); + anx7625_config_audio_input(ctx); - ret = anx7625_dsi_config(ctx); + if (ctx->pdata.is_dpi) + ret = anx7625_dpi_config(ctx); + else + ret = anx7625_dsi_config(ctx); if (ret < 0) DRM_DEV_ERROR(dev, "MIPI phy setup error.\n"); @@ -688,8 +857,53 @@ static int sp_tx_get_edid_block(struct anx7625_data *ctx) return c; } -static int edid_read(struct anx7625_data *ctx, - u8 offset, u8 *pblock_buf) +static int check_hdcp_support(struct anx7625_data *ctx) +{ + int ret; + struct device *dev = &ctx->client->dev; + + /* Select HDCP1.4 Key load */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_SRAM_SEL, 0x12); + /* Select flash addr low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_LOW, 0x91); + /* Select flash addr high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_HIGH, 0xa0); + /* Select sram length high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_HIGH, 0x00); + /* Select sram length low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_LOW, 0x27); + /* Select flash length high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_HIGH, 0x02); + /* Select flash length low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_LOW, 0x70); + /* Select sram addr high byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_HIGH, 0x00); + /* Select sram addr low byte */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_LOW, 0x00); + /* Enable load with decrypt_en */ + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA, 0x03); + + usleep_range(10000, 11000); + + /* Check load status */ + ret = anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA); + if (ret < 0) { + DRM_DEV_ERROR(dev, "IO error : access flash load.\n"); + return ret; + } + + if ((ret & 0xF2) != 0xF2) { + ctx->hdcp_support = 0; + DRM_DEV_DEBUG_DRIVER(dev, "not support HDCP\n"); + } else { + ctx->hdcp_support = 1; + DRM_DEV_DEBUG_DRIVER(dev, "support HDCP\n"); + } + + return 0; +} + +static int edid_read(struct anx7625_data *ctx, u8 offset, u8 *pblock_buf) { int ret, cnt; struct device *dev = &ctx->client->dev; @@ -718,6 +932,15 @@ static int edid_read(struct anx7625_data *ctx, return 0; } +void hdcp_enable(struct anx7625_data *ctx, int en) +{ + struct device *dev = &ctx->client->dev; + + DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en); + + ctx->hdcp_en = !!en; +} + static int segments_edid_read(struct anx7625_data *ctx, u8 segment, u8 *buf, u8 offset) { @@ -992,8 +1215,10 @@ static void anx7625_chip_control(struct anx7625_data *ctx, int state) if (state) { atomic_inc(&ctx->power_status); - if (atomic_read(&ctx->power_status) == 1) + if (atomic_read(&ctx->power_status) == 1) { anx7625_power_on_init(ctx); + check_hdcp_support(ctx); + } } else { if (atomic_read(&ctx->power_status)) { atomic_dec(&ctx->power_status); @@ -1051,6 +1276,7 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) return; } + ctx->hpd_status = 1; ctx->hpd_high_cnt++; /* Not support HDCP */ @@ -1060,8 +1286,10 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xec, 0x10); /* Interrupt for DRM */ ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xff, 0x01); - if (ret < 0) + if (ret < 0) { + DRM_DEV_ERROR(dev, "fail to setting HDCP/auth\n"); return; + } ret = anx7625_reg_read(ctx, ctx->i2c.rx_p1_client, 0x86); if (ret < 0) @@ -1080,6 +1308,10 @@ static void anx7625_hpd_polling(struct anx7625_data *ctx) int ret, val; struct device *dev = &ctx->client->dev; + /* Interrupt mode, no need poll HPD status, just return */ + if (ctx->pdata.intp_irq) + return; + if (atomic_read(&ctx->power_status) != 1) { DRM_DEV_DEBUG_DRIVER(dev, "No need to poling HPD status.\n"); return; @@ -1130,6 +1362,22 @@ static void anx7625_remove_edid(struct anx7625_data *ctx) ctx->slimport_edid_p.edid_block_num = -1; } +static void anx7625_dp_adjust_swing(struct anx7625_data *ctx) +{ + struct device *dev = &ctx->client->dev; + int i; + + if (!ctx->pdata.reg_table_size) + return; + + DRM_DEV_DEBUG_DRIVER(dev, "adjust DP tx swing\n"); + + for (i = 0; i < ctx->pdata.reg_table_size; i++) + anx7625_reg_write(ctx, ctx->i2c.tx_p1_client, + ctx->pdata.art[i].offset & 0xFF, + ctx->pdata.art[i].data & 0xFF); +} + static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) { struct device *dev = &ctx->client->dev; @@ -1145,9 +1393,8 @@ static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) } else { DRM_DEV_DEBUG_DRIVER(dev, " HPD high\n"); anx7625_start_dp_work(ctx); + anx7625_dp_adjust_swing(ctx); } - - ctx->hpd_status = 1; } static int anx7625_hpd_change_detect(struct anx7625_data *ctx) @@ -1224,12 +1471,63 @@ static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data) return IRQ_HANDLED; } +static int anx7625_get_u32_value(struct device_node *np, + const char *name, + int start_pos, + int *reg_data) +{ + int i, ret; + + /* each slot has 2 cells */ + for (i = 0; i < 2; i++) { + ret = of_property_read_u32_index(np, name, + start_pos + i, + ®_data[i]); + if (ret) + return ret; + } + + return 0; +} + static int anx7625_parse_dt(struct device *dev, struct anx7625_platform_data *pdata) { struct device_node *np = dev->of_node; struct drm_panel *panel; - int ret; + int ret, i; + int reg_data[2]; + int total_size, num_regs, start_pos; + + if (of_get_property(dev->of_node, "anx,swing-setting", &total_size)) { + /* each slot has 2 cells */ + num_regs = total_size / (sizeof(u32) * 2); + if (num_regs > MAX_REG_SIZE) + num_regs = MAX_REG_SIZE; + + pdata->reg_table_size = num_regs; + + for (i = 0; i < num_regs; i++) { + start_pos = i * 2; + ret = anx7625_get_u32_value(np, "anx,swing-setting", + start_pos, reg_data); + if (ret) { + DRM_DEV_ERROR(dev, "get swing-setting at %d\n", + start_pos); + return -ENODEV; + } + pdata->art[i].offset = reg_data[0]; + pdata->art[i].data = reg_data[1]; + } + } + + ret = of_property_read_u32(dev->of_node, "anx,mipi-dpi-in", + &pdata->is_dpi); + if (ret) + pdata->is_dpi = 0; /* default dsi mode */ + + DRM_DEV_DEBUG_DRIVER(dev, "MIPI RX is %s.\n", + pdata->is_dpi ? "DPI" : "DSI"); pdata->mipi_host_node = of_graph_get_remote_node(np, 0, 0); if (!pdata->mipi_host_node) { @@ -1237,7 +1535,7 @@ static int anx7625_parse_dt(struct device *dev, return -ENODEV; } - DRM_DEV_DEBUG_DRIVER(dev, "found dsi host node.\n"); + DRM_DEV_DEBUG_DRIVER(dev, "found MIPI host node.\n"); ret = drm_of_find_panel_or_bridge(np, 1, 0, &panel, NULL); if (ret < 0) { @@ -1300,9 +1598,13 @@ static enum drm_connector_status anx7625_sink_detect(struct anx7625_data *ctx) { struct device *dev = &ctx->client->dev; - DRM_DEV_DEBUG_DRIVER(dev, "sink detect, return connected\n"); + DRM_DEV_DEBUG_DRIVER(dev, "sink detect\n"); + + if (ctx->pdata.panel_bridge) + return connector_status_connected; - return connector_status_connected; + return ctx->hpd_status ? connector_status_connected : + connector_status_disconnected; } static int anx7625_attach_dsi(struct anx7625_data *ctx) @@ -1376,10 +1678,12 @@ static int anx7625_bridge_attach(struct drm_bridge *bridge, return -ENODEV; } - err = anx7625_attach_dsi(ctx); - if (err) { - DRM_DEV_ERROR(dev, "Fail to attach to dsi : %d\n", err); - return err; + if (!ctx->pdata.is_dpi) { + err = anx7625_attach_dsi(ctx); + if (err) { + DRM_DEV_ERROR(dev, "Fail to attach to dsi : %d\n", err); + return err; + } } if (ctx->pdata.panel_bridge) { @@ -1478,6 +1782,10 @@ static bool anx7625_bridge_mode_fixup(struct drm_bridge *bridge, DRM_DEV_DEBUG_DRIVER(dev, "drm mode fixup set\n"); + /* No need fixup for external monitor */ + if (!ctx->pdata.panel_bridge) + return true; + hsync = mode->hsync_end - mode->hsync_start; hfp = mode->hsync_start - mode->hdisplay; hbp = mode->htotal - mode->hsync_end; @@ -1777,6 +2085,7 @@ static int anx7625_i2c_probe(struct i2c_client *client, if (platform->pdata.low_power_mode == 0) { anx7625_disable_pd_protocol(platform); + check_hdcp_support(platform); atomic_set(&platform->power_status, 1); } @@ -1786,8 +2095,13 @@ static int anx7625_i2c_probe(struct i2c_client *client, platform->bridge.funcs = &anx7625_bridge_funcs; platform->bridge.of_node = client->dev.of_node; - platform->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_HPD; - platform->bridge.type = DRM_MODE_CONNECTOR_eDP; + platform->bridge.ops = DRM_BRIDGE_OP_EDID; + if (!platform->pdata.panel_bridge) + platform->bridge.ops |= DRM_BRIDGE_OP_HPD | + DRM_BRIDGE_OP_DETECT; + platform->bridge.type = platform->pdata.panel_bridge ? + DRM_MODE_CONNECTOR_eDP : + DRM_MODE_CONNECTOR_DisplayPort; drm_bridge_add(&platform->bridge); DRM_DEV_DEBUG_DRIVER(dev, "probe done\n"); diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/bridge/analogix/anx7625.h index 193ad86..0223e07 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.h +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h @@ -146,9 +146,19 @@ #define I2C_ADDR_7E_FLASH_CONTROLLER 0x7E -#define FLASH_LOAD_STA 0x05 +#define FLASH_SRAM_SEL 0x00 +#define SRAM_ADDR_HIGH 0x01 +#define SRAM_ADDR_LOW 0x02 +#define SRAM_LEN_HIGH 0x03 +#define SRAM_LEN_LOW 0x04 +#define FLASH_LOAD_STA 0x05 #define FLASH_LOAD_STA_CHK BIT(7) +#define FLASH_ADDR_LOW 0x0F +#define FLASH_ADDR_HIGH 0x10 +#define FLASH_LEN_HIGH 0x31 +#define FLASH_LEN_LOW 0x32 + #define XTAL_FRQ_SEL 0x3F /* bit field positions */ #define XTAL_FRQ_SEL_POS 5 @@ -340,6 +350,8 @@ enum audio_wd_len { #define EDID_TRY_CNT 3 #define SUPPORT_PIXEL_CLOCK 300000 +#define MAX_REG_SIZE 64 + struct s_edid_data { int edid_block_num; u8 edid_raw_data[FOUR_BLOCK_SIZE]; @@ -347,11 +359,19 @@ struct s_edid_data { /***************** Display End *****************/ +struct anx7625_reg_table { + int offset; + int data; +}; + struct anx7625_platform_data { struct gpio_desc *gpio_p_on; struct gpio_desc *gpio_reset; struct drm_bridge *panel_bridge; int intp_irq; + int is_dpi; + int reg_table_size; + struct anx7625_reg_table art[MAX_REG_SIZE]; u32 low_power_mode; struct device_node *mipi_host_node; }; @@ -371,6 +391,8 @@ struct anx7625_data { atomic_t power_status; int hpd_status; int hpd_high_cnt; + int hdcp_support; + int hdcp_en; /* Lock for work queue */ struct mutex lock; struct i2c_client *client; -- 2.7.4 _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel ^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support 2020-12-25 11:02 ` Xin Ji (?) (?) @ 2020-12-29 5:37 ` kernel test robot -1 siblings, 0 replies; 30+ messages in thread From: kernel test robot @ 2020-12-29 5:37 UTC (permalink / raw) To: kbuild-all [-- Attachment #1: Type: text/plain, Size: 2131 bytes --] Hi Xin, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on drm-tip/drm-tip linus/master v5.11-rc1 next-20201223] [cannot apply to robh/for-next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Xin-Ji/Add-MIPI-rx-DPI-support/20201225-190825 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: arc-randconfig-p001-20201225 (attached as .config) compiler: arceb-elf-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/eb80dca31ef0506d1afd6590d453768456f2d646 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Xin-Ji/Add-MIPI-rx-DPI-support/20201225-190825 git checkout eb80dca31ef0506d1afd6590d453768456f2d646 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All warnings (new ones prefixed by >>): >> drivers/gpu/drm/bridge/analogix/anx7625.c:935:6: warning: no previous prototype for 'hdcp_enable' [-Wmissing-prototypes] 935 | void hdcp_enable(struct anx7625_data *ctx, int en) | ^~~~~~~~~~~ vim +/hdcp_enable +935 drivers/gpu/drm/bridge/analogix/anx7625.c 934 > 935 void hdcp_enable(struct anx7625_data *ctx, int en) 936 { 937 struct device *dev = &ctx->client->dev; 938 939 DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en); 940 941 ctx->hdcp_en = !!en; 942 } 943 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org [-- Attachment #2: config.gz --] [-- Type: application/gzip, Size: 31577 bytes --] ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support 2020-12-25 11:02 ` Xin Ji ` (2 preceding siblings ...) (?) @ 2020-12-30 15:42 ` kernel test robot -1 siblings, 0 replies; 30+ messages in thread From: kernel test robot @ 2020-12-30 15:42 UTC (permalink / raw) To: kbuild-all [-- Attachment #1: Type: text/plain, Size: 2555 bytes --] Hi Xin, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on drm-tip/drm-tip linus/master v5.11-rc1 next-20201223] [cannot apply to robh/for-next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Xin-Ji/Add-MIPI-rx-DPI-support/20201225-190825 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: arm64-randconfig-r026-20201230 (attached as .config) compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 3c0d36f977d9e012b245c796ddc8596ac3af659b) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm64 cross compiling tool for clang build # apt-get install binutils-aarch64-linux-gnu # https://github.com/0day-ci/linux/commit/eb80dca31ef0506d1afd6590d453768456f2d646 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Xin-Ji/Add-MIPI-rx-DPI-support/20201225-190825 git checkout eb80dca31ef0506d1afd6590d453768456f2d646 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All warnings (new ones prefixed by >>): >> drivers/gpu/drm/bridge/analogix/anx7625.c:935:6: warning: no previous prototype for function 'hdcp_enable' [-Wmissing-prototypes] void hdcp_enable(struct anx7625_data *ctx, int en) ^ drivers/gpu/drm/bridge/analogix/anx7625.c:935:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void hdcp_enable(struct anx7625_data *ctx, int en) ^ static 1 warning generated. vim +/hdcp_enable +935 drivers/gpu/drm/bridge/analogix/anx7625.c 934 > 935 void hdcp_enable(struct anx7625_data *ctx, int en) 936 { 937 struct device *dev = &ctx->client->dev; 938 939 DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en); 940 941 ctx->hdcp_en = !!en; 942 } 943 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org [-- Attachment #2: config.gz --] [-- Type: application/gzip, Size: 41523 bytes --] ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support 2020-12-25 11:02 ` Xin Ji (?) @ 2021-01-04 14:50 ` Dan Carpenter -1 siblings, 0 replies; 30+ messages in thread From: Dan Carpenter @ 2021-01-04 14:50 UTC (permalink / raw) To: Xin Ji Cc: Nicolas Boichat, Andrzej Hajda, Neil Armstrong, Laurent Pinchart, devel, Jernej Skrabec, Jonas Karlman, David Airlie, linux-kernel, dri-devel, Vasily Khoruzhick, Boris Brezillon, Torsten Duwe, Sheng Pan, Daniel Vetter, Hsin-Yi Wang, Sam Ravnborg, Marek Szyprowski On Fri, Dec 25, 2020 at 07:02:15PM +0800, Xin Ji wrote: > +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx, > + u8 addrh, u8 addrm, u8 addrl, > + u8 len, u8 *buf) > +{ > + struct device *dev = &ctx->client->dev; > + int ret; > + u8 cmd; > + > + if (len > MAX_DPCD_BUFFER_SIZE) { > + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n"); > + return -E2BIG; s/E2BIG/EINVAL/. -E2BIG means something else. > + } > + > + cmd = ((len - 1) << 4) | 0x09; > + > + /* Set command and length */ > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_COMMAND, cmd); > + > + /* Set aux access address */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_ADDR_7_0, addrl); > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_ADDR_15_8, addrm); > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_ADDR_19_16, addrh); > + > + /* Enable aux access */ > + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN); > + > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "cannot access aux related register.\n"); > + return -EIO; > + } > + > + usleep_range(2000, 2100); > + > + ret = wait_aux_op_finish(ctx); > + if (ret) { > + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n"); > + return ret; > + } > + > + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_BUFF_START, len, buf); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "read dpcd register failed\n"); > + return -EIO; > } > > - return val; > + return 0; > } > > static int anx7625_video_mute_control(struct anx7625_data *ctx, > @@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx) > return ret; > } > > +static int anx7625_api_dpi_config(struct anx7625_data *ctx) > +{ > + struct device *dev = &ctx->client->dev; > + u16 freq = ctx->dt.pixelclock.min / 1000; > + int ret; > + > + /* configure pixel clock */ > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + PIXEL_CLOCK_L, freq & 0xFF); > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + PIXEL_CLOCK_H, (freq >> 8)); > + > + /* set DPI mode */ > + /* set to DPI PLL module sel */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > + MIPI_DIGITAL_PLL_9, 0x20); > + /* power down MIPI */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > + MIPI_LANE_CTRL_10, 0x08); > + /* enable DPI mode */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > + MIPI_DIGITAL_PLL_18, 0x1C); > + /* set first edge */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, > + VIDEO_CONTROL_0, 0x06); > + if (ret < 0) > + DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n"); > + > + return ret; > +} > + > +static int anx7625_dpi_config(struct anx7625_data *ctx) > +{ > + struct device *dev = &ctx->client->dev; > + int ret; > + > + DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n"); > + > + /* DSC disable */ > + ret = anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > + R_DSC_CTRL_0, ~DSC_EN); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "IO error : disable dsc failed.\n"); > + return ret; > + } > + > + ret = anx7625_config_bit_matrix(ctx); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "config bit matrix failed.\n"); > + return ret; > + } > + > + ret = anx7625_api_dpi_config(ctx); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "mipi phy(dpi) setup failed.\n"); > + return ret; > + } > + > + /* set MIPI RX EN */ > + ret = anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > + AP_AV_STATUS, AP_MIPI_RX_EN); > + /* clear mute flag */ > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > + AP_AV_STATUS, (u8)~AP_MIPI_MUTE); > + if (ret < 0) > + DRM_DEV_ERROR(dev, "IO error : enable mipi rx failed.\n"); > + > + return ret; > +} > + > +static int anx7625_hdcp_setting(struct anx7625_data *ctx) > +{ > + u8 bcap; > + struct device *dev = &ctx->client->dev; > + > + if (!(ctx->hdcp_support && ctx->hdcp_en)) { Push the ! in and remove the parentheses. if (!ctx->hdcp_support || !ctx->hdcp_en) { > + DRM_DEV_DEBUG_DRIVER(dev, "hdcp_support(%d), hdcp_en(%d)\n", > + ctx->hdcp_support, ctx->hdcp_en); > + DRM_DEV_DEBUG_DRIVER(dev, "disable HDCP by config\n"); > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > + 0xee, 0x9f); > + } > + > + anx7625_aux_dpcd_read(ctx, 0x06, 0x80, 0x28, 1, &bcap); > + if (!(bcap & 0x01)) { > + DRM_WARN("downstream not support HDCP 1.4, cap(%x).\n", bcap); > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > + 0xee, 0x9f); > + } > + > + DRM_DEV_DEBUG_DRIVER(dev, "enable HDCP 1.4\n"); > + > + return anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xee, 0x20); > +} > + > static void anx7625_dp_start(struct anx7625_data *ctx) > { > int ret; > @@ -605,9 +768,15 @@ static void anx7625_dp_start(struct anx7625_data *ctx) > return; > } > > + /* HDCP config */ > + anx7625_hdcp_setting(ctx); > + > anx7625_config_audio_input(ctx); > > - ret = anx7625_dsi_config(ctx); > + if (ctx->pdata.is_dpi) > + ret = anx7625_dpi_config(ctx); > + else > + ret = anx7625_dsi_config(ctx); > > if (ret < 0) > DRM_DEV_ERROR(dev, "MIPI phy setup error.\n"); > @@ -688,8 +857,53 @@ static int sp_tx_get_edid_block(struct anx7625_data *ctx) > return c; > } > > -static int edid_read(struct anx7625_data *ctx, > - u8 offset, u8 *pblock_buf) > +static int check_hdcp_support(struct anx7625_data *ctx) > +{ > + int ret; > + struct device *dev = &ctx->client->dev; > + > + /* Select HDCP1.4 Key load */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_SRAM_SEL, 0x12); > + /* Select flash addr low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_LOW, 0x91); > + /* Select flash addr high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_HIGH, 0xa0); > + /* Select sram length high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_HIGH, 0x00); > + /* Select sram length low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_LOW, 0x27); > + /* Select flash length high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_HIGH, 0x02); > + /* Select flash length low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_LOW, 0x70); > + /* Select sram addr high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_HIGH, 0x00); > + /* Select sram addr low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_LOW, 0x00); > + /* Enable load with decrypt_en */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA, 0x03); > + > + usleep_range(10000, 11000); > + > + /* Check load status */ > + ret = anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "IO error : access flash load.\n"); > + return ret; > + } > + > + if ((ret & 0xF2) != 0xF2) { > + ctx->hdcp_support = 0; > + DRM_DEV_DEBUG_DRIVER(dev, "not support HDCP\n"); > + } else { > + ctx->hdcp_support = 1; > + DRM_DEV_DEBUG_DRIVER(dev, "support HDCP\n"); > + } > + > + return 0; > +} > + > +static int edid_read(struct anx7625_data *ctx, u8 offset, u8 *pblock_buf) > { > int ret, cnt; > struct device *dev = &ctx->client->dev; > @@ -718,6 +932,15 @@ static int edid_read(struct anx7625_data *ctx, > return 0; > } > > +void hdcp_enable(struct anx7625_data *ctx, int en) > +{ > + struct device *dev = &ctx->client->dev; > + > + DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en); > + > + ctx->hdcp_en = !!en; > +} > + > static int segments_edid_read(struct anx7625_data *ctx, > u8 segment, u8 *buf, u8 offset) > { > @@ -992,8 +1215,10 @@ static void anx7625_chip_control(struct anx7625_data *ctx, int state) > > if (state) { > atomic_inc(&ctx->power_status); > - if (atomic_read(&ctx->power_status) == 1) > + if (atomic_read(&ctx->power_status) == 1) { > anx7625_power_on_init(ctx); > + check_hdcp_support(ctx); > + } > } else { > if (atomic_read(&ctx->power_status)) { > atomic_dec(&ctx->power_status); > @@ -1051,6 +1276,7 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > return; > } > > + ctx->hpd_status = 1; > ctx->hpd_high_cnt++; > > /* Not support HDCP */ > @@ -1060,8 +1286,10 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xec, 0x10); > /* Interrupt for DRM */ > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xff, 0x01); > - if (ret < 0) > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "fail to setting HDCP/auth\n"); > return; > + } > > ret = anx7625_reg_read(ctx, ctx->i2c.rx_p1_client, 0x86); > if (ret < 0) > @@ -1080,6 +1308,10 @@ static void anx7625_hpd_polling(struct anx7625_data *ctx) > int ret, val; > struct device *dev = &ctx->client->dev; > > + /* Interrupt mode, no need poll HPD status, just return */ > + if (ctx->pdata.intp_irq) > + return; > + > if (atomic_read(&ctx->power_status) != 1) { > DRM_DEV_DEBUG_DRIVER(dev, "No need to poling HPD status.\n"); > return; > @@ -1130,6 +1362,22 @@ static void anx7625_remove_edid(struct anx7625_data *ctx) > ctx->slimport_edid_p.edid_block_num = -1; > } > > +static void anx7625_dp_adjust_swing(struct anx7625_data *ctx) > +{ > + struct device *dev = &ctx->client->dev; > + int i; > + > + if (!ctx->pdata.reg_table_size) > + return; No need for this check. Just remove it and the for loop becomes a no-op. > + > + DRM_DEV_DEBUG_DRIVER(dev, "adjust DP tx swing\n"); Delete this debug statement and use ftrace for this information. > + > + for (i = 0; i < ctx->pdata.reg_table_size; i++) > + anx7625_reg_write(ctx, ctx->i2c.tx_p1_client, > + ctx->pdata.art[i].offset & 0xFF, > + ctx->pdata.art[i].data & 0xFF); > +} > + > static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > { > struct device *dev = &ctx->client->dev; > @@ -1145,9 +1393,8 @@ static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > } else { > DRM_DEV_DEBUG_DRIVER(dev, " HPD high\n"); > anx7625_start_dp_work(ctx); > + anx7625_dp_adjust_swing(ctx); > } > - > - ctx->hpd_status = 1; > } > > static int anx7625_hpd_change_detect(struct anx7625_data *ctx) > @@ -1224,12 +1471,63 @@ static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data) > return IRQ_HANDLED; > } > > +static int anx7625_get_u32_value(struct device_node *np, > + const char *name, > + int start_pos, > + int *reg_data) > +{ > + int i, ret; > + > + /* each slot has 2 cells */ > + for (i = 0; i < 2; i++) { > + ret = of_property_read_u32_index(np, name, > + start_pos + i, > + ®_data[i]); > + if (ret) > + return ret; > + } > + > + return 0; > +} > + > static int anx7625_parse_dt(struct device *dev, > struct anx7625_platform_data *pdata) > { > struct device_node *np = dev->of_node; > struct drm_panel *panel; > - int ret; > + int ret, i; > + int reg_data[2]; > + int total_size, num_regs, start_pos; > + > + if (of_get_property(dev->of_node, "anx,swing-setting", &total_size)) { > + /* each slot has 2 cells */ > + num_regs = total_size / (sizeof(u32) * 2); > + if (num_regs > MAX_REG_SIZE) > + num_regs = MAX_REG_SIZE; > + > + pdata->reg_table_size = num_regs; > + > + for (i = 0; i < num_regs; i++) { > + start_pos = i * 2; > + ret = anx7625_get_u32_value(np, "anx,swing-setting", > + start_pos, reg_data); > + if (ret) { > + DRM_DEV_ERROR(dev, "get swing-setting at %d\n", > + start_pos); > + return -ENODEV; return ret;? regards, dan carpenter ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support @ 2021-01-04 14:50 ` Dan Carpenter 0 siblings, 0 replies; 30+ messages in thread From: Dan Carpenter @ 2021-01-04 14:50 UTC (permalink / raw) To: Xin Ji Cc: devel, Nicolas Boichat, Jernej Skrabec, Neil Armstrong, David Airlie, Jonas Karlman, linux-kernel, dri-devel, Vasily Khoruzhick, Andrzej Hajda, Boris Brezillon, Torsten Duwe, Laurent Pinchart, Hsin-Yi Wang, Marek Szyprowski, Sam Ravnborg, Sheng Pan On Fri, Dec 25, 2020 at 07:02:15PM +0800, Xin Ji wrote: > +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx, > + u8 addrh, u8 addrm, u8 addrl, > + u8 len, u8 *buf) > +{ > + struct device *dev = &ctx->client->dev; > + int ret; > + u8 cmd; > + > + if (len > MAX_DPCD_BUFFER_SIZE) { > + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n"); > + return -E2BIG; s/E2BIG/EINVAL/. -E2BIG means something else. > + } > + > + cmd = ((len - 1) << 4) | 0x09; > + > + /* Set command and length */ > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_COMMAND, cmd); > + > + /* Set aux access address */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_ADDR_7_0, addrl); > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_ADDR_15_8, addrm); > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_ADDR_19_16, addrh); > + > + /* Enable aux access */ > + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN); > + > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "cannot access aux related register.\n"); > + return -EIO; > + } > + > + usleep_range(2000, 2100); > + > + ret = wait_aux_op_finish(ctx); > + if (ret) { > + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n"); > + return ret; > + } > + > + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_BUFF_START, len, buf); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "read dpcd register failed\n"); > + return -EIO; > } > > - return val; > + return 0; > } > > static int anx7625_video_mute_control(struct anx7625_data *ctx, > @@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx) > return ret; > } > > +static int anx7625_api_dpi_config(struct anx7625_data *ctx) > +{ > + struct device *dev = &ctx->client->dev; > + u16 freq = ctx->dt.pixelclock.min / 1000; > + int ret; > + > + /* configure pixel clock */ > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + PIXEL_CLOCK_L, freq & 0xFF); > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + PIXEL_CLOCK_H, (freq >> 8)); > + > + /* set DPI mode */ > + /* set to DPI PLL module sel */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > + MIPI_DIGITAL_PLL_9, 0x20); > + /* power down MIPI */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > + MIPI_LANE_CTRL_10, 0x08); > + /* enable DPI mode */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > + MIPI_DIGITAL_PLL_18, 0x1C); > + /* set first edge */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, > + VIDEO_CONTROL_0, 0x06); > + if (ret < 0) > + DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n"); > + > + return ret; > +} > + > +static int anx7625_dpi_config(struct anx7625_data *ctx) > +{ > + struct device *dev = &ctx->client->dev; > + int ret; > + > + DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n"); > + > + /* DSC disable */ > + ret = anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > + R_DSC_CTRL_0, ~DSC_EN); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "IO error : disable dsc failed.\n"); > + return ret; > + } > + > + ret = anx7625_config_bit_matrix(ctx); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "config bit matrix failed.\n"); > + return ret; > + } > + > + ret = anx7625_api_dpi_config(ctx); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "mipi phy(dpi) setup failed.\n"); > + return ret; > + } > + > + /* set MIPI RX EN */ > + ret = anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > + AP_AV_STATUS, AP_MIPI_RX_EN); > + /* clear mute flag */ > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > + AP_AV_STATUS, (u8)~AP_MIPI_MUTE); > + if (ret < 0) > + DRM_DEV_ERROR(dev, "IO error : enable mipi rx failed.\n"); > + > + return ret; > +} > + > +static int anx7625_hdcp_setting(struct anx7625_data *ctx) > +{ > + u8 bcap; > + struct device *dev = &ctx->client->dev; > + > + if (!(ctx->hdcp_support && ctx->hdcp_en)) { Push the ! in and remove the parentheses. if (!ctx->hdcp_support || !ctx->hdcp_en) { > + DRM_DEV_DEBUG_DRIVER(dev, "hdcp_support(%d), hdcp_en(%d)\n", > + ctx->hdcp_support, ctx->hdcp_en); > + DRM_DEV_DEBUG_DRIVER(dev, "disable HDCP by config\n"); > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > + 0xee, 0x9f); > + } > + > + anx7625_aux_dpcd_read(ctx, 0x06, 0x80, 0x28, 1, &bcap); > + if (!(bcap & 0x01)) { > + DRM_WARN("downstream not support HDCP 1.4, cap(%x).\n", bcap); > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > + 0xee, 0x9f); > + } > + > + DRM_DEV_DEBUG_DRIVER(dev, "enable HDCP 1.4\n"); > + > + return anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xee, 0x20); > +} > + > static void anx7625_dp_start(struct anx7625_data *ctx) > { > int ret; > @@ -605,9 +768,15 @@ static void anx7625_dp_start(struct anx7625_data *ctx) > return; > } > > + /* HDCP config */ > + anx7625_hdcp_setting(ctx); > + > anx7625_config_audio_input(ctx); > > - ret = anx7625_dsi_config(ctx); > + if (ctx->pdata.is_dpi) > + ret = anx7625_dpi_config(ctx); > + else > + ret = anx7625_dsi_config(ctx); > > if (ret < 0) > DRM_DEV_ERROR(dev, "MIPI phy setup error.\n"); > @@ -688,8 +857,53 @@ static int sp_tx_get_edid_block(struct anx7625_data *ctx) > return c; > } > > -static int edid_read(struct anx7625_data *ctx, > - u8 offset, u8 *pblock_buf) > +static int check_hdcp_support(struct anx7625_data *ctx) > +{ > + int ret; > + struct device *dev = &ctx->client->dev; > + > + /* Select HDCP1.4 Key load */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_SRAM_SEL, 0x12); > + /* Select flash addr low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_LOW, 0x91); > + /* Select flash addr high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_HIGH, 0xa0); > + /* Select sram length high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_HIGH, 0x00); > + /* Select sram length low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_LOW, 0x27); > + /* Select flash length high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_HIGH, 0x02); > + /* Select flash length low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_LOW, 0x70); > + /* Select sram addr high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_HIGH, 0x00); > + /* Select sram addr low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_LOW, 0x00); > + /* Enable load with decrypt_en */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA, 0x03); > + > + usleep_range(10000, 11000); > + > + /* Check load status */ > + ret = anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "IO error : access flash load.\n"); > + return ret; > + } > + > + if ((ret & 0xF2) != 0xF2) { > + ctx->hdcp_support = 0; > + DRM_DEV_DEBUG_DRIVER(dev, "not support HDCP\n"); > + } else { > + ctx->hdcp_support = 1; > + DRM_DEV_DEBUG_DRIVER(dev, "support HDCP\n"); > + } > + > + return 0; > +} > + > +static int edid_read(struct anx7625_data *ctx, u8 offset, u8 *pblock_buf) > { > int ret, cnt; > struct device *dev = &ctx->client->dev; > @@ -718,6 +932,15 @@ static int edid_read(struct anx7625_data *ctx, > return 0; > } > > +void hdcp_enable(struct anx7625_data *ctx, int en) > +{ > + struct device *dev = &ctx->client->dev; > + > + DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en); > + > + ctx->hdcp_en = !!en; > +} > + > static int segments_edid_read(struct anx7625_data *ctx, > u8 segment, u8 *buf, u8 offset) > { > @@ -992,8 +1215,10 @@ static void anx7625_chip_control(struct anx7625_data *ctx, int state) > > if (state) { > atomic_inc(&ctx->power_status); > - if (atomic_read(&ctx->power_status) == 1) > + if (atomic_read(&ctx->power_status) == 1) { > anx7625_power_on_init(ctx); > + check_hdcp_support(ctx); > + } > } else { > if (atomic_read(&ctx->power_status)) { > atomic_dec(&ctx->power_status); > @@ -1051,6 +1276,7 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > return; > } > > + ctx->hpd_status = 1; > ctx->hpd_high_cnt++; > > /* Not support HDCP */ > @@ -1060,8 +1286,10 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xec, 0x10); > /* Interrupt for DRM */ > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xff, 0x01); > - if (ret < 0) > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "fail to setting HDCP/auth\n"); > return; > + } > > ret = anx7625_reg_read(ctx, ctx->i2c.rx_p1_client, 0x86); > if (ret < 0) > @@ -1080,6 +1308,10 @@ static void anx7625_hpd_polling(struct anx7625_data *ctx) > int ret, val; > struct device *dev = &ctx->client->dev; > > + /* Interrupt mode, no need poll HPD status, just return */ > + if (ctx->pdata.intp_irq) > + return; > + > if (atomic_read(&ctx->power_status) != 1) { > DRM_DEV_DEBUG_DRIVER(dev, "No need to poling HPD status.\n"); > return; > @@ -1130,6 +1362,22 @@ static void anx7625_remove_edid(struct anx7625_data *ctx) > ctx->slimport_edid_p.edid_block_num = -1; > } > > +static void anx7625_dp_adjust_swing(struct anx7625_data *ctx) > +{ > + struct device *dev = &ctx->client->dev; > + int i; > + > + if (!ctx->pdata.reg_table_size) > + return; No need for this check. Just remove it and the for loop becomes a no-op. > + > + DRM_DEV_DEBUG_DRIVER(dev, "adjust DP tx swing\n"); Delete this debug statement and use ftrace for this information. > + > + for (i = 0; i < ctx->pdata.reg_table_size; i++) > + anx7625_reg_write(ctx, ctx->i2c.tx_p1_client, > + ctx->pdata.art[i].offset & 0xFF, > + ctx->pdata.art[i].data & 0xFF); > +} > + > static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > { > struct device *dev = &ctx->client->dev; > @@ -1145,9 +1393,8 @@ static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > } else { > DRM_DEV_DEBUG_DRIVER(dev, " HPD high\n"); > anx7625_start_dp_work(ctx); > + anx7625_dp_adjust_swing(ctx); > } > - > - ctx->hpd_status = 1; > } > > static int anx7625_hpd_change_detect(struct anx7625_data *ctx) > @@ -1224,12 +1471,63 @@ static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data) > return IRQ_HANDLED; > } > > +static int anx7625_get_u32_value(struct device_node *np, > + const char *name, > + int start_pos, > + int *reg_data) > +{ > + int i, ret; > + > + /* each slot has 2 cells */ > + for (i = 0; i < 2; i++) { > + ret = of_property_read_u32_index(np, name, > + start_pos + i, > + ®_data[i]); > + if (ret) > + return ret; > + } > + > + return 0; > +} > + > static int anx7625_parse_dt(struct device *dev, > struct anx7625_platform_data *pdata) > { > struct device_node *np = dev->of_node; > struct drm_panel *panel; > - int ret; > + int ret, i; > + int reg_data[2]; > + int total_size, num_regs, start_pos; > + > + if (of_get_property(dev->of_node, "anx,swing-setting", &total_size)) { > + /* each slot has 2 cells */ > + num_regs = total_size / (sizeof(u32) * 2); > + if (num_regs > MAX_REG_SIZE) > + num_regs = MAX_REG_SIZE; > + > + pdata->reg_table_size = num_regs; > + > + for (i = 0; i < num_regs; i++) { > + start_pos = i * 2; > + ret = anx7625_get_u32_value(np, "anx,swing-setting", > + start_pos, reg_data); > + if (ret) { > + DRM_DEV_ERROR(dev, "get swing-setting at %d\n", > + start_pos); > + return -ENODEV; return ret;? regards, dan carpenter _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support @ 2021-01-04 14:50 ` Dan Carpenter 0 siblings, 0 replies; 30+ messages in thread From: Dan Carpenter @ 2021-01-04 14:50 UTC (permalink / raw) To: Xin Ji Cc: devel, Nicolas Boichat, Jernej Skrabec, Neil Armstrong, David Airlie, Jonas Karlman, linux-kernel, dri-devel, Vasily Khoruzhick, Andrzej Hajda, Boris Brezillon, Torsten Duwe, Laurent Pinchart, Daniel Vetter, Hsin-Yi Wang, Marek Szyprowski, Sam Ravnborg, Sheng Pan On Fri, Dec 25, 2020 at 07:02:15PM +0800, Xin Ji wrote: > +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx, > + u8 addrh, u8 addrm, u8 addrl, > + u8 len, u8 *buf) > +{ > + struct device *dev = &ctx->client->dev; > + int ret; > + u8 cmd; > + > + if (len > MAX_DPCD_BUFFER_SIZE) { > + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n"); > + return -E2BIG; s/E2BIG/EINVAL/. -E2BIG means something else. > + } > + > + cmd = ((len - 1) << 4) | 0x09; > + > + /* Set command and length */ > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_COMMAND, cmd); > + > + /* Set aux access address */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_ADDR_7_0, addrl); > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_ADDR_15_8, addrm); > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_ADDR_19_16, addrh); > + > + /* Enable aux access */ > + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN); > + > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "cannot access aux related register.\n"); > + return -EIO; > + } > + > + usleep_range(2000, 2100); > + > + ret = wait_aux_op_finish(ctx); > + if (ret) { > + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n"); > + return ret; > + } > + > + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client, > + AP_AUX_BUFF_START, len, buf); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "read dpcd register failed\n"); > + return -EIO; > } > > - return val; > + return 0; > } > > static int anx7625_video_mute_control(struct anx7625_data *ctx, > @@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx) > return ret; > } > > +static int anx7625_api_dpi_config(struct anx7625_data *ctx) > +{ > + struct device *dev = &ctx->client->dev; > + u16 freq = ctx->dt.pixelclock.min / 1000; > + int ret; > + > + /* configure pixel clock */ > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + PIXEL_CLOCK_L, freq & 0xFF); > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > + PIXEL_CLOCK_H, (freq >> 8)); > + > + /* set DPI mode */ > + /* set to DPI PLL module sel */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > + MIPI_DIGITAL_PLL_9, 0x20); > + /* power down MIPI */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > + MIPI_LANE_CTRL_10, 0x08); > + /* enable DPI mode */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > + MIPI_DIGITAL_PLL_18, 0x1C); > + /* set first edge */ > + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, > + VIDEO_CONTROL_0, 0x06); > + if (ret < 0) > + DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n"); > + > + return ret; > +} > + > +static int anx7625_dpi_config(struct anx7625_data *ctx) > +{ > + struct device *dev = &ctx->client->dev; > + int ret; > + > + DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n"); > + > + /* DSC disable */ > + ret = anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > + R_DSC_CTRL_0, ~DSC_EN); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "IO error : disable dsc failed.\n"); > + return ret; > + } > + > + ret = anx7625_config_bit_matrix(ctx); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "config bit matrix failed.\n"); > + return ret; > + } > + > + ret = anx7625_api_dpi_config(ctx); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "mipi phy(dpi) setup failed.\n"); > + return ret; > + } > + > + /* set MIPI RX EN */ > + ret = anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > + AP_AV_STATUS, AP_MIPI_RX_EN); > + /* clear mute flag */ > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > + AP_AV_STATUS, (u8)~AP_MIPI_MUTE); > + if (ret < 0) > + DRM_DEV_ERROR(dev, "IO error : enable mipi rx failed.\n"); > + > + return ret; > +} > + > +static int anx7625_hdcp_setting(struct anx7625_data *ctx) > +{ > + u8 bcap; > + struct device *dev = &ctx->client->dev; > + > + if (!(ctx->hdcp_support && ctx->hdcp_en)) { Push the ! in and remove the parentheses. if (!ctx->hdcp_support || !ctx->hdcp_en) { > + DRM_DEV_DEBUG_DRIVER(dev, "hdcp_support(%d), hdcp_en(%d)\n", > + ctx->hdcp_support, ctx->hdcp_en); > + DRM_DEV_DEBUG_DRIVER(dev, "disable HDCP by config\n"); > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > + 0xee, 0x9f); > + } > + > + anx7625_aux_dpcd_read(ctx, 0x06, 0x80, 0x28, 1, &bcap); > + if (!(bcap & 0x01)) { > + DRM_WARN("downstream not support HDCP 1.4, cap(%x).\n", bcap); > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > + 0xee, 0x9f); > + } > + > + DRM_DEV_DEBUG_DRIVER(dev, "enable HDCP 1.4\n"); > + > + return anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xee, 0x20); > +} > + > static void anx7625_dp_start(struct anx7625_data *ctx) > { > int ret; > @@ -605,9 +768,15 @@ static void anx7625_dp_start(struct anx7625_data *ctx) > return; > } > > + /* HDCP config */ > + anx7625_hdcp_setting(ctx); > + > anx7625_config_audio_input(ctx); > > - ret = anx7625_dsi_config(ctx); > + if (ctx->pdata.is_dpi) > + ret = anx7625_dpi_config(ctx); > + else > + ret = anx7625_dsi_config(ctx); > > if (ret < 0) > DRM_DEV_ERROR(dev, "MIPI phy setup error.\n"); > @@ -688,8 +857,53 @@ static int sp_tx_get_edid_block(struct anx7625_data *ctx) > return c; > } > > -static int edid_read(struct anx7625_data *ctx, > - u8 offset, u8 *pblock_buf) > +static int check_hdcp_support(struct anx7625_data *ctx) > +{ > + int ret; > + struct device *dev = &ctx->client->dev; > + > + /* Select HDCP1.4 Key load */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_SRAM_SEL, 0x12); > + /* Select flash addr low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_LOW, 0x91); > + /* Select flash addr high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_HIGH, 0xa0); > + /* Select sram length high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_HIGH, 0x00); > + /* Select sram length low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_LOW, 0x27); > + /* Select flash length high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_HIGH, 0x02); > + /* Select flash length low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_LOW, 0x70); > + /* Select sram addr high byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_HIGH, 0x00); > + /* Select sram addr low byte */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_LOW, 0x00); > + /* Enable load with decrypt_en */ > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA, 0x03); > + > + usleep_range(10000, 11000); > + > + /* Check load status */ > + ret = anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA); > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "IO error : access flash load.\n"); > + return ret; > + } > + > + if ((ret & 0xF2) != 0xF2) { > + ctx->hdcp_support = 0; > + DRM_DEV_DEBUG_DRIVER(dev, "not support HDCP\n"); > + } else { > + ctx->hdcp_support = 1; > + DRM_DEV_DEBUG_DRIVER(dev, "support HDCP\n"); > + } > + > + return 0; > +} > + > +static int edid_read(struct anx7625_data *ctx, u8 offset, u8 *pblock_buf) > { > int ret, cnt; > struct device *dev = &ctx->client->dev; > @@ -718,6 +932,15 @@ static int edid_read(struct anx7625_data *ctx, > return 0; > } > > +void hdcp_enable(struct anx7625_data *ctx, int en) > +{ > + struct device *dev = &ctx->client->dev; > + > + DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en); > + > + ctx->hdcp_en = !!en; > +} > + > static int segments_edid_read(struct anx7625_data *ctx, > u8 segment, u8 *buf, u8 offset) > { > @@ -992,8 +1215,10 @@ static void anx7625_chip_control(struct anx7625_data *ctx, int state) > > if (state) { > atomic_inc(&ctx->power_status); > - if (atomic_read(&ctx->power_status) == 1) > + if (atomic_read(&ctx->power_status) == 1) { > anx7625_power_on_init(ctx); > + check_hdcp_support(ctx); > + } > } else { > if (atomic_read(&ctx->power_status)) { > atomic_dec(&ctx->power_status); > @@ -1051,6 +1276,7 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > return; > } > > + ctx->hpd_status = 1; > ctx->hpd_high_cnt++; > > /* Not support HDCP */ > @@ -1060,8 +1286,10 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xec, 0x10); > /* Interrupt for DRM */ > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xff, 0x01); > - if (ret < 0) > + if (ret < 0) { > + DRM_DEV_ERROR(dev, "fail to setting HDCP/auth\n"); > return; > + } > > ret = anx7625_reg_read(ctx, ctx->i2c.rx_p1_client, 0x86); > if (ret < 0) > @@ -1080,6 +1308,10 @@ static void anx7625_hpd_polling(struct anx7625_data *ctx) > int ret, val; > struct device *dev = &ctx->client->dev; > > + /* Interrupt mode, no need poll HPD status, just return */ > + if (ctx->pdata.intp_irq) > + return; > + > if (atomic_read(&ctx->power_status) != 1) { > DRM_DEV_DEBUG_DRIVER(dev, "No need to poling HPD status.\n"); > return; > @@ -1130,6 +1362,22 @@ static void anx7625_remove_edid(struct anx7625_data *ctx) > ctx->slimport_edid_p.edid_block_num = -1; > } > > +static void anx7625_dp_adjust_swing(struct anx7625_data *ctx) > +{ > + struct device *dev = &ctx->client->dev; > + int i; > + > + if (!ctx->pdata.reg_table_size) > + return; No need for this check. Just remove it and the for loop becomes a no-op. > + > + DRM_DEV_DEBUG_DRIVER(dev, "adjust DP tx swing\n"); Delete this debug statement and use ftrace for this information. > + > + for (i = 0; i < ctx->pdata.reg_table_size; i++) > + anx7625_reg_write(ctx, ctx->i2c.tx_p1_client, > + ctx->pdata.art[i].offset & 0xFF, > + ctx->pdata.art[i].data & 0xFF); > +} > + > static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > { > struct device *dev = &ctx->client->dev; > @@ -1145,9 +1393,8 @@ static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > } else { > DRM_DEV_DEBUG_DRIVER(dev, " HPD high\n"); > anx7625_start_dp_work(ctx); > + anx7625_dp_adjust_swing(ctx); > } > - > - ctx->hpd_status = 1; > } > > static int anx7625_hpd_change_detect(struct anx7625_data *ctx) > @@ -1224,12 +1471,63 @@ static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data) > return IRQ_HANDLED; > } > > +static int anx7625_get_u32_value(struct device_node *np, > + const char *name, > + int start_pos, > + int *reg_data) > +{ > + int i, ret; > + > + /* each slot has 2 cells */ > + for (i = 0; i < 2; i++) { > + ret = of_property_read_u32_index(np, name, > + start_pos + i, > + ®_data[i]); > + if (ret) > + return ret; > + } > + > + return 0; > +} > + > static int anx7625_parse_dt(struct device *dev, > struct anx7625_platform_data *pdata) > { > struct device_node *np = dev->of_node; > struct drm_panel *panel; > - int ret; > + int ret, i; > + int reg_data[2]; > + int total_size, num_regs, start_pos; > + > + if (of_get_property(dev->of_node, "anx,swing-setting", &total_size)) { > + /* each slot has 2 cells */ > + num_regs = total_size / (sizeof(u32) * 2); > + if (num_regs > MAX_REG_SIZE) > + num_regs = MAX_REG_SIZE; > + > + pdata->reg_table_size = num_regs; > + > + for (i = 0; i < num_regs; i++) { > + start_pos = i * 2; > + ret = anx7625_get_u32_value(np, "anx,swing-setting", > + start_pos, reg_data); > + if (ret) { > + DRM_DEV_ERROR(dev, "get swing-setting at %d\n", > + start_pos); > + return -ENODEV; return ret;? regards, dan carpenter _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support 2021-01-04 14:50 ` Dan Carpenter (?) @ 2021-01-12 8:20 ` Xin Ji -1 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2021-01-12 8:20 UTC (permalink / raw) To: Dan Carpenter Cc: Nicolas Boichat, Andrzej Hajda, Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, David Airlie, Daniel Vetter, Boris Brezillon, Sam Ravnborg, Hsin-Yi Wang, Torsten Duwe, Vasily Khoruzhick, Marek Szyprowski, Sheng Pan, dri-devel, linux-kernel, devel Hi Dan Carpenter, thanks for your comments, I'll fix it in the next serial. Thanks, Xin On Mon, Jan 04, 2021 at 05:50:39PM +0300, Dan Carpenter wrote: > On Fri, Dec 25, 2020 at 07:02:15PM +0800, Xin Ji wrote: > > +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx, > > + u8 addrh, u8 addrm, u8 addrl, > > + u8 len, u8 *buf) > > +{ > > + struct device *dev = &ctx->client->dev; > > + int ret; > > + u8 cmd; > > + > > + if (len > MAX_DPCD_BUFFER_SIZE) { > > + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n"); > > + return -E2BIG; > > s/E2BIG/EINVAL/. -E2BIG means something else. OK > > > + } > > + > > + cmd = ((len - 1) << 4) | 0x09; > > + > > + /* Set command and length */ > > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_COMMAND, cmd); > > + > > + /* Set aux access address */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_ADDR_7_0, addrl); > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_ADDR_15_8, addrm); > > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_ADDR_19_16, addrh); > > + > > + /* Enable aux access */ > > + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN); > > + > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "cannot access aux related register.\n"); > > + return -EIO; > > + } > > + > > + usleep_range(2000, 2100); > > + > > + ret = wait_aux_op_finish(ctx); > > + if (ret) { > > + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n"); > > + return ret; > > + } > > + > > + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_BUFF_START, len, buf); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "read dpcd register failed\n"); > > + return -EIO; > > } > > > > - return val; > > + return 0; > > } > > > > static int anx7625_video_mute_control(struct anx7625_data *ctx, > > @@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx) > > return ret; > > } > > > > +static int anx7625_api_dpi_config(struct anx7625_data *ctx) > > +{ > > + struct device *dev = &ctx->client->dev; > > + u16 freq = ctx->dt.pixelclock.min / 1000; > > + int ret; > > + > > + /* configure pixel clock */ > > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + PIXEL_CLOCK_L, freq & 0xFF); > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + PIXEL_CLOCK_H, (freq >> 8)); > > + > > + /* set DPI mode */ > > + /* set to DPI PLL module sel */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > + MIPI_DIGITAL_PLL_9, 0x20); > > + /* power down MIPI */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > + MIPI_LANE_CTRL_10, 0x08); > > + /* enable DPI mode */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > + MIPI_DIGITAL_PLL_18, 0x1C); > > + /* set first edge */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, > > + VIDEO_CONTROL_0, 0x06); > > + if (ret < 0) > > + DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n"); > > + > > + return ret; > > +} > > + > > +static int anx7625_dpi_config(struct anx7625_data *ctx) > > +{ > > + struct device *dev = &ctx->client->dev; > > + int ret; > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n"); > > + > > + /* DSC disable */ > > + ret = anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > > + R_DSC_CTRL_0, ~DSC_EN); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "IO error : disable dsc failed.\n"); > > + return ret; > > + } > > + > > + ret = anx7625_config_bit_matrix(ctx); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "config bit matrix failed.\n"); > > + return ret; > > + } > > + > > + ret = anx7625_api_dpi_config(ctx); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "mipi phy(dpi) setup failed.\n"); > > + return ret; > > + } > > + > > + /* set MIPI RX EN */ > > + ret = anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > > + AP_AV_STATUS, AP_MIPI_RX_EN); > > + /* clear mute flag */ > > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > > + AP_AV_STATUS, (u8)~AP_MIPI_MUTE); > > + if (ret < 0) > > + DRM_DEV_ERROR(dev, "IO error : enable mipi rx failed.\n"); > > + > > + return ret; > > +} > > + > > +static int anx7625_hdcp_setting(struct anx7625_data *ctx) > > +{ > > + u8 bcap; > > + struct device *dev = &ctx->client->dev; > > + > > + if (!(ctx->hdcp_support && ctx->hdcp_en)) { > > Push the ! in and remove the parentheses. > > if (!ctx->hdcp_support || !ctx->hdcp_en) { OK > > > > + DRM_DEV_DEBUG_DRIVER(dev, "hdcp_support(%d), hdcp_en(%d)\n", > > + ctx->hdcp_support, ctx->hdcp_en); > > + DRM_DEV_DEBUG_DRIVER(dev, "disable HDCP by config\n"); > > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > > + 0xee, 0x9f); > > + } > > + > > + anx7625_aux_dpcd_read(ctx, 0x06, 0x80, 0x28, 1, &bcap); > > + if (!(bcap & 0x01)) { > > + DRM_WARN("downstream not support HDCP 1.4, cap(%x).\n", bcap); > > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > > + 0xee, 0x9f); > > + } > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "enable HDCP 1.4\n"); > > + > > + return anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xee, 0x20); > > +} > > + > > static void anx7625_dp_start(struct anx7625_data *ctx) > > { > > int ret; > > @@ -605,9 +768,15 @@ static void anx7625_dp_start(struct anx7625_data *ctx) > > return; > > } > > > > + /* HDCP config */ > > + anx7625_hdcp_setting(ctx); > > + > > anx7625_config_audio_input(ctx); > > > > - ret = anx7625_dsi_config(ctx); > > + if (ctx->pdata.is_dpi) > > + ret = anx7625_dpi_config(ctx); > > + else > > + ret = anx7625_dsi_config(ctx); > > > > if (ret < 0) > > DRM_DEV_ERROR(dev, "MIPI phy setup error.\n"); > > @@ -688,8 +857,53 @@ static int sp_tx_get_edid_block(struct anx7625_data *ctx) > > return c; > > } > > > > -static int edid_read(struct anx7625_data *ctx, > > - u8 offset, u8 *pblock_buf) > > +static int check_hdcp_support(struct anx7625_data *ctx) > > +{ > > + int ret; > > + struct device *dev = &ctx->client->dev; > > + > > + /* Select HDCP1.4 Key load */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_SRAM_SEL, 0x12); > > + /* Select flash addr low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_LOW, 0x91); > > + /* Select flash addr high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_HIGH, 0xa0); > > + /* Select sram length high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_HIGH, 0x00); > > + /* Select sram length low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_LOW, 0x27); > > + /* Select flash length high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_HIGH, 0x02); > > + /* Select flash length low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_LOW, 0x70); > > + /* Select sram addr high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_HIGH, 0x00); > > + /* Select sram addr low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_LOW, 0x00); > > + /* Enable load with decrypt_en */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA, 0x03); > > + > > + usleep_range(10000, 11000); > > + > > + /* Check load status */ > > + ret = anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "IO error : access flash load.\n"); > > + return ret; > > + } > > + > > + if ((ret & 0xF2) != 0xF2) { > > + ctx->hdcp_support = 0; > > + DRM_DEV_DEBUG_DRIVER(dev, "not support HDCP\n"); > > + } else { > > + ctx->hdcp_support = 1; > > + DRM_DEV_DEBUG_DRIVER(dev, "support HDCP\n"); > > + } > > + > > + return 0; > > +} > > + > > +static int edid_read(struct anx7625_data *ctx, u8 offset, u8 *pblock_buf) > > { > > int ret, cnt; > > struct device *dev = &ctx->client->dev; > > @@ -718,6 +932,15 @@ static int edid_read(struct anx7625_data *ctx, > > return 0; > > } > > > > +void hdcp_enable(struct anx7625_data *ctx, int en) > > +{ > > + struct device *dev = &ctx->client->dev; > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en); > > + > > + ctx->hdcp_en = !!en; > > +} > > + > > static int segments_edid_read(struct anx7625_data *ctx, > > u8 segment, u8 *buf, u8 offset) > > { > > @@ -992,8 +1215,10 @@ static void anx7625_chip_control(struct anx7625_data *ctx, int state) > > > > if (state) { > > atomic_inc(&ctx->power_status); > > - if (atomic_read(&ctx->power_status) == 1) > > + if (atomic_read(&ctx->power_status) == 1) { > > anx7625_power_on_init(ctx); > > + check_hdcp_support(ctx); > > + } > > } else { > > if (atomic_read(&ctx->power_status)) { > > atomic_dec(&ctx->power_status); > > @@ -1051,6 +1276,7 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > > return; > > } > > > > + ctx->hpd_status = 1; > > ctx->hpd_high_cnt++; > > > > /* Not support HDCP */ > > @@ -1060,8 +1286,10 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xec, 0x10); > > /* Interrupt for DRM */ > > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xff, 0x01); > > - if (ret < 0) > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "fail to setting HDCP/auth\n"); > > return; > > + } > > > > ret = anx7625_reg_read(ctx, ctx->i2c.rx_p1_client, 0x86); > > if (ret < 0) > > @@ -1080,6 +1308,10 @@ static void anx7625_hpd_polling(struct anx7625_data *ctx) > > int ret, val; > > struct device *dev = &ctx->client->dev; > > > > + /* Interrupt mode, no need poll HPD status, just return */ > > + if (ctx->pdata.intp_irq) > > + return; > > + > > if (atomic_read(&ctx->power_status) != 1) { > > DRM_DEV_DEBUG_DRIVER(dev, "No need to poling HPD status.\n"); > > return; > > @@ -1130,6 +1362,22 @@ static void anx7625_remove_edid(struct anx7625_data *ctx) > > ctx->slimport_edid_p.edid_block_num = -1; > > } > > > > +static void anx7625_dp_adjust_swing(struct anx7625_data *ctx) > > +{ > > + struct device *dev = &ctx->client->dev; > > + int i; > > + > > + if (!ctx->pdata.reg_table_size) > > + return; > > No need for this check. Just remove it and the for loop becomes a no-op. > > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "adjust DP tx swing\n"); > > Delete this debug statement and use ftrace for this information. OK > > > + > > + for (i = 0; i < ctx->pdata.reg_table_size; i++) > > + anx7625_reg_write(ctx, ctx->i2c.tx_p1_client, > > + ctx->pdata.art[i].offset & 0xFF, > > + ctx->pdata.art[i].data & 0xFF); > > +} > > + > > static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > > { > > struct device *dev = &ctx->client->dev; > > @@ -1145,9 +1393,8 @@ static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > > } else { > > DRM_DEV_DEBUG_DRIVER(dev, " HPD high\n"); > > anx7625_start_dp_work(ctx); > > + anx7625_dp_adjust_swing(ctx); > > } > > - > > - ctx->hpd_status = 1; > > } > > > > static int anx7625_hpd_change_detect(struct anx7625_data *ctx) > > @@ -1224,12 +1471,63 @@ static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data) > > return IRQ_HANDLED; > > } > > > > +static int anx7625_get_u32_value(struct device_node *np, > > + const char *name, > > + int start_pos, > > + int *reg_data) > > +{ > > + int i, ret; > > + > > + /* each slot has 2 cells */ > > + for (i = 0; i < 2; i++) { > > + ret = of_property_read_u32_index(np, name, > > + start_pos + i, > > + ®_data[i]); > > + if (ret) > > + return ret; > > + } > > + > > + return 0; > > +} > > + > > static int anx7625_parse_dt(struct device *dev, > > struct anx7625_platform_data *pdata) > > { > > struct device_node *np = dev->of_node; > > struct drm_panel *panel; > > - int ret; > > + int ret, i; > > + int reg_data[2]; > > + int total_size, num_regs, start_pos; > > + > > + if (of_get_property(dev->of_node, "anx,swing-setting", &total_size)) { > > + /* each slot has 2 cells */ > > + num_regs = total_size / (sizeof(u32) * 2); > > + if (num_regs > MAX_REG_SIZE) > > + num_regs = MAX_REG_SIZE; > > + > > + pdata->reg_table_size = num_regs; > > + > > + for (i = 0; i < num_regs; i++) { > > + start_pos = i * 2; > > + ret = anx7625_get_u32_value(np, "anx,swing-setting", > > + start_pos, reg_data); > > + if (ret) { > > + DRM_DEV_ERROR(dev, "get swing-setting at %d\n", > > + start_pos); > > + return -ENODEV; > > return ret;? OK > > regards, > dan carpenter ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support @ 2021-01-12 8:20 ` Xin Ji 0 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2021-01-12 8:20 UTC (permalink / raw) To: Dan Carpenter Cc: devel, Nicolas Boichat, Jernej Skrabec, Sheng Pan, Jonas Karlman, David Airlie, Neil Armstrong, linux-kernel, dri-devel, Vasily Khoruzhick, Andrzej Hajda, Boris Brezillon, Torsten Duwe, Laurent Pinchart, Hsin-Yi Wang, Sam Ravnborg, Marek Szyprowski Hi Dan Carpenter, thanks for your comments, I'll fix it in the next serial. Thanks, Xin On Mon, Jan 04, 2021 at 05:50:39PM +0300, Dan Carpenter wrote: > On Fri, Dec 25, 2020 at 07:02:15PM +0800, Xin Ji wrote: > > +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx, > > + u8 addrh, u8 addrm, u8 addrl, > > + u8 len, u8 *buf) > > +{ > > + struct device *dev = &ctx->client->dev; > > + int ret; > > + u8 cmd; > > + > > + if (len > MAX_DPCD_BUFFER_SIZE) { > > + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n"); > > + return -E2BIG; > > s/E2BIG/EINVAL/. -E2BIG means something else. OK > > > + } > > + > > + cmd = ((len - 1) << 4) | 0x09; > > + > > + /* Set command and length */ > > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_COMMAND, cmd); > > + > > + /* Set aux access address */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_ADDR_7_0, addrl); > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_ADDR_15_8, addrm); > > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_ADDR_19_16, addrh); > > + > > + /* Enable aux access */ > > + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN); > > + > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "cannot access aux related register.\n"); > > + return -EIO; > > + } > > + > > + usleep_range(2000, 2100); > > + > > + ret = wait_aux_op_finish(ctx); > > + if (ret) { > > + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n"); > > + return ret; > > + } > > + > > + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_BUFF_START, len, buf); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "read dpcd register failed\n"); > > + return -EIO; > > } > > > > - return val; > > + return 0; > > } > > > > static int anx7625_video_mute_control(struct anx7625_data *ctx, > > @@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx) > > return ret; > > } > > > > +static int anx7625_api_dpi_config(struct anx7625_data *ctx) > > +{ > > + struct device *dev = &ctx->client->dev; > > + u16 freq = ctx->dt.pixelclock.min / 1000; > > + int ret; > > + > > + /* configure pixel clock */ > > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + PIXEL_CLOCK_L, freq & 0xFF); > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + PIXEL_CLOCK_H, (freq >> 8)); > > + > > + /* set DPI mode */ > > + /* set to DPI PLL module sel */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > + MIPI_DIGITAL_PLL_9, 0x20); > > + /* power down MIPI */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > + MIPI_LANE_CTRL_10, 0x08); > > + /* enable DPI mode */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > + MIPI_DIGITAL_PLL_18, 0x1C); > > + /* set first edge */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, > > + VIDEO_CONTROL_0, 0x06); > > + if (ret < 0) > > + DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n"); > > + > > + return ret; > > +} > > + > > +static int anx7625_dpi_config(struct anx7625_data *ctx) > > +{ > > + struct device *dev = &ctx->client->dev; > > + int ret; > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n"); > > + > > + /* DSC disable */ > > + ret = anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > > + R_DSC_CTRL_0, ~DSC_EN); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "IO error : disable dsc failed.\n"); > > + return ret; > > + } > > + > > + ret = anx7625_config_bit_matrix(ctx); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "config bit matrix failed.\n"); > > + return ret; > > + } > > + > > + ret = anx7625_api_dpi_config(ctx); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "mipi phy(dpi) setup failed.\n"); > > + return ret; > > + } > > + > > + /* set MIPI RX EN */ > > + ret = anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > > + AP_AV_STATUS, AP_MIPI_RX_EN); > > + /* clear mute flag */ > > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > > + AP_AV_STATUS, (u8)~AP_MIPI_MUTE); > > + if (ret < 0) > > + DRM_DEV_ERROR(dev, "IO error : enable mipi rx failed.\n"); > > + > > + return ret; > > +} > > + > > +static int anx7625_hdcp_setting(struct anx7625_data *ctx) > > +{ > > + u8 bcap; > > + struct device *dev = &ctx->client->dev; > > + > > + if (!(ctx->hdcp_support && ctx->hdcp_en)) { > > Push the ! in and remove the parentheses. > > if (!ctx->hdcp_support || !ctx->hdcp_en) { OK > > > > + DRM_DEV_DEBUG_DRIVER(dev, "hdcp_support(%d), hdcp_en(%d)\n", > > + ctx->hdcp_support, ctx->hdcp_en); > > + DRM_DEV_DEBUG_DRIVER(dev, "disable HDCP by config\n"); > > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > > + 0xee, 0x9f); > > + } > > + > > + anx7625_aux_dpcd_read(ctx, 0x06, 0x80, 0x28, 1, &bcap); > > + if (!(bcap & 0x01)) { > > + DRM_WARN("downstream not support HDCP 1.4, cap(%x).\n", bcap); > > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > > + 0xee, 0x9f); > > + } > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "enable HDCP 1.4\n"); > > + > > + return anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xee, 0x20); > > +} > > + > > static void anx7625_dp_start(struct anx7625_data *ctx) > > { > > int ret; > > @@ -605,9 +768,15 @@ static void anx7625_dp_start(struct anx7625_data *ctx) > > return; > > } > > > > + /* HDCP config */ > > + anx7625_hdcp_setting(ctx); > > + > > anx7625_config_audio_input(ctx); > > > > - ret = anx7625_dsi_config(ctx); > > + if (ctx->pdata.is_dpi) > > + ret = anx7625_dpi_config(ctx); > > + else > > + ret = anx7625_dsi_config(ctx); > > > > if (ret < 0) > > DRM_DEV_ERROR(dev, "MIPI phy setup error.\n"); > > @@ -688,8 +857,53 @@ static int sp_tx_get_edid_block(struct anx7625_data *ctx) > > return c; > > } > > > > -static int edid_read(struct anx7625_data *ctx, > > - u8 offset, u8 *pblock_buf) > > +static int check_hdcp_support(struct anx7625_data *ctx) > > +{ > > + int ret; > > + struct device *dev = &ctx->client->dev; > > + > > + /* Select HDCP1.4 Key load */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_SRAM_SEL, 0x12); > > + /* Select flash addr low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_LOW, 0x91); > > + /* Select flash addr high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_HIGH, 0xa0); > > + /* Select sram length high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_HIGH, 0x00); > > + /* Select sram length low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_LOW, 0x27); > > + /* Select flash length high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_HIGH, 0x02); > > + /* Select flash length low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_LOW, 0x70); > > + /* Select sram addr high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_HIGH, 0x00); > > + /* Select sram addr low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_LOW, 0x00); > > + /* Enable load with decrypt_en */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA, 0x03); > > + > > + usleep_range(10000, 11000); > > + > > + /* Check load status */ > > + ret = anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "IO error : access flash load.\n"); > > + return ret; > > + } > > + > > + if ((ret & 0xF2) != 0xF2) { > > + ctx->hdcp_support = 0; > > + DRM_DEV_DEBUG_DRIVER(dev, "not support HDCP\n"); > > + } else { > > + ctx->hdcp_support = 1; > > + DRM_DEV_DEBUG_DRIVER(dev, "support HDCP\n"); > > + } > > + > > + return 0; > > +} > > + > > +static int edid_read(struct anx7625_data *ctx, u8 offset, u8 *pblock_buf) > > { > > int ret, cnt; > > struct device *dev = &ctx->client->dev; > > @@ -718,6 +932,15 @@ static int edid_read(struct anx7625_data *ctx, > > return 0; > > } > > > > +void hdcp_enable(struct anx7625_data *ctx, int en) > > +{ > > + struct device *dev = &ctx->client->dev; > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en); > > + > > + ctx->hdcp_en = !!en; > > +} > > + > > static int segments_edid_read(struct anx7625_data *ctx, > > u8 segment, u8 *buf, u8 offset) > > { > > @@ -992,8 +1215,10 @@ static void anx7625_chip_control(struct anx7625_data *ctx, int state) > > > > if (state) { > > atomic_inc(&ctx->power_status); > > - if (atomic_read(&ctx->power_status) == 1) > > + if (atomic_read(&ctx->power_status) == 1) { > > anx7625_power_on_init(ctx); > > + check_hdcp_support(ctx); > > + } > > } else { > > if (atomic_read(&ctx->power_status)) { > > atomic_dec(&ctx->power_status); > > @@ -1051,6 +1276,7 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > > return; > > } > > > > + ctx->hpd_status = 1; > > ctx->hpd_high_cnt++; > > > > /* Not support HDCP */ > > @@ -1060,8 +1286,10 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xec, 0x10); > > /* Interrupt for DRM */ > > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xff, 0x01); > > - if (ret < 0) > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "fail to setting HDCP/auth\n"); > > return; > > + } > > > > ret = anx7625_reg_read(ctx, ctx->i2c.rx_p1_client, 0x86); > > if (ret < 0) > > @@ -1080,6 +1308,10 @@ static void anx7625_hpd_polling(struct anx7625_data *ctx) > > int ret, val; > > struct device *dev = &ctx->client->dev; > > > > + /* Interrupt mode, no need poll HPD status, just return */ > > + if (ctx->pdata.intp_irq) > > + return; > > + > > if (atomic_read(&ctx->power_status) != 1) { > > DRM_DEV_DEBUG_DRIVER(dev, "No need to poling HPD status.\n"); > > return; > > @@ -1130,6 +1362,22 @@ static void anx7625_remove_edid(struct anx7625_data *ctx) > > ctx->slimport_edid_p.edid_block_num = -1; > > } > > > > +static void anx7625_dp_adjust_swing(struct anx7625_data *ctx) > > +{ > > + struct device *dev = &ctx->client->dev; > > + int i; > > + > > + if (!ctx->pdata.reg_table_size) > > + return; > > No need for this check. Just remove it and the for loop becomes a no-op. > > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "adjust DP tx swing\n"); > > Delete this debug statement and use ftrace for this information. OK > > > + > > + for (i = 0; i < ctx->pdata.reg_table_size; i++) > > + anx7625_reg_write(ctx, ctx->i2c.tx_p1_client, > > + ctx->pdata.art[i].offset & 0xFF, > > + ctx->pdata.art[i].data & 0xFF); > > +} > > + > > static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > > { > > struct device *dev = &ctx->client->dev; > > @@ -1145,9 +1393,8 @@ static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > > } else { > > DRM_DEV_DEBUG_DRIVER(dev, " HPD high\n"); > > anx7625_start_dp_work(ctx); > > + anx7625_dp_adjust_swing(ctx); > > } > > - > > - ctx->hpd_status = 1; > > } > > > > static int anx7625_hpd_change_detect(struct anx7625_data *ctx) > > @@ -1224,12 +1471,63 @@ static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data) > > return IRQ_HANDLED; > > } > > > > +static int anx7625_get_u32_value(struct device_node *np, > > + const char *name, > > + int start_pos, > > + int *reg_data) > > +{ > > + int i, ret; > > + > > + /* each slot has 2 cells */ > > + for (i = 0; i < 2; i++) { > > + ret = of_property_read_u32_index(np, name, > > + start_pos + i, > > + ®_data[i]); > > + if (ret) > > + return ret; > > + } > > + > > + return 0; > > +} > > + > > static int anx7625_parse_dt(struct device *dev, > > struct anx7625_platform_data *pdata) > > { > > struct device_node *np = dev->of_node; > > struct drm_panel *panel; > > - int ret; > > + int ret, i; > > + int reg_data[2]; > > + int total_size, num_regs, start_pos; > > + > > + if (of_get_property(dev->of_node, "anx,swing-setting", &total_size)) { > > + /* each slot has 2 cells */ > > + num_regs = total_size / (sizeof(u32) * 2); > > + if (num_regs > MAX_REG_SIZE) > > + num_regs = MAX_REG_SIZE; > > + > > + pdata->reg_table_size = num_regs; > > + > > + for (i = 0; i < num_regs; i++) { > > + start_pos = i * 2; > > + ret = anx7625_get_u32_value(np, "anx,swing-setting", > > + start_pos, reg_data); > > + if (ret) { > > + DRM_DEV_ERROR(dev, "get swing-setting at %d\n", > > + start_pos); > > + return -ENODEV; > > return ret;? OK > > regards, > dan carpenter _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support @ 2021-01-12 8:20 ` Xin Ji 0 siblings, 0 replies; 30+ messages in thread From: Xin Ji @ 2021-01-12 8:20 UTC (permalink / raw) To: Dan Carpenter Cc: devel, Nicolas Boichat, Jernej Skrabec, Sheng Pan, Jonas Karlman, David Airlie, Neil Armstrong, linux-kernel, dri-devel, Vasily Khoruzhick, Andrzej Hajda, Boris Brezillon, Torsten Duwe, Laurent Pinchart, Daniel Vetter, Hsin-Yi Wang, Sam Ravnborg, Marek Szyprowski Hi Dan Carpenter, thanks for your comments, I'll fix it in the next serial. Thanks, Xin On Mon, Jan 04, 2021 at 05:50:39PM +0300, Dan Carpenter wrote: > On Fri, Dec 25, 2020 at 07:02:15PM +0800, Xin Ji wrote: > > +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx, > > + u8 addrh, u8 addrm, u8 addrl, > > + u8 len, u8 *buf) > > +{ > > + struct device *dev = &ctx->client->dev; > > + int ret; > > + u8 cmd; > > + > > + if (len > MAX_DPCD_BUFFER_SIZE) { > > + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n"); > > + return -E2BIG; > > s/E2BIG/EINVAL/. -E2BIG means something else. OK > > > + } > > + > > + cmd = ((len - 1) << 4) | 0x09; > > + > > + /* Set command and length */ > > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_COMMAND, cmd); > > + > > + /* Set aux access address */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_ADDR_7_0, addrl); > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_ADDR_15_8, addrm); > > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_ADDR_19_16, addrh); > > + > > + /* Enable aux access */ > > + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN); > > + > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "cannot access aux related register.\n"); > > + return -EIO; > > + } > > + > > + usleep_range(2000, 2100); > > + > > + ret = wait_aux_op_finish(ctx); > > + if (ret) { > > + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n"); > > + return ret; > > + } > > + > > + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client, > > + AP_AUX_BUFF_START, len, buf); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "read dpcd register failed\n"); > > + return -EIO; > > } > > > > - return val; > > + return 0; > > } > > > > static int anx7625_video_mute_control(struct anx7625_data *ctx, > > @@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx) > > return ret; > > } > > > > +static int anx7625_api_dpi_config(struct anx7625_data *ctx) > > +{ > > + struct device *dev = &ctx->client->dev; > > + u16 freq = ctx->dt.pixelclock.min / 1000; > > + int ret; > > + > > + /* configure pixel clock */ > > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + PIXEL_CLOCK_L, freq & 0xFF); > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, > > + PIXEL_CLOCK_H, (freq >> 8)); > > + > > + /* set DPI mode */ > > + /* set to DPI PLL module sel */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > + MIPI_DIGITAL_PLL_9, 0x20); > > + /* power down MIPI */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > + MIPI_LANE_CTRL_10, 0x08); > > + /* enable DPI mode */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > + MIPI_DIGITAL_PLL_18, 0x1C); > > + /* set first edge */ > > + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client, > > + VIDEO_CONTROL_0, 0x06); > > + if (ret < 0) > > + DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n"); > > + > > + return ret; > > +} > > + > > +static int anx7625_dpi_config(struct anx7625_data *ctx) > > +{ > > + struct device *dev = &ctx->client->dev; > > + int ret; > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n"); > > + > > + /* DSC disable */ > > + ret = anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > > + R_DSC_CTRL_0, ~DSC_EN); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "IO error : disable dsc failed.\n"); > > + return ret; > > + } > > + > > + ret = anx7625_config_bit_matrix(ctx); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "config bit matrix failed.\n"); > > + return ret; > > + } > > + > > + ret = anx7625_api_dpi_config(ctx); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "mipi phy(dpi) setup failed.\n"); > > + return ret; > > + } > > + > > + /* set MIPI RX EN */ > > + ret = anx7625_write_or(ctx, ctx->i2c.rx_p0_client, > > + AP_AV_STATUS, AP_MIPI_RX_EN); > > + /* clear mute flag */ > > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client, > > + AP_AV_STATUS, (u8)~AP_MIPI_MUTE); > > + if (ret < 0) > > + DRM_DEV_ERROR(dev, "IO error : enable mipi rx failed.\n"); > > + > > + return ret; > > +} > > + > > +static int anx7625_hdcp_setting(struct anx7625_data *ctx) > > +{ > > + u8 bcap; > > + struct device *dev = &ctx->client->dev; > > + > > + if (!(ctx->hdcp_support && ctx->hdcp_en)) { > > Push the ! in and remove the parentheses. > > if (!ctx->hdcp_support || !ctx->hdcp_en) { OK > > > > + DRM_DEV_DEBUG_DRIVER(dev, "hdcp_support(%d), hdcp_en(%d)\n", > > + ctx->hdcp_support, ctx->hdcp_en); > > + DRM_DEV_DEBUG_DRIVER(dev, "disable HDCP by config\n"); > > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > > + 0xee, 0x9f); > > + } > > + > > + anx7625_aux_dpcd_read(ctx, 0x06, 0x80, 0x28, 1, &bcap); > > + if (!(bcap & 0x01)) { > > + DRM_WARN("downstream not support HDCP 1.4, cap(%x).\n", bcap); > > + return anx7625_write_and(ctx, ctx->i2c.rx_p1_client, > > + 0xee, 0x9f); > > + } > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "enable HDCP 1.4\n"); > > + > > + return anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xee, 0x20); > > +} > > + > > static void anx7625_dp_start(struct anx7625_data *ctx) > > { > > int ret; > > @@ -605,9 +768,15 @@ static void anx7625_dp_start(struct anx7625_data *ctx) > > return; > > } > > > > + /* HDCP config */ > > + anx7625_hdcp_setting(ctx); > > + > > anx7625_config_audio_input(ctx); > > > > - ret = anx7625_dsi_config(ctx); > > + if (ctx->pdata.is_dpi) > > + ret = anx7625_dpi_config(ctx); > > + else > > + ret = anx7625_dsi_config(ctx); > > > > if (ret < 0) > > DRM_DEV_ERROR(dev, "MIPI phy setup error.\n"); > > @@ -688,8 +857,53 @@ static int sp_tx_get_edid_block(struct anx7625_data *ctx) > > return c; > > } > > > > -static int edid_read(struct anx7625_data *ctx, > > - u8 offset, u8 *pblock_buf) > > +static int check_hdcp_support(struct anx7625_data *ctx) > > +{ > > + int ret; > > + struct device *dev = &ctx->client->dev; > > + > > + /* Select HDCP1.4 Key load */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_SRAM_SEL, 0x12); > > + /* Select flash addr low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_LOW, 0x91); > > + /* Select flash addr high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_ADDR_HIGH, 0xa0); > > + /* Select sram length high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_HIGH, 0x00); > > + /* Select sram length low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_LEN_LOW, 0x27); > > + /* Select flash length high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_HIGH, 0x02); > > + /* Select flash length low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LEN_LOW, 0x70); > > + /* Select sram addr high byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_HIGH, 0x00); > > + /* Select sram addr low byte */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, SRAM_ADDR_LOW, 0x00); > > + /* Enable load with decrypt_en */ > > + anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA, 0x03); > > + > > + usleep_range(10000, 11000); > > + > > + /* Check load status */ > > + ret = anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, FLASH_LOAD_STA); > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "IO error : access flash load.\n"); > > + return ret; > > + } > > + > > + if ((ret & 0xF2) != 0xF2) { > > + ctx->hdcp_support = 0; > > + DRM_DEV_DEBUG_DRIVER(dev, "not support HDCP\n"); > > + } else { > > + ctx->hdcp_support = 1; > > + DRM_DEV_DEBUG_DRIVER(dev, "support HDCP\n"); > > + } > > + > > + return 0; > > +} > > + > > +static int edid_read(struct anx7625_data *ctx, u8 offset, u8 *pblock_buf) > > { > > int ret, cnt; > > struct device *dev = &ctx->client->dev; > > @@ -718,6 +932,15 @@ static int edid_read(struct anx7625_data *ctx, > > return 0; > > } > > > > +void hdcp_enable(struct anx7625_data *ctx, int en) > > +{ > > + struct device *dev = &ctx->client->dev; > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "en(%d)\n", en); > > + > > + ctx->hdcp_en = !!en; > > +} > > + > > static int segments_edid_read(struct anx7625_data *ctx, > > u8 segment, u8 *buf, u8 offset) > > { > > @@ -992,8 +1215,10 @@ static void anx7625_chip_control(struct anx7625_data *ctx, int state) > > > > if (state) { > > atomic_inc(&ctx->power_status); > > - if (atomic_read(&ctx->power_status) == 1) > > + if (atomic_read(&ctx->power_status) == 1) { > > anx7625_power_on_init(ctx); > > + check_hdcp_support(ctx); > > + } > > } else { > > if (atomic_read(&ctx->power_status)) { > > atomic_dec(&ctx->power_status); > > @@ -1051,6 +1276,7 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > > return; > > } > > > > + ctx->hpd_status = 1; > > ctx->hpd_high_cnt++; > > > > /* Not support HDCP */ > > @@ -1060,8 +1286,10 @@ static void anx7625_start_dp_work(struct anx7625_data *ctx) > > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xec, 0x10); > > /* Interrupt for DRM */ > > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p1_client, 0xff, 0x01); > > - if (ret < 0) > > + if (ret < 0) { > > + DRM_DEV_ERROR(dev, "fail to setting HDCP/auth\n"); > > return; > > + } > > > > ret = anx7625_reg_read(ctx, ctx->i2c.rx_p1_client, 0x86); > > if (ret < 0) > > @@ -1080,6 +1308,10 @@ static void anx7625_hpd_polling(struct anx7625_data *ctx) > > int ret, val; > > struct device *dev = &ctx->client->dev; > > > > + /* Interrupt mode, no need poll HPD status, just return */ > > + if (ctx->pdata.intp_irq) > > + return; > > + > > if (atomic_read(&ctx->power_status) != 1) { > > DRM_DEV_DEBUG_DRIVER(dev, "No need to poling HPD status.\n"); > > return; > > @@ -1130,6 +1362,22 @@ static void anx7625_remove_edid(struct anx7625_data *ctx) > > ctx->slimport_edid_p.edid_block_num = -1; > > } > > > > +static void anx7625_dp_adjust_swing(struct anx7625_data *ctx) > > +{ > > + struct device *dev = &ctx->client->dev; > > + int i; > > + > > + if (!ctx->pdata.reg_table_size) > > + return; > > No need for this check. Just remove it and the for loop becomes a no-op. > > > + > > + DRM_DEV_DEBUG_DRIVER(dev, "adjust DP tx swing\n"); > > Delete this debug statement and use ftrace for this information. OK > > > + > > + for (i = 0; i < ctx->pdata.reg_table_size; i++) > > + anx7625_reg_write(ctx, ctx->i2c.tx_p1_client, > > + ctx->pdata.art[i].offset & 0xFF, > > + ctx->pdata.art[i].data & 0xFF); > > +} > > + > > static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > > { > > struct device *dev = &ctx->client->dev; > > @@ -1145,9 +1393,8 @@ static void dp_hpd_change_handler(struct anx7625_data *ctx, bool on) > > } else { > > DRM_DEV_DEBUG_DRIVER(dev, " HPD high\n"); > > anx7625_start_dp_work(ctx); > > + anx7625_dp_adjust_swing(ctx); > > } > > - > > - ctx->hpd_status = 1; > > } > > > > static int anx7625_hpd_change_detect(struct anx7625_data *ctx) > > @@ -1224,12 +1471,63 @@ static irqreturn_t anx7625_intr_hpd_isr(int irq, void *data) > > return IRQ_HANDLED; > > } > > > > +static int anx7625_get_u32_value(struct device_node *np, > > + const char *name, > > + int start_pos, > > + int *reg_data) > > +{ > > + int i, ret; > > + > > + /* each slot has 2 cells */ > > + for (i = 0; i < 2; i++) { > > + ret = of_property_read_u32_index(np, name, > > + start_pos + i, > > + ®_data[i]); > > + if (ret) > > + return ret; > > + } > > + > > + return 0; > > +} > > + > > static int anx7625_parse_dt(struct device *dev, > > struct anx7625_platform_data *pdata) > > { > > struct device_node *np = dev->of_node; > > struct drm_panel *panel; > > - int ret; > > + int ret, i; > > + int reg_data[2]; > > + int total_size, num_regs, start_pos; > > + > > + if (of_get_property(dev->of_node, "anx,swing-setting", &total_size)) { > > + /* each slot has 2 cells */ > > + num_regs = total_size / (sizeof(u32) * 2); > > + if (num_regs > MAX_REG_SIZE) > > + num_regs = MAX_REG_SIZE; > > + > > + pdata->reg_table_size = num_regs; > > + > > + for (i = 0; i < num_regs; i++) { > > + start_pos = i * 2; > > + ret = anx7625_get_u32_value(np, "anx,swing-setting", > > + start_pos, reg_data); > > + if (ret) { > > + DRM_DEV_ERROR(dev, "get swing-setting at %d\n", > > + start_pos); > > + return -ENODEV; > > return ret;? OK > > regards, > dan carpenter _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel ^ permalink raw reply [flat|nested] 30+ messages in thread
end of thread, other threads:[~2021-01-13 8:22 UTC | newest] Thread overview: 30+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-12-25 10:58 [PATCH v1 0/2] Add MIPI rx DPI support Xin Ji 2020-12-25 10:58 ` Xin Ji 2020-12-25 10:58 ` Xin Ji 2020-12-25 11:01 ` [PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting Xin Ji 2020-12-25 11:01 ` Xin Ji 2020-12-26 0:16 ` Rob Herring 2020-12-26 0:16 ` Rob Herring 2020-12-27 16:56 ` Rob Herring 2020-12-27 16:56 ` Rob Herring 2020-12-29 5:55 ` Xin Ji 2020-12-29 5:55 ` Xin Ji 2020-12-28 15:08 ` Laurent Pinchart 2020-12-28 15:08 ` Laurent Pinchart 2020-12-29 6:50 ` Xin Ji 2020-12-29 6:50 ` Xin Ji 2020-12-29 14:34 ` Laurent Pinchart 2020-12-29 14:34 ` Laurent Pinchart 2020-12-30 6:52 ` Xin Ji 2020-12-30 6:52 ` Xin Ji 2020-12-25 11:02 ` [PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support Xin Ji 2020-12-25 11:02 ` Xin Ji 2020-12-25 11:02 ` Xin Ji 2020-12-29 5:37 ` kernel test robot 2020-12-30 15:42 ` kernel test robot 2021-01-04 14:50 ` Dan Carpenter 2021-01-04 14:50 ` Dan Carpenter 2021-01-04 14:50 ` Dan Carpenter 2021-01-12 8:20 ` Xin Ji 2021-01-12 8:20 ` Xin Ji 2021-01-12 8:20 ` Xin Ji
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