* [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP @ 2021-07-20 6:49 Vandita Kulkarni 2021-07-20 6:49 ` [Intel-gfx] [v7 1/3] drm/i915/display: Add write permissions for fec support Vandita Kulkarni ` (7 more replies) 0 siblings, 8 replies; 16+ messages in thread From: Vandita Kulkarni @ 2021-07-20 6:49 UTC (permalink / raw) To: intel-gfx This series add debugfs entry to force dsc bpp to ceratin valid test value, for validation needs. This series has been tested locally. With the introduction of i915_dsc_bpp debugfs the expectation is that whenever there is force_dsc_en set, force_dsc_bpp should have a valid value for that format which is between bpp to bpp-1. This makes the older test kms_dp_dsc --basic fail as in that case force_dsc_bpp would be 0 and is not a valid value. Have tested with local changes on the same. The series https://patchwork.freedesktop.org/series/91772/ have the base patches and would need some work on the debugfs name change, giving default value for force_dsc_bpp in case of basic-dsc-enable test cases, clearing up of the force_dsc_bpp value while exiting the test. Which will be floated shortly. Have added minor fix on the feci debugfs interface. If further changes are needed on the same will float them in a different series. This series has been reviewed here https://patchwork.freedesktop.org/series/92312/#rev5 Resubmitting it here as the series submitter got overridden due to one of the review comment mishaps. Patnana Venkata Sai (1): drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable Vandita Kulkarni (2): drm/i915/display: Add write permissions for fec support drm/i915/display/dsc: Force dsc BPP .../drm/i915/display/intel_display_debugfs.c | 78 ++++++++++++++++++- .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++ 3 files changed, 94 insertions(+), 2 deletions(-) -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [v7 1/3] drm/i915/display: Add write permissions for fec support 2021-07-20 6:49 [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP Vandita Kulkarni @ 2021-07-20 6:49 ` Vandita Kulkarni 2021-07-20 6:49 ` [Intel-gfx] [v7 2/3] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable Vandita Kulkarni ` (6 subsequent siblings) 7 siblings, 0 replies; 16+ messages in thread From: Vandita Kulkarni @ 2021-07-20 6:49 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula Though there is a write option available on fec_suport debugfs file, so far it has been registering with read permissions only. Suggested-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 65832c4d962f..717d5624839d 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -2434,7 +2434,7 @@ int intel_connector_debugfs_add(struct drm_connector *connector) } if ((DISPLAY_VER(dev_priv) >= 11 || IS_CANNONLAKE(dev_priv)) && ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && !to_intel_connector(connector)->mst_port) || connector->connector_type == DRM_MODE_CONNECTOR_eDP)) - debugfs_create_file("i915_dsc_fec_support", S_IRUGO, root, + debugfs_create_file("i915_dsc_fec_support", 0644, root, connector, &i915_dsc_fec_support_fops); /* Legacy panels doesn't lpsp on any platform */ -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [v7 2/3] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable 2021-07-20 6:49 [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP Vandita Kulkarni 2021-07-20 6:49 ` [Intel-gfx] [v7 1/3] drm/i915/display: Add write permissions for fec support Vandita Kulkarni @ 2021-07-20 6:49 ` Vandita Kulkarni 2021-07-20 6:49 ` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP Vandita Kulkarni ` (5 subsequent siblings) 7 siblings, 0 replies; 16+ messages in thread From: Vandita Kulkarni @ 2021-07-20 6:49 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula From: Patnana Venkata Sai <venkata.sai.patnana@intel.com> This patch creates a per connector debugfs node to expose the Compressed BPP. The same node can be used from userspace to force DSC to a certain BPP(all accepted values). This is useful to verify all supported/requested compression bpp's through IGT v2: Remove unnecessary logic (Jani) v3: Drop pipe bpp in debugfs node (Vandita) v4: Minor cleanups (Vandita) v5: Fix NULL pointer dereference v6: Fix dim tool checkpatch errors Release the lock before return (Vandita) v7: Rename to file to dsc_bpp, remove unwanted dsc bpp range check from v6, permissions (Jani) Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Navare Manasi D <manasi.d.navare@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Patnana Venkata Sai <venkata.sai.patnana@intel.com> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> --- .../drm/i915/display/intel_display_debugfs.c | 76 ++++++++++++++++++- .../drm/i915/display/intel_display_types.h | 1 + 2 files changed, 76 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 717d5624839d..2cf742a0b957 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -2395,6 +2395,73 @@ static const struct file_operations i915_dsc_fec_support_fops = { .write = i915_dsc_fec_support_write }; +static int i915_dsc_bpp_show(struct seq_file *m, void *data) +{ + struct drm_connector *connector = m->private; + struct drm_device *dev = connector->dev; + struct drm_crtc *crtc; + struct intel_crtc_state *crtc_state; + struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); + int ret; + + if (!encoder) + return -ENODEV; + + ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex); + if (ret) + return ret; + + crtc = connector->state->crtc; + if (connector->status != connector_status_connected || !crtc) { + ret = -ENODEV; + goto out; + } + + crtc_state = to_intel_crtc_state(crtc->state); + seq_printf(m, "Compressed_BPP: %d\n", crtc_state->dsc.compressed_bpp); + +out: drm_modeset_unlock(&dev->mode_config.connection_mutex); + + return ret; +} + +static ssize_t i915_dsc_bpp_write(struct file *file, + const char __user *ubuf, + size_t len, loff_t *offp) +{ + struct drm_connector *connector = + ((struct seq_file *)file->private_data)->private; + struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + int dsc_bpp = 0; + int ret; + + ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpp); + if (ret < 0) + return ret; + + intel_dp->force_dsc_bpp = dsc_bpp; + *offp += len; + + return len; +} + +static int i915_dsc_bpp_open(struct inode *inode, + struct file *file) +{ + return single_open(file, i915_dsc_bpp_show, + inode->i_private); +} + +static const struct file_operations i915_dsc_bpp_fops = { + .owner = THIS_MODULE, + .open = i915_dsc_bpp_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, + .write = i915_dsc_bpp_write +}; + /** * intel_connector_debugfs_add - add i915 specific connector debugfs files * @connector: pointer to a registered drm_connector @@ -2433,10 +2500,17 @@ int intel_connector_debugfs_add(struct drm_connector *connector) connector, &i915_hdcp_sink_capability_fops); } - if ((DISPLAY_VER(dev_priv) >= 11 || IS_CANNONLAKE(dev_priv)) && ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && !to_intel_connector(connector)->mst_port) || connector->connector_type == DRM_MODE_CONNECTOR_eDP)) + if ((DISPLAY_VER(dev_priv) >= 11 || IS_CANNONLAKE(dev_priv)) && + ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && + !to_intel_connector(connector)->mst_port) || + connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { debugfs_create_file("i915_dsc_fec_support", 0644, root, connector, &i915_dsc_fec_support_fops); + debugfs_create_file("i915_dsc_bpp", 0644, root, + connector, &i915_dsc_bpp_fops); + } + /* Legacy panels doesn't lpsp on any platform */ if ((DISPLAY_VER(dev_priv) >= 9 || IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) && diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index d94f361b548b..19d8d3eefbc2 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1612,6 +1612,7 @@ struct intel_dp { /* Display stream compression testing */ bool force_dsc_en; + int force_dsc_bpp; bool hobl_failed; bool hobl_active; -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP 2021-07-20 6:49 [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP Vandita Kulkarni 2021-07-20 6:49 ` [Intel-gfx] [v7 1/3] drm/i915/display: Add write permissions for fec support Vandita Kulkarni 2021-07-20 6:49 ` [Intel-gfx] [v7 2/3] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable Vandita Kulkarni @ 2021-07-20 6:49 ` Vandita Kulkarni 2021-07-20 7:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable setting custom DSC BPP Patchwork ` (4 subsequent siblings) 7 siblings, 0 replies; 16+ messages in thread From: Vandita Kulkarni @ 2021-07-20 6:49 UTC (permalink / raw) To: intel-gfx Set DSC BPP to the value forced through debugfs. It can go from bpc to bpp-1. v2: Use default dsc bpp when we are just doing force_dsc_en, use default dsc bpp for invalid force_dsc_bpp values. (Jani) Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by: Swati Sharma <swati2.sharma@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 5b52beaddada..c386ef8eb200 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1274,6 +1274,23 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, pipe_config->pipe_bpp); pipe_config->dsc.slice_count = dsc_dp_slice_count; } + + /* As of today we support DSC for only RGB */ + if (intel_dp->force_dsc_bpp) { + if (intel_dp->force_dsc_bpp >= 8 && + intel_dp->force_dsc_bpp < pipe_bpp) { + drm_dbg_kms(&dev_priv->drm, + "DSC BPP forced to %d", + intel_dp->force_dsc_bpp); + pipe_config->dsc.compressed_bpp = + intel_dp->force_dsc_bpp; + } else { + drm_dbg_kms(&dev_priv->drm, + "Invalid DSC BPP %d", + intel_dp->force_dsc_bpp); + } + } + /* * VDSC engine operates at 1 Pixel per clock, so if peak pixel rate * is greater than the maximum Cdclock and if slice count is even -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable setting custom DSC BPP 2021-07-20 6:49 [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP Vandita Kulkarni ` (2 preceding siblings ...) 2021-07-20 6:49 ` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP Vandita Kulkarni @ 2021-07-20 7:07 ` Patchwork 2021-07-20 7:10 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork ` (3 subsequent siblings) 7 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2021-07-20 7:07 UTC (permalink / raw) To: Vandita Kulkarni; +Cc: intel-gfx == Series Details == Series: Enable setting custom DSC BPP URL : https://patchwork.freedesktop.org/series/92750/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/display/intel_display.c:1896:21: expected struct i915_vma *[assigned] vma +drivers/gpu/drm/i915/display/intel_display.c:1896:21: got void [noderef] __iomem *[assigned] iomem +drivers/gpu/drm/i915/display/intel_display.c:1896:21: warning: incorrect type in assignment (different address spaces) +drivers/gpu/drm/i915/gem/i915_gem_context.c:1412:34: expected struct i915_address_space *vm +drivers/gpu/drm/i915/gem/i915_gem_context.c:1412:34: got struct i915_address_space [noderef] __rcu *vm +drivers/gpu/drm/i915/gem/i915_gem_context.c:1412:34: warning: incorrect type in argument 1 (different address spaces) +drivers/gpu/drm/i915/gem/selftests/mock_context.c:43:25: expected struct i915_address_space [noderef] __rcu *vm +drivers/gpu/drm/i915/gem/selftests/mock_context.c:43:25: got struct i915_address_space * +drivers/gpu/drm/i915/gem/selftests/mock_context.c:43:25: warning: incorrect type in assignment (different address spaces) +drivers/gpu/drm/i915/gem/selftests/mock_context.c:60:34: expected struct i915_address_space *vm +drivers/gpu/drm/i915/gem/selftests/mock_context.c:60:34: got struct i915_address_space [noderef] __rcu *vm +drivers/gpu/drm/i915/gem/selftests/mock_context.c:60:34: warning: incorrect type in argument 1 (different address spaces) +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_reset.c:1396:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block +./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative (-262080) +./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative (-262080) +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for Enable setting custom DSC BPP 2021-07-20 6:49 [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP Vandita Kulkarni ` (3 preceding siblings ...) 2021-07-20 7:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable setting custom DSC BPP Patchwork @ 2021-07-20 7:10 ` Patchwork 2021-07-20 7:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork ` (2 subsequent siblings) 7 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2021-07-20 7:10 UTC (permalink / raw) To: Vandita Kulkarni; +Cc: intel-gfx == Series Details == Series: Enable setting custom DSC BPP URL : https://patchwork.freedesktop.org/series/92750/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Excess function parameter 'jump_whitelist' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Excess function parameter 'shadow_map' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Excess function parameter 'batch_map' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Function parameter or member 'trampoline' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Excess function parameter 'jump_whitelist' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Excess function parameter 'shadow_map' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Excess function parameter 'batch_map' description in 'intel_engine_cmd_parser' _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Enable setting custom DSC BPP 2021-07-20 6:49 [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP Vandita Kulkarni ` (4 preceding siblings ...) 2021-07-20 7:10 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork @ 2021-07-20 7:35 ` Patchwork 2021-07-20 7:53 ` [Intel-gfx] [v7 0/3] " Kulkarni, Vandita 2021-07-20 8:45 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork 7 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2021-07-20 7:35 UTC (permalink / raw) To: Vandita Kulkarni; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 2501 bytes --] == Series Details == Series: Enable setting custom DSC BPP URL : https://patchwork.freedesktop.org/series/92750/ State : success == Summary == CI Bug Log - changes from CI_DRM_10354 -> Patchwork_20651 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/index.html Known issues ------------ Here are the changes found in Patchwork_20651 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@amdgpu/amd_cs_nop@nop-compute0: - fi-ilk-650: NOTRUN -> [SKIP][1] ([fdo#109271]) +35 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/fi-ilk-650/igt@amdgpu/amd_cs_nop@nop-compute0.html * igt@kms_chamelium@dp-hpd-fast: - fi-ilk-650: NOTRUN -> [SKIP][2] ([fdo#109271] / [fdo#111827]) +8 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/fi-ilk-650/igt@kms_chamelium@dp-hpd-fast.html #### Possible fixes #### * igt@gem_exec_suspend@basic-s0: - fi-tgl-u2: [FAIL][3] ([i915#1888]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 Participating hosts (38 -> 34) ------------------------------ Additional (1): fi-ilk-650 Missing (5): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-bdw-samus Build changes ------------- * Linux: CI_DRM_10354 -> Patchwork_20651 CI-20190529: 20190529 CI_DRM_10354: 5b085adbd699d92f00f191551e35ed14dab681f4 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6146: 6caef22e4aafed275771f564d4ea4cab09896ebc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_20651: b0d580814132cd3d67ecaf3e6db8900327f2663a @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == b0d580814132 drm/i915/display/dsc: Force dsc BPP da744c8b2dcd drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable 5e12334a0eac drm/i915/display: Add write permissions for fec support == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/index.html [-- Attachment #1.2: Type: text/html, Size: 3235 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP 2021-07-20 6:49 [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP Vandita Kulkarni ` (5 preceding siblings ...) 2021-07-20 7:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2021-07-20 7:53 ` Kulkarni, Vandita 2021-07-20 8:45 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork 7 siblings, 0 replies; 16+ messages in thread From: Kulkarni, Vandita @ 2021-07-20 7:53 UTC (permalink / raw) To: intel-gfx Pushed to drm-intel-next, thanks for the reviews. -Vandita > -----Original Message----- > From: Kulkarni, Vandita <vandita.kulkarni@intel.com> > Sent: Tuesday, July 20, 2021 12:19 PM > To: intel-gfx@lists.freedesktop.org > Cc: Kulkarni, Vandita <vandita.kulkarni@intel.com> > Subject: [v7 0/3] Enable setting custom DSC BPP > > This series add debugfs entry to force dsc bpp to ceratin valid test value, for > validation needs. > This series has been tested locally. > With the introduction of i915_dsc_bpp debugfs the expectation is that > whenever there is force_dsc_en set, force_dsc_bpp should have a valid > value for that format which is between bpp to bpp-1. > > This makes the older test kms_dp_dsc --basic fail as in that case > force_dsc_bpp would be 0 and is not a valid value. > > Have tested with local changes on the same. > The series https://patchwork.freedesktop.org/series/91772/ > have the base patches and would need some work on the debugfs name > change, giving default value for force_dsc_bpp in case of basic-dsc-enable > test cases, clearing up of the force_dsc_bpp value while exiting the test. > Which will be floated shortly. > > Have added minor fix on the feci debugfs interface. > If further changes are needed on the same will float them in a different > series. > > This series has been reviewed here > https://patchwork.freedesktop.org/series/92312/#rev5 > > Resubmitting it here as the series submitter got overridden due to one of the > review comment mishaps. > > Patnana Venkata Sai (1): > drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP > enable > > Vandita Kulkarni (2): > drm/i915/display: Add write permissions for fec support > drm/i915/display/dsc: Force dsc BPP > > .../drm/i915/display/intel_display_debugfs.c | 78 ++++++++++++++++++- > .../drm/i915/display/intel_display_types.h | 1 + > drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++ > 3 files changed, 94 insertions(+), 2 deletions(-) > > -- > 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for Enable setting custom DSC BPP 2021-07-20 6:49 [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP Vandita Kulkarni ` (6 preceding siblings ...) 2021-07-20 7:53 ` [Intel-gfx] [v7 0/3] " Kulkarni, Vandita @ 2021-07-20 8:45 ` Patchwork 7 siblings, 0 replies; 16+ messages in thread From: Patchwork @ 2021-07-20 8:45 UTC (permalink / raw) To: Vandita Kulkarni; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 30252 bytes --] == Series Details == Series: Enable setting custom DSC BPP URL : https://patchwork.freedesktop.org/series/92750/ State : success == Summary == CI Bug Log - changes from CI_DRM_10354_full -> Patchwork_20651_full ==================================================== Summary ------- **SUCCESS** No regressions found. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_20651_full: ### IGT changes ### #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@gem_exec_suspend@basic-s4-devices: - {shard-rkl}: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-rkl-6/igt@gem_exec_suspend@basic-s4-devices.html * igt@kms_ccs@pipe-a-bad-rotation-90-yf_tiled_ccs: - {shard-rkl}: NOTRUN -> [SKIP][2] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-rkl-6/igt@kms_ccs@pipe-a-bad-rotation-90-yf_tiled_ccs.html Known issues ------------ Here are the changes found in Patchwork_20651_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@feature_discovery@display-4x: - shard-glk: NOTRUN -> [SKIP][3] ([fdo#109271]) +9 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-glk2/igt@feature_discovery@display-4x.html - shard-tglb: NOTRUN -> [SKIP][4] ([i915#1839]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-tglb3/igt@feature_discovery@display-4x.html * igt@gem_ctx_isolation@preservation-s3@rcs0: - shard-apl: [PASS][5] -> [DMESG-WARN][6] ([i915#180]) +3 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-apl6/igt@gem_ctx_isolation@preservation-s3@rcs0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-apl8/igt@gem_ctx_isolation@preservation-s3@rcs0.html * igt@gem_ctx_persistence@smoketest: - shard-snb: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1099]) +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-snb5/igt@gem_ctx_persistence@smoketest.html - shard-iclb: [PASS][8] -> [FAIL][9] ([i915#2896]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-iclb2/igt@gem_ctx_persistence@smoketest.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb5/igt@gem_ctx_persistence@smoketest.html * igt@gem_exec_fair@basic-none-rrul@rcs0: - shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-glk5/igt@gem_exec_fair@basic-none-rrul@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-glk8/igt@gem_exec_fair@basic-none-rrul@rcs0.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [PASS][12] -> [FAIL][13] ([i915#2842]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-iclb3/igt@gem_exec_fair@basic-none-share@rcs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb1/igt@gem_exec_fair@basic-none-share@rcs0.html - shard-apl: [PASS][14] -> [SKIP][15] ([fdo#109271]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-apl3/igt@gem_exec_fair@basic-none-share@rcs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-apl2/igt@gem_exec_fair@basic-none-share@rcs0.html - shard-glk: NOTRUN -> [FAIL][16] ([i915#2842]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-glk2/igt@gem_exec_fair@basic-none-share@rcs0.html * igt@gem_exec_fair@basic-pace@bcs0: - shard-tglb: [PASS][17] -> [FAIL][18] ([i915#2842]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-tglb5/igt@gem_exec_fair@basic-pace@bcs0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-tglb7/igt@gem_exec_fair@basic-pace@bcs0.html * igt@gem_pread@exhaustion: - shard-iclb: NOTRUN -> [WARN][19] ([i915#2658]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb5/igt@gem_pread@exhaustion.html * igt@gem_userptr_blits@vma-merge: - shard-tglb: NOTRUN -> [FAIL][20] ([i915#3318]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-tglb3/igt@gem_userptr_blits@vma-merge.html * igt@i915_selftest@mock@vma: - shard-snb: NOTRUN -> [DMESG-WARN][21] ([i915#3746]) +17 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-snb7/igt@i915_selftest@mock@vma.html * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip: - shard-skl: NOTRUN -> [FAIL][22] ([i915#3722]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip: - shard-tglb: NOTRUN -> [SKIP][23] ([fdo#111615]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-tglb3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html * igt@kms_ccs@pipe-d-ccs-on-another-bo-yf_tiled_ccs: - shard-apl: NOTRUN -> [SKIP][24] ([fdo#109271]) +13 similar issues [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-apl7/igt@kms_ccs@pipe-d-ccs-on-another-bo-yf_tiled_ccs.html * igt@kms_chamelium@vga-hpd-after-suspend: - shard-iclb: NOTRUN -> [SKIP][25] ([fdo#109284] / [fdo#111827]) +2 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb5/igt@kms_chamelium@vga-hpd-after-suspend.html * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red: - shard-kbl: NOTRUN -> [SKIP][26] ([fdo#109271] / [fdo#111827]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl1/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html * igt@kms_color_chamelium@pipe-b-ctm-0-25: - shard-snb: NOTRUN -> [SKIP][27] ([fdo#109271] / [fdo#111827]) +6 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-snb7/igt@kms_color_chamelium@pipe-b-ctm-0-25.html * igt@kms_color_chamelium@pipe-c-ctm-negative: - shard-skl: NOTRUN -> [SKIP][28] ([fdo#109271] / [fdo#111827]) +1 similar issue [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl2/igt@kms_color_chamelium@pipe-c-ctm-negative.html * igt@kms_color_chamelium@pipe-d-ctm-0-25: - shard-glk: NOTRUN -> [SKIP][29] ([fdo#109271] / [fdo#111827]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-glk2/igt@kms_color_chamelium@pipe-d-ctm-0-25.html - shard-tglb: NOTRUN -> [SKIP][30] ([fdo#109284] / [fdo#111827]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-tglb3/igt@kms_color_chamelium@pipe-d-ctm-0-25.html * igt@kms_cursor_crc@pipe-a-cursor-32x10-sliding: - shard-tglb: NOTRUN -> [SKIP][31] ([i915#3359]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-tglb3/igt@kms_cursor_crc@pipe-a-cursor-32x10-sliding.html * igt@kms_cursor_crc@pipe-b-cursor-128x42-sliding: - shard-skl: [PASS][32] -> [FAIL][33] ([i915#3444]) +2 similar issues [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-128x42-sliding.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl3/igt@kms_cursor_crc@pipe-b-cursor-128x42-sliding.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-kbl: [PASS][34] -> [DMESG-WARN][35] ([i915#180]) +1 similar issue [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_cursor_crc@pipe-d-cursor-64x64-random: - shard-iclb: NOTRUN -> [SKIP][36] ([fdo#109278]) +13 similar issues [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb5/igt@kms_cursor_crc@pipe-d-cursor-64x64-random.html * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: - shard-iclb: NOTRUN -> [SKIP][37] ([fdo#109274] / [fdo#109278]) +1 similar issue [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb7/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-skl: NOTRUN -> [FAIL][38] ([i915#2346] / [i915#533]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-kbl: [PASS][39] -> [INCOMPLETE][40] ([i915#155] / [i915#180] / [i915#636]) [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-kbl3/igt@kms_fbcon_fbt@fbc-suspend.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl4/igt@kms_fbcon_fbt@fbc-suspend.html * igt@kms_flip@2x-flip-vs-modeset-vs-hang: - shard-iclb: NOTRUN -> [SKIP][41] ([fdo#109274]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb4/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html * igt@kms_flip@flip-vs-expired-vblank@c-edp1: - shard-skl: [PASS][42] -> [FAIL][43] ([i915#79]) [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl1/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt: - shard-tglb: NOTRUN -> [SKIP][44] ([fdo#111825]) +6 similar issues [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-wc: - shard-kbl: NOTRUN -> [SKIP][45] ([fdo#109271]) +30 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt: - shard-skl: NOTRUN -> [SKIP][46] ([fdo#109271]) +38 similar issues [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-cpu: - shard-iclb: NOTRUN -> [SKIP][47] ([fdo#109280]) +4 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-cpu.html * igt@kms_hdr@static-toggle-suspend: - shard-iclb: NOTRUN -> [SKIP][48] ([i915#1187]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb5/igt@kms_hdr@static-toggle-suspend.html * igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d: - shard-kbl: NOTRUN -> [SKIP][49] ([fdo#109271] / [i915#533]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl1/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb: - shard-apl: NOTRUN -> [FAIL][50] ([fdo#108145] / [i915#265]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max: - shard-skl: NOTRUN -> [FAIL][51] ([fdo#108145] / [i915#265]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [PASS][52] -> [FAIL][53] ([fdo#108145] / [i915#265]) +1 similar issue [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_plane_lowres@pipe-b-tiling-none: - shard-iclb: NOTRUN -> [SKIP][54] ([i915#3536]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb5/igt@kms_plane_lowres@pipe-b-tiling-none.html * igt@kms_psr2_sf@cursor-plane-update-sf: - shard-skl: NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#658]) +1 similar issue [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl8/igt@kms_psr2_sf@cursor-plane-update-sf.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2: - shard-kbl: NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#658]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html * igt@kms_psr2_su@page_flip: - shard-iclb: [PASS][57] -> [SKIP][58] ([fdo#109642] / [fdo#111068] / [i915#658]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-iclb2/igt@kms_psr2_su@page_flip.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb5/igt@kms_psr2_su@page_flip.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [PASS][59] -> [SKIP][60] ([fdo#109441]) +2 similar issues [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-iclb2/igt@kms_psr@psr2_cursor_render.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb5/igt@kms_psr@psr2_cursor_render.html * igt@kms_psr@psr2_primary_mmap_gtt: - shard-iclb: NOTRUN -> [SKIP][61] ([fdo#109441]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb5/igt@kms_psr@psr2_primary_mmap_gtt.html * igt@kms_psr@psr2_sprite_blt: - shard-tglb: NOTRUN -> [FAIL][62] ([i915#132] / [i915#3467]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-tglb3/igt@kms_psr@psr2_sprite_blt.html * igt@kms_vblank@pipe-d-query-forked-hang: - shard-snb: NOTRUN -> [SKIP][63] ([fdo#109271]) +156 similar issues [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-snb5/igt@kms_vblank@pipe-d-query-forked-hang.html * igt@perf@polling-small-buf: - shard-skl: [PASS][64] -> [FAIL][65] ([i915#1722]) [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl10/igt@perf@polling-small-buf.html [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl7/igt@perf@polling-small-buf.html * igt@prime_vgem@coherency-gtt: - shard-tglb: NOTRUN -> [SKIP][66] ([fdo#111656]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-tglb3/igt@prime_vgem@coherency-gtt.html * igt@sysfs_clients@sema-10: - shard-iclb: NOTRUN -> [SKIP][67] ([i915#2994]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb5/igt@sysfs_clients@sema-10.html #### Possible fixes #### * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [FAIL][68] ([i915#2842]) -> [PASS][69] [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-glk3/igt@gem_exec_fair@basic-pace-share@rcs0.html [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-kbl: [FAIL][70] ([i915#2842]) -> [PASS][71] +1 similar issue [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl7/igt@gem_exec_fair@basic-pace@vecs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-iclb: [FAIL][72] ([i915#2849]) -> [PASS][73] [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb5/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_exec_flush@basic-uc-rw-default: - shard-glk: [INCOMPLETE][74] ([i915#2369]) -> [PASS][75] [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-glk6/igt@gem_exec_flush@basic-uc-rw-default.html [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-glk2/igt@gem_exec_flush@basic-uc-rw-default.html * igt@gem_mmap_gtt@cpuset-big-copy-odd: - shard-iclb: [FAIL][76] ([i915#2428]) -> [PASS][77] +1 similar issue [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-iclb6/igt@gem_mmap_gtt@cpuset-big-copy-odd.html [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb6/igt@gem_mmap_gtt@cpuset-big-copy-odd.html - shard-glk: [FAIL][78] ([i915#307]) -> [PASS][79] [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-glk5/igt@gem_mmap_gtt@cpuset-big-copy-odd.html [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-glk8/igt@gem_mmap_gtt@cpuset-big-copy-odd.html * igt@i915_pm_rpm@system-suspend-modeset: - shard-skl: [INCOMPLETE][80] ([i915#151]) -> [PASS][81] [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl1/igt@i915_pm_rpm@system-suspend-modeset.html [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl2/igt@i915_pm_rpm@system-suspend-modeset.html * igt@kms_color@pipe-c-ctm-0-75: - shard-skl: [DMESG-WARN][82] ([i915#1982]) -> [PASS][83] +1 similar issue [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl5/igt@kms_color@pipe-c-ctm-0-75.html [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl8/igt@kms_color@pipe-c-ctm-0-75.html * igt@kms_cursor_crc@pipe-b-cursor-suspend: - shard-kbl: [DMESG-WARN][84] ([i915#180]) -> [PASS][85] [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html * igt@kms_cursor_legacy@flip-vs-cursor-legacy: - shard-skl: [FAIL][86] ([i915#2346]) -> [PASS][87] [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-ytiled: - shard-skl: [FAIL][88] -> [PASS][89] +1 similar issue [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl1/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-ytiled.html [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl3/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-ytiled.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-apl: [INCOMPLETE][90] ([i915#180] / [i915#1982]) -> [PASS][91] [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-apl2/igt@kms_fbcon_fbt@fbc-suspend.html [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html * igt@kms_flip@flip-vs-expired-vblank@a-edp1: - shard-skl: [FAIL][92] ([i915#2122]) -> [PASS][93] [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [FAIL][94] ([i915#1188]) -> [PASS][95] [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl3/igt@kms_hdr@bpc-switch-dpms.html [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [FAIL][96] ([fdo#108145] / [i915#265]) -> [PASS][97] +1 similar issue [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html * igt@kms_psr@psr2_dpms: - shard-iclb: [SKIP][98] ([fdo#109441]) -> [PASS][99] [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-iclb1/igt@kms_psr@psr2_dpms.html [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb2/igt@kms_psr@psr2_dpms.html * igt@perf_pmu@module-unload: - shard-skl: [DMESG-WARN][100] ([i915#1982] / [i915#262]) -> [PASS][101] [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-skl1/igt@perf_pmu@module-unload.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-skl3/igt@perf_pmu@module-unload.html #### Warnings #### * igt@gem_exec_fair@basic-pace@rcs0: - shard-kbl: [FAIL][102] ([i915#2851]) -> [FAIL][103] ([i915#2842]) [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-kbl6/igt@gem_exec_fair@basic-pace@rcs0.html [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl7/igt@gem_exec_fair@basic-pace@rcs0.html * igt@gem_pread@exhaustion: - shard-glk: [WARN][104] ([i915#2658]) -> [DMESG-WARN][105] ([i915#118] / [i915#95]) [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-glk4/igt@gem_pread@exhaustion.html [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-glk5/igt@gem_pread@exhaustion.html * igt@i915_pm_rc6_residency@rc6-idle: - shard-iclb: [WARN][106] ([i915#1804] / [i915#2684]) -> [WARN][107] ([i915#2684]) [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-iclb3/igt@i915_pm_rc6_residency@rc6-idle.html [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2: - shard-iclb: [SKIP][108] ([i915#2920]) -> [SKIP][109] ([i915#658]) +1 similar issue [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5: - shard-iclb: [SKIP][110] ([i915#658]) -> [SKIP][111] ([i915#2920]) +1 similar issue [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-iclb1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html * igt@runner@aborted: - shard-kbl: ([FAIL][112], [FAIL][113], [FAIL][114], [FAIL][115]) ([i915#1814] / [i915#2505] / [i915#3002] / [i915#3363]) -> ([FAIL][116], [FAIL][117], [FAIL][118], [FAIL][119], [FAIL][120], [FAIL][121]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#92]) [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-kbl4/igt@runner@aborted.html [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-kbl6/igt@runner@aborted.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-kbl7/igt@runner@aborted.html [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-kbl6/igt@runner@aborted.html [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl7/igt@runner@aborted.html [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl7/igt@runner@aborted.html [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl7/igt@runner@aborted.html [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl4/igt@runner@aborted.html [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl4/igt@runner@aborted.html [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-kbl2/igt@runner@aborted.html - shard-apl: ([FAIL][122], [FAIL][123]) ([i915#180] / [i915#1814] / [i915#3363]) -> ([FAIL][124], [FAIL][125], [FAIL][126], [FAIL][127]) ([i915#1610] / [i915#180] / [i915#1814] / [i915#2292] / [i915#3363]) [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-apl2/igt@runner@aborted.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-apl2/igt@runner@aborted.html [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-apl2/igt@runner@aborted.html [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-apl2/igt@runner@aborted.html [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-apl8/igt@runner@aborted.html [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-apl7/igt@runner@aborted.html - shard-glk: ([FAIL][128], [FAIL][129], [FAIL][130]) ([i915#2722] / [i915#3002] / [i915#3363] / [k.org#202321]) -> ([FAIL][131], [FAIL][132]) ([i915#3002] / [i915#3363] / [k.org#202321]) [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-glk6/igt@runner@aborted.html [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-glk3/igt@runner@aborted.html [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10354/shard-glk2/igt@runner@aborted.html [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-glk4/igt@runner@aborted.html [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/shard-glk9/igt@runner@aborted.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283 [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109288]: https://bugs.freedesktop.org/show_bug.cgi?id=109288 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300 [fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302 [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303 [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307 [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308 [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309 [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#110254]: https://bugs.freedesktop.org/show_bug.cgi?id=110254 [fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542 [fdo#110577]: https://bugs.freedesktop.org/show_bug.cgi?id=110577 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111314]: https://bugs.freedesktop.org/show_bug.cgi?id=111314 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#112022]: https://bugs.freedesktop.org/show_bug.cgi?id=112022 [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054 [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099 [i915#1149]: https://gitlab.freedesktop.org/drm/intel/issues/1149 [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118 [i915#1187]: https://gitlab.freedesktop.org/drm/intel/issues/1187 [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132 [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436 [i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151 [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542 [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155 [i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610 [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722 [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804 [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814 [i915#1825]: https://gitlab.freedesk == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20651/index.html [-- Attachment #1.2: Type: text/html, Size: 33564 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [v7 0/3] Set BPP in the kernel @ 2021-07-19 9:50 Vandita Kulkarni 2021-07-19 9:50 ` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP Vandita Kulkarni 0 siblings, 1 reply; 16+ messages in thread From: Vandita Kulkarni @ 2021-07-19 9:50 UTC (permalink / raw) To: intel-gfx Patnana Venkata Sai (1): drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable Vandita Kulkarni (2): drm/i915/display: Add write permissions for fec support drm/i915/display/dsc: Force dsc BPP .../drm/i915/display/intel_display_debugfs.c | 78 ++++++++++++++++++- .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++ 3 files changed, 94 insertions(+), 2 deletions(-) -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP 2021-07-19 9:50 [Intel-gfx] [v7 0/3] Set BPP in the kernel Vandita Kulkarni @ 2021-07-19 9:50 ` Vandita Kulkarni 0 siblings, 0 replies; 16+ messages in thread From: Vandita Kulkarni @ 2021-07-19 9:50 UTC (permalink / raw) To: intel-gfx Set DSC BPP to the value forced through debugfs. It can go from bpc to bpp-1. v2: Use default dsc bpp when we are just doing force_dsc_en, use default dsc bpp for invalid force_dsc_bpp values. (Jani) Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by: Swati Sharma <swati2.sharma@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 5b52beaddada..c386ef8eb200 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1274,6 +1274,23 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, pipe_config->pipe_bpp); pipe_config->dsc.slice_count = dsc_dp_slice_count; } + + /* As of today we support DSC for only RGB */ + if (intel_dp->force_dsc_bpp) { + if (intel_dp->force_dsc_bpp >= 8 && + intel_dp->force_dsc_bpp < pipe_bpp) { + drm_dbg_kms(&dev_priv->drm, + "DSC BPP forced to %d", + intel_dp->force_dsc_bpp); + pipe_config->dsc.compressed_bpp = + intel_dp->force_dsc_bpp; + } else { + drm_dbg_kms(&dev_priv->drm, + "Invalid DSC BPP %d", + intel_dp->force_dsc_bpp); + } + } + /* * VDSC engine operates at 1 Pixel per clock, so if peak pixel rate * is greater than the maximum Cdclock and if slice count is even -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Intel-gfx] [v7 0/3] Set BPP in the kernel @ 2021-07-08 10:25 Vandita Kulkarni 2021-07-08 10:25 ` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP Vandita Kulkarni 0 siblings, 1 reply; 16+ messages in thread From: Vandita Kulkarni @ 2021-07-08 10:25 UTC (permalink / raw) To: intel-gfx; +Cc: jani.nikula This series add debugfs entry to force dsc bpp to ceratin valid test value, for validation needs. This series has been tested locally. With the introduction of i915_dsc_bpp debugfs the expectation is that whenever there is force_dsc_en set, force_dsc_bpp should have a valid value for that format which is between bpp to bpp-1. This makes the older test kms_dp_dsc --basic fail as in that case force_dsc_bpp would be 0 and is not a valid value. Have tested with local changes on the same. The series https://patchwork.freedesktop.org/series/91772/ have the base patches and would need some work on the debugfs name change, giving default value for force_dsc_bpp in case of basic-dsc-enable test cases, clearing up of the force_dsc_bpp value while exiting the test. Which will be floated shortly. Have added minor fix on the feci debugfs interface. If further changes are needed on the same will float them in a different series. Patnana Venkata Sai (1): drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable Vandita Kulkarni (2): drm/i915/display: Add write permissions for fec support drm/i915/display/dsc: Force dsc BPP .../drm/i915/display/intel_display_debugfs.c | 78 ++++++++++++++++++- .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++ 3 files changed, 94 insertions(+), 2 deletions(-) -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP 2021-07-08 10:25 [Intel-gfx] [v7 0/3] Set BPP in the kernel Vandita Kulkarni @ 2021-07-08 10:25 ` Vandita Kulkarni 2021-07-08 13:09 ` Jani Nikula 0 siblings, 1 reply; 16+ messages in thread From: Vandita Kulkarni @ 2021-07-08 10:25 UTC (permalink / raw) To: intel-gfx; +Cc: jani.nikula Set DSC BPP to the value forced through debugfs. It can go from bpc to bpp-1. Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 5b52beaddada..3e50cdd7e448 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1240,6 +1240,23 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, pipe_config->port_clock = intel_dp->common_rates[limits->max_clock]; pipe_config->lane_count = limits->max_lane_count; + if (intel_dp->force_dsc_en) { + /* As of today we support DSC for only RGB */ + if (intel_dp->force_dsc_bpp >= 8 && + intel_dp->force_dsc_bpp < pipe_bpp) { + drm_dbg_kms(&dev_priv->drm, + "DSC BPP forced to %d", + intel_dp->force_dsc_bpp); + pipe_config->dsc.compressed_bpp = + intel_dp->force_dsc_bpp; + } else { + drm_dbg_kms(&dev_priv->drm, + "Invalid DSC BPP %d", + intel_dp->force_dsc_bpp); + return -EINVAL; + } + } + if (intel_dp_is_edp(intel_dp)) { pipe_config->dsc.compressed_bpp = min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP 2021-07-08 10:25 ` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP Vandita Kulkarni @ 2021-07-08 13:09 ` Jani Nikula 2021-07-08 13:13 ` Jani Nikula 0 siblings, 1 reply; 16+ messages in thread From: Jani Nikula @ 2021-07-08 13:09 UTC (permalink / raw) To: Vandita Kulkarni, intel-gfx On Thu, 08 Jul 2021, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote: > Set DSC BPP to the value forced through > debugfs. It can go from bpc to bpp-1. > > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 5b52beaddada..3e50cdd7e448 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1240,6 +1240,23 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, > pipe_config->port_clock = intel_dp->common_rates[limits->max_clock]; > pipe_config->lane_count = limits->max_lane_count; > > + if (intel_dp->force_dsc_en) { > + /* As of today we support DSC for only RGB */ > + if (intel_dp->force_dsc_bpp >= 8 && > + intel_dp->force_dsc_bpp < pipe_bpp) { > + drm_dbg_kms(&dev_priv->drm, > + "DSC BPP forced to %d", > + intel_dp->force_dsc_bpp); > + pipe_config->dsc.compressed_bpp = > + intel_dp->force_dsc_bpp; > + } else { > + drm_dbg_kms(&dev_priv->drm, > + "Invalid DSC BPP %d", > + intel_dp->force_dsc_bpp); > + return -EINVAL; I'd just let it use the normal compressed_bpp, with the debug message, instead of returning -EINVAL. > + } > + } > + This should be *after* the below blocks, because otherwise compressed_bpp will be overridden by the normal case, not by the force case! BR, Jani. > if (intel_dp_is_edp(intel_dp)) { > pipe_config->dsc.compressed_bpp = > min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP 2021-07-08 13:09 ` Jani Nikula @ 2021-07-08 13:13 ` Jani Nikula 2021-07-08 13:24 ` Kulkarni, Vandita 0 siblings, 1 reply; 16+ messages in thread From: Jani Nikula @ 2021-07-08 13:13 UTC (permalink / raw) To: Vandita Kulkarni, intel-gfx On Thu, 08 Jul 2021, Jani Nikula <jani.nikula@intel.com> wrote: > On Thu, 08 Jul 2021, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote: >> Set DSC BPP to the value forced through >> debugfs. It can go from bpc to bpp-1. >> >> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> >> --- >> drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++ >> 1 file changed, 17 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c >> index 5b52beaddada..3e50cdd7e448 100644 >> --- a/drivers/gpu/drm/i915/display/intel_dp.c >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c >> @@ -1240,6 +1240,23 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, >> pipe_config->port_clock = intel_dp->common_rates[limits->max_clock]; >> pipe_config->lane_count = limits->max_lane_count; >> >> + if (intel_dp->force_dsc_en) { Oh, this should check for intel_dp->force_dsc_bpp. We don't want to always force the bpp when we force dsc enable. >> + /* As of today we support DSC for only RGB */ >> + if (intel_dp->force_dsc_bpp >= 8 && >> + intel_dp->force_dsc_bpp < pipe_bpp) { >> + drm_dbg_kms(&dev_priv->drm, >> + "DSC BPP forced to %d", >> + intel_dp->force_dsc_bpp); >> + pipe_config->dsc.compressed_bpp = >> + intel_dp->force_dsc_bpp; >> + } else { >> + drm_dbg_kms(&dev_priv->drm, >> + "Invalid DSC BPP %d", >> + intel_dp->force_dsc_bpp); >> + return -EINVAL; > > I'd just let it use the normal compressed_bpp, with the debug message, > instead of returning -EINVAL. > >> + } >> + } >> + > > This should be *after* the below blocks, because otherwise > compressed_bpp will be overridden by the normal case, not by the force > case! > > BR, > Jani. > >> if (intel_dp_is_edp(intel_dp)) { >> pipe_config->dsc.compressed_bpp = >> min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP 2021-07-08 13:13 ` Jani Nikula @ 2021-07-08 13:24 ` Kulkarni, Vandita 2021-07-08 16:23 ` Jani Nikula 0 siblings, 1 reply; 16+ messages in thread From: Kulkarni, Vandita @ 2021-07-08 13:24 UTC (permalink / raw) To: Nikula, Jani, intel-gfx > -----Original Message----- > From: Nikula, Jani <jani.nikula@intel.com> > Sent: Thursday, July 8, 2021 6:44 PM > To: Kulkarni, Vandita <vandita.kulkarni@intel.com>; intel- > gfx@lists.freedesktop.org > Cc: Kulkarni, Vandita <vandita.kulkarni@intel.com> > Subject: Re: [v7 3/3] drm/i915/display/dsc: Force dsc BPP > > On Thu, 08 Jul 2021, Jani Nikula <jani.nikula@intel.com> wrote: > > On Thu, 08 Jul 2021, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote: > >> Set DSC BPP to the value forced through debugfs. It can go from bpc > >> to bpp-1. > >> > >> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> > >> --- > >> drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++ > >> 1 file changed, 17 insertions(+) > >> > >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > >> b/drivers/gpu/drm/i915/display/intel_dp.c > >> index 5b52beaddada..3e50cdd7e448 100644 > >> --- a/drivers/gpu/drm/i915/display/intel_dp.c > >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c > >> @@ -1240,6 +1240,23 @@ static int intel_dp_dsc_compute_config(struct > intel_dp *intel_dp, > >> pipe_config->port_clock = intel_dp->common_rates[limits- > >max_clock]; > >> pipe_config->lane_count = limits->max_lane_count; > >> > >> + if (intel_dp->force_dsc_en) { > > Oh, this should check for intel_dp->force_dsc_bpp. We don't want to always > force the bpp when we force dsc enable. Okay will fix this. And I was returning -EINVAL , to fail the test on setting invalid BPP. > > >> + /* As of today we support DSC for only RGB */ > >> + if (intel_dp->force_dsc_bpp >= 8 && > >> + intel_dp->force_dsc_bpp < pipe_bpp) { > >> + drm_dbg_kms(&dev_priv->drm, > >> + "DSC BPP forced to %d", > >> + intel_dp->force_dsc_bpp); > >> + pipe_config->dsc.compressed_bpp = > >> + intel_dp->force_dsc_bpp; > >> + } else { > >> + drm_dbg_kms(&dev_priv->drm, > >> + "Invalid DSC BPP %d", > >> + intel_dp->force_dsc_bpp); > >> + return -EINVAL; > > > > I'd just let it use the normal compressed_bpp, with the debug message, > > instead of returning -EINVAL. > > > >> + } > >> + } > >> + > > > > This should be *after* the below blocks, because otherwise > > compressed_bpp will be overridden by the normal case, not by the force > > case! > > > > BR, > > Jani. > > > >> if (intel_dp_is_edp(intel_dp)) { > >> pipe_config->dsc.compressed_bpp = > >> min_t(u16, > drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, > > -- > Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP 2021-07-08 13:24 ` Kulkarni, Vandita @ 2021-07-08 16:23 ` Jani Nikula 2021-07-08 16:40 ` Kulkarni, Vandita 0 siblings, 1 reply; 16+ messages in thread From: Jani Nikula @ 2021-07-08 16:23 UTC (permalink / raw) To: Kulkarni, Vandita, intel-gfx On Thu, 08 Jul 2021, "Kulkarni, Vandita" <vandita.kulkarni@intel.com> wrote: >> -----Original Message----- >> From: Nikula, Jani <jani.nikula@intel.com> >> Sent: Thursday, July 8, 2021 6:44 PM >> To: Kulkarni, Vandita <vandita.kulkarni@intel.com>; intel- >> gfx@lists.freedesktop.org >> Cc: Kulkarni, Vandita <vandita.kulkarni@intel.com> >> Subject: Re: [v7 3/3] drm/i915/display/dsc: Force dsc BPP >> >> On Thu, 08 Jul 2021, Jani Nikula <jani.nikula@intel.com> wrote: >> > On Thu, 08 Jul 2021, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote: >> >> Set DSC BPP to the value forced through debugfs. It can go from bpc >> >> to bpp-1. >> >> >> >> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> >> >> --- >> >> drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++ >> >> 1 file changed, 17 insertions(+) >> >> >> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c >> >> b/drivers/gpu/drm/i915/display/intel_dp.c >> >> index 5b52beaddada..3e50cdd7e448 100644 >> >> --- a/drivers/gpu/drm/i915/display/intel_dp.c >> >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c >> >> @@ -1240,6 +1240,23 @@ static int intel_dp_dsc_compute_config(struct >> intel_dp *intel_dp, >> >> pipe_config->port_clock = intel_dp->common_rates[limits- >> >max_clock]; >> >> pipe_config->lane_count = limits->max_lane_count; >> >> >> >> + if (intel_dp->force_dsc_en) { >> >> Oh, this should check for intel_dp->force_dsc_bpp. We don't want to always >> force the bpp when we force dsc enable. > Okay will fix this. > And I was returning -EINVAL , to fail the test on setting invalid BPP. Okay, if it makes the test easier, I guess it's fine. Up to you. BR, Jani. > >> >> >> + /* As of today we support DSC for only RGB */ >> >> + if (intel_dp->force_dsc_bpp >= 8 && >> >> + intel_dp->force_dsc_bpp < pipe_bpp) { >> >> + drm_dbg_kms(&dev_priv->drm, >> >> + "DSC BPP forced to %d", >> >> + intel_dp->force_dsc_bpp); >> >> + pipe_config->dsc.compressed_bpp = >> >> + intel_dp->force_dsc_bpp; >> >> + } else { >> >> + drm_dbg_kms(&dev_priv->drm, >> >> + "Invalid DSC BPP %d", >> >> + intel_dp->force_dsc_bpp); >> >> + return -EINVAL; >> > >> > I'd just let it use the normal compressed_bpp, with the debug message, >> > instead of returning -EINVAL. >> > >> >> + } >> >> + } >> >> + >> > >> > This should be *after* the below blocks, because otherwise >> > compressed_bpp will be overridden by the normal case, not by the force >> > case! >> > >> > BR, >> > Jani. >> > >> >> if (intel_dp_is_edp(intel_dp)) { >> >> pipe_config->dsc.compressed_bpp = >> >> min_t(u16, >> drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, >> >> -- >> Jani Nikula, Intel Open Source Graphics Center -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP 2021-07-08 16:23 ` Jani Nikula @ 2021-07-08 16:40 ` Kulkarni, Vandita 0 siblings, 0 replies; 16+ messages in thread From: Kulkarni, Vandita @ 2021-07-08 16:40 UTC (permalink / raw) To: Nikula, Jani, intel-gfx > -----Original Message----- > From: Nikula, Jani <jani.nikula@intel.com> > Sent: Thursday, July 8, 2021 9:53 PM > To: Kulkarni, Vandita <vandita.kulkarni@intel.com>; intel- > gfx@lists.freedesktop.org > Subject: RE: [v7 3/3] drm/i915/display/dsc: Force dsc BPP > > On Thu, 08 Jul 2021, "Kulkarni, Vandita" <vandita.kulkarni@intel.com> wrote: > >> -----Original Message----- > >> From: Nikula, Jani <jani.nikula@intel.com> > >> Sent: Thursday, July 8, 2021 6:44 PM > >> To: Kulkarni, Vandita <vandita.kulkarni@intel.com>; intel- > >> gfx@lists.freedesktop.org > >> Cc: Kulkarni, Vandita <vandita.kulkarni@intel.com> > >> Subject: Re: [v7 3/3] drm/i915/display/dsc: Force dsc BPP > >> > >> On Thu, 08 Jul 2021, Jani Nikula <jani.nikula@intel.com> wrote: > >> > On Thu, 08 Jul 2021, Vandita Kulkarni <vandita.kulkarni@intel.com> > wrote: > >> >> Set DSC BPP to the value forced through debugfs. It can go from > >> >> bpc to bpp-1. > >> >> > >> >> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> > >> >> --- > >> >> drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++ > >> >> 1 file changed, 17 insertions(+) > >> >> > >> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > >> >> b/drivers/gpu/drm/i915/display/intel_dp.c > >> >> index 5b52beaddada..3e50cdd7e448 100644 > >> >> --- a/drivers/gpu/drm/i915/display/intel_dp.c > >> >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c > >> >> @@ -1240,6 +1240,23 @@ static int > >> >> intel_dp_dsc_compute_config(struct > >> intel_dp *intel_dp, > >> >> pipe_config->port_clock = intel_dp->common_rates[limits- > >> >max_clock]; > >> >> pipe_config->lane_count = limits->max_lane_count; > >> >> > >> >> + if (intel_dp->force_dsc_en) { > >> > >> Oh, this should check for intel_dp->force_dsc_bpp. We don't want to > >> always force the bpp when we force dsc enable. > > Okay will fix this. > > And I was returning -EINVAL , to fail the test on setting invalid BPP. > > Okay, if it makes the test easier, I guess it's fine. Up to you. Okay, for now I have sent a patch like you suggested, as I see that there are no negative test cases . Have sent the v2 of this patch. So, it wouldn't make much difference. Thanks, Vandita > > BR, > Jani. > > > > >> > >> >> + /* As of today we support DSC for only RGB */ > >> >> + if (intel_dp->force_dsc_bpp >= 8 && > >> >> + intel_dp->force_dsc_bpp < pipe_bpp) { > >> >> + drm_dbg_kms(&dev_priv->drm, > >> >> + "DSC BPP forced to %d", > >> >> + intel_dp->force_dsc_bpp); > >> >> + pipe_config->dsc.compressed_bpp = > >> >> + intel_dp->force_dsc_bpp; > >> >> + } else { > >> >> + drm_dbg_kms(&dev_priv->drm, > >> >> + "Invalid DSC BPP %d", > >> >> + intel_dp->force_dsc_bpp); > >> >> + return -EINVAL; > >> > > >> > I'd just let it use the normal compressed_bpp, with the debug > >> > message, instead of returning -EINVAL. > >> > > >> >> + } > >> >> + } > >> >> + > >> > > >> > This should be *after* the below blocks, because otherwise > >> > compressed_bpp will be overridden by the normal case, not by the > >> > force case! > >> > > >> > BR, > >> > Jani. > >> > > >> >> if (intel_dp_is_edp(intel_dp)) { > >> >> pipe_config->dsc.compressed_bpp = > >> >> min_t(u16, > >> drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, > >> > >> -- > >> Jani Nikula, Intel Open Source Graphics Center > > -- > Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2021-07-20 8:45 UTC | newest] Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-07-20 6:49 [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP Vandita Kulkarni 2021-07-20 6:49 ` [Intel-gfx] [v7 1/3] drm/i915/display: Add write permissions for fec support Vandita Kulkarni 2021-07-20 6:49 ` [Intel-gfx] [v7 2/3] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable Vandita Kulkarni 2021-07-20 6:49 ` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP Vandita Kulkarni 2021-07-20 7:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable setting custom DSC BPP Patchwork 2021-07-20 7:10 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork 2021-07-20 7:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-07-20 7:53 ` [Intel-gfx] [v7 0/3] " Kulkarni, Vandita 2021-07-20 8:45 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2021-07-19 9:50 [Intel-gfx] [v7 0/3] Set BPP in the kernel Vandita Kulkarni 2021-07-19 9:50 ` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP Vandita Kulkarni 2021-07-08 10:25 [Intel-gfx] [v7 0/3] Set BPP in the kernel Vandita Kulkarni 2021-07-08 10:25 ` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP Vandita Kulkarni 2021-07-08 13:09 ` Jani Nikula 2021-07-08 13:13 ` Jani Nikula 2021-07-08 13:24 ` Kulkarni, Vandita 2021-07-08 16:23 ` Jani Nikula 2021-07-08 16:40 ` Kulkarni, Vandita
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