From: Xingyu Wu <xingyu.wu@starfivetech.com> To: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>, "Michael Turquette" <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Philipp Zabel <p.zabel@pengutronix.de>, Emil Renner Berthing <kernel@esmil.dk> Cc: Rob Herring <robh+dt@kernel.org>, Conor Dooley <conor@kernel.org>, "Paul Walmsley" <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, Xingyu Wu <xingyu.wu@starfivetech.com>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org> Subject: [PATCH v1 10/11] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Date: Fri, 20 Jan 2023 10:44:44 +0800 [thread overview] Message-ID: <20230120024445.244345-11-xingyu.wu@starfivetech.com> (raw) In-Reply-To: <20230120024445.244345-1-xingyu.wu@starfivetech.com> Add DVP and HDMI TX pixel external fixed clocks and the rates are 74.25MHz and 297MHz. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> --- .../dts/starfive/jh7110-starfive-visionfive-2.dtsi | 8 ++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 10 ++++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index c60280b89c73..e1d66709207a 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -82,6 +82,14 @@ &mclk_ext { clock-frequency = <12288000>; }; +&dvp_clk { + clock-frequency = <74250000>; +}; + +&hdmitx0_pixelclk { + clock-frequency = <297000000>; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index d0d95ef7aa1a..ab0822ce2095 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -233,6 +233,16 @@ mclk_ext: mclk_ext { #clock-cells = <0>; }; + dvp_clk: dvp_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + + hdmitx0_pixelclk: hdmitx0_pixelclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&plic>; -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Xingyu Wu <xingyu.wu@starfivetech.com> To: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>, "Michael Turquette" <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Philipp Zabel <p.zabel@pengutronix.de>, Emil Renner Berthing <kernel@esmil.dk> Cc: Rob Herring <robh+dt@kernel.org>, Conor Dooley <conor@kernel.org>, "Paul Walmsley" <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Hal Feng <hal.feng@starfivetech.com>, Xingyu Wu <xingyu.wu@starfivetech.com>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org> Subject: [PATCH v1 10/11] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Date: Fri, 20 Jan 2023 10:44:44 +0800 [thread overview] Message-ID: <20230120024445.244345-11-xingyu.wu@starfivetech.com> (raw) In-Reply-To: <20230120024445.244345-1-xingyu.wu@starfivetech.com> Add DVP and HDMI TX pixel external fixed clocks and the rates are 74.25MHz and 297MHz. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> --- .../dts/starfive/jh7110-starfive-visionfive-2.dtsi | 8 ++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 10 ++++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index c60280b89c73..e1d66709207a 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -82,6 +82,14 @@ &mclk_ext { clock-frequency = <12288000>; }; +&dvp_clk { + clock-frequency = <74250000>; +}; + +&hdmitx0_pixelclk { + clock-frequency = <297000000>; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index d0d95ef7aa1a..ab0822ce2095 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -233,6 +233,16 @@ mclk_ext: mclk_ext { #clock-cells = <0>; }; + dvp_clk: dvp_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + + hdmitx0_pixelclk: hdmitx0_pixelclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&plic>; -- 2.25.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-01-20 2:45 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-20 2:44 [PATCH v1 00/11] Add new partial clock and reset drivers for StarFive JH7110 Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 8:11 ` Krzysztof Kozlowski 2023-01-20 8:11 ` Krzysztof Kozlowski 2023-01-30 6:17 ` Xingyu Wu 2023-01-30 6:17 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 02/11] reset: starfive: jh7110: Add StarFive System-Top-Group reset support Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 03/11] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-26 2:33 ` Stephen Boyd 2023-01-26 2:33 ` Stephen Boyd 2023-01-30 8:02 ` Xingyu Wu 2023-01-30 8:02 ` Xingyu Wu 2023-01-31 0:35 ` Stephen Boyd 2023-01-31 0:35 ` Stephen Boyd 2023-01-31 6:51 ` Xingyu Wu 2023-01-31 6:51 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 04/11] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 8:12 ` Krzysztof Kozlowski 2023-01-20 8:12 ` Krzysztof Kozlowski 2023-01-30 8:03 ` Xingyu Wu 2023-01-30 8:03 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 05/11] reset: starfive: jh7110: Add StarFive Image-Signal-Process reset support Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 06/11] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-26 2:35 ` Stephen Boyd 2023-01-26 2:35 ` Stephen Boyd 2023-01-30 8:09 ` Xingyu Wu 2023-01-30 8:09 ` Xingyu Wu 2023-01-31 0:38 ` Stephen Boyd 2023-01-31 0:38 ` Stephen Boyd 2023-01-31 6:52 ` Xingyu Wu 2023-01-31 6:52 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 07/11] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 8:13 ` Krzysztof Kozlowski 2023-01-20 8:13 ` Krzysztof Kozlowski 2023-01-30 8:10 ` Xingyu Wu 2023-01-30 8:10 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 08/11] reset: starfive: jh7110: Add StarFive Video-Output reset support Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 09/11] clk: starfive: Add StarFive JH7110 Video-Output clock driver Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu [this message] 2023-01-20 2:44 ` [PATCH v1 10/11] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Xingyu Wu 2023-01-20 2:44 ` [PATCH v1 11/11] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Xingyu Wu 2023-01-20 2:44 ` Xingyu Wu
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20230120024445.244345-11-xingyu.wu@starfivetech.com \ --to=xingyu.wu@starfivetech.com \ --cc=aou@eecs.berkeley.edu \ --cc=conor@kernel.org \ --cc=devicetree@vger.kernel.org \ --cc=hal.feng@starfivetech.com \ --cc=kernel@esmil.dk \ --cc=krzysztof.kozlowski+dt@linaro.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-riscv@lists.infradead.org \ --cc=mturquette@baylibre.com \ --cc=p.zabel@pengutronix.de \ --cc=palmer@dabbelt.com \ --cc=paul.walmsley@sifive.com \ --cc=robh+dt@kernel.org \ --cc=sboyd@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.