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From: "Tian, Kevin" <kevin.tian@intel.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>,
	Xen-devel <xen-devel@lists.xen.org>
Cc: "Wei Liu" <wei.liu2@citrix.com>,
	"Nakajima, Jun" <jun.nakajima@intel.com>,
	"Jan Beulich" <JBeulich@suse.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [PATCH v2 1/6] x86/vmx: Fix handing of MSR_DEBUGCTL on VMExit
Date: Tue, 5 Jun 2018 07:54:01 +0000	[thread overview]
Message-ID: <AADFC41AFE54684AB9EE6CBC0274A5D1911F3F33@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <1527701684-4083-1-git-send-email-andrew.cooper3@citrix.com>

> From: Andrew Cooper [mailto:andrew.cooper3@citrix.com]
> Sent: Thursday, May 31, 2018 1:35 AM
> 
> Currently, whenever the guest writes a nonzero value to MSR_DEBUGCTL,
> Xen
> updates a host MSR load list entry with the current hardware value of
> MSR_DEBUGCTL.
> 
> On VMExit, hardware automatically resets MSR_DEBUGCTL to 0.  Later,
> when the
> guest writes to MSR_DEBUGCTL, the current value in hardware (0) is fed
> back
> into guest load list.  As a practical result, `ler` debugging gets lost on any
> PCPU which has ever scheduled an HVM vcpu, and the common case when
> `ler`
> debugging isn't active, guest actions result in an unnecessary load list entry
> repeating the MSR_DEBUGCTL reset.
> 
> Restoration of Xen's debugging setting needs to happen from the very first
> vmexit.  Due to the automatic reset, Xen need take no action in the general
> case, and only needs to load a value when debugging is active.
> 
> This could be fixed by using a host MSR load list entry set up during
> construct_vmcs().  However, a more efficient option is to use an alternative
> block in the VMExit path, keyed on whether hypervisor debugging has been
> enabled.
> 
> In order to set this up, drop the per cpu ler_msr variable (as there is no
> point having it per cpu when it will be the same everywhere), and use a
> single
> read_mostly variable instead.  Split calc_ler_msr() out of percpu_traps_init()
> for clarity.
> 
> Finally, clean up do_debug().  Reinstate LBR early to help catch cascade
> errors, which allows for the removal of the out label.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

nice cleanup. 

Reviewed-by: Kevin Tian <kevin.tian@intel.com>
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  parent reply	other threads:[~2018-06-05  7:54 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-28 14:27 [PATCH 0/6] x86/vmx: Misc fixes and improvements Andrew Cooper
2018-05-28 14:27 ` [PATCH 1/6] x86/vmx: Fix handing of MSR_DEBUGCTL on VMExit Andrew Cooper
2018-05-29 10:33   ` Jan Beulich
2018-05-29 18:08     ` Andrew Cooper
2018-05-30  7:32       ` Jan Beulich
2018-05-30 10:28         ` Andrew Cooper
2018-05-30 10:49           ` Jan Beulich
2018-05-30 17:34   ` [PATCH v2 " Andrew Cooper
2018-06-01  9:28     ` Jan Beulich
2018-06-05  7:54     ` Tian, Kevin [this message]
2018-05-28 14:27 ` [PATCH 2/6] x86: Improvements to ler debugging Andrew Cooper
2018-05-29 11:39   ` Jan Beulich
2018-05-29 18:09     ` Andrew Cooper
2018-06-05  7:55   ` Tian, Kevin
2018-05-28 14:27 ` [PATCH 3/6] x86/pat: Simplify host PAT handling Andrew Cooper
2018-05-29 11:40   ` Jan Beulich
2018-06-06  9:39   ` Roger Pau Monné
2018-05-28 14:27 ` [PATCH 4/6] x86/vmx: Simplify PAT handling during vcpu construction Andrew Cooper
2018-05-29 11:41   ` Jan Beulich
2018-06-05  7:57   ` Tian, Kevin
2018-06-06  9:42   ` Roger Pau Monné
2018-05-28 14:27 ` [PATCH 5/6] x86/vmx: Defer vmx_vmcs_exit() as long as possible in construct_vmcs() Andrew Cooper
2018-05-29 11:43   ` Jan Beulich
2018-06-05  8:00   ` Tian, Kevin
2018-06-06  9:45   ` Roger Pau Monné
2018-06-06 10:11     ` Andrew Cooper
2018-05-28 14:27 ` [PATCH 6/6] x86/vmx: Drop VMX signal for full real-mode Andrew Cooper
2018-06-05  8:01   ` Tian, Kevin
2018-06-06 10:03   ` Roger Pau Monné

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