From: Rob Herring <robh@kernel.org> To: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Cc: "Andreas Färber" <afaerber@suse.de>, "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>, "Linus Walleij" <linus.walleij@linaro.org>, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" <linux-arm-kernel@lists.infradead.org>, "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>, devicetree@vger.kernel.org, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, linux-actions@lists.infradead.org Subject: Re: [PATCH 1/3] dt-bindings: pinctrl: Add bindings for Actions S500 SoC Date: Thu, 16 Jul 2020 08:50:36 -0600 [thread overview] Message-ID: <CAL_Jsq+8bX5duv=116e=hve1L-h8a=5quqCHVtSAs4PjK6xc1w@mail.gmail.com> (raw) In-Reply-To: <20200716104316.GA309338@BV030612LT> On Thu, Jul 16, 2020 at 4:43 AM Cristian Ciocaltea <cristian.ciocaltea@gmail.com> wrote: > > On Wed, Jul 15, 2020 at 02:03:09PM -0600, Rob Herring wrote: > > On Thu, Jun 25, 2020 at 11:16:18PM +0300, Cristian Ciocaltea wrote: > > > Add pinctrl and gpio bindings for Actions Semi S500 SoC. > > > > > > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> > > > --- > > > .../pinctrl/actions,s500-pinctrl.yaml | 228 ++++++++++++++++++ > > > 1 file changed, 228 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml > > > new file mode 100644 > > > index 000000000000..856947c70844 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml > > > @@ -0,0 +1,228 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/pinctrl/actions,s500-pinctrl.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Actions Semi S500 SoC pinmux & GPIO controller > > > + > > > +maintainers: > > > + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > > + > > > +description: | > > > + Pinmux & GPIO controller manages pin multiplexing & configuration including > > > + GPIO function selection & GPIO attributes configuration. Please refer to > > > + pinctrl-bindings.txt in this directory for common binding part and usage. > > > + > > > +properties: > > > + compatible: > > > + const: actions,s500-pinctrl > > > + > > > + reg: > > > + minItems: 1 > > > + maxItems: 4 > > > > Need to enumerate what each register range is. > > Hi Rob, > > Thanks for the review! > > Would the update below suffice? > > reg: > description: | > Specifies the memory region(s) associated with the pin-controller. > To improve granularity, up to four register ranges can be provided: What does 'improve granularity' mean: > * GPIO Output + GPIO Input + GPIO Data > * Multiplexing Control > * PAD Pull Control + PAD Schmitt Trigger enable + PAD Control > * PAD Drive Capacity Select The h/w sometimes has these and sometimes doesn't? If they do stay, then you want: items: - description: GPIO Output + GPIO Input + GPIO Data - description: ... > > > > + > > > + clocks: > > > + maxItems: 1 > > > + > > > + gpio-controller: true > > > + > > > + gpio-ranges: > > > + maxItems: 1 > > > + > > > + '#gpio-cells': > > > + description: > > > + Specifies the pin number and flags, as defined in > > > + include/dt-bindings/gpio/gpio.h > > > + const: 2 > > > + > > > + interrupt-controller: true > > > + > > > + '#interrupt-cells': > > > + description: > > > + Specifies the pin number and flags, as defined in > > > + include/dt-bindings/interrupt-controller/irq.h > > > + const: 2 > > > + > > > + interrupts: > > > + description: > > > + One interrupt per each of the 5 GPIO ports supported by the controller, > > > + sorted by port number ascending order. > > > + minItems: 5 > > > + maxItems: 5 > > > + > > > +patternProperties: > > > + '^.*$': > > > + if: > > > + type: object > > > > For a new binding, can you do '-pins$' for the node names so we don't > > need this if/then hack. > > Right, the idea was to be consistent with the existing bindings for > S700 and S900, which allow free node names, although they are not yet > converted to yaml format. If we want consistency, those should have their node names updated. > > > > + then: > > > + patternProperties: > > > + 'pinmux$': > > > > Is this really a pattern? Can't tell from the example. > > pinmux and pinconf subnodes may appear multiple times, that's why I > decided to match their names based on the suffix. > > The example is not complex enough, I will change it to the following: > > mmc0_default: mmc0_default { > pinmux { > groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp", > "sd0_cmd_mfp", "sd0_clk_mfp"; > function = "sd0"; > }; > > drv_pinconf { drv-pinconf Make the pattern '-?pinconf' to enforce that. (that '-' may need escaping?)
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org> To: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Cc: devicetree@vger.kernel.org, "Linus Walleij" <linus.walleij@linaro.org>, linux-actions@lists.infradead.org, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>, "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>, "Andreas Färber" <afaerber@suse.de>, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH 1/3] dt-bindings: pinctrl: Add bindings for Actions S500 SoC Date: Thu, 16 Jul 2020 08:50:36 -0600 [thread overview] Message-ID: <CAL_Jsq+8bX5duv=116e=hve1L-h8a=5quqCHVtSAs4PjK6xc1w@mail.gmail.com> (raw) In-Reply-To: <20200716104316.GA309338@BV030612LT> On Thu, Jul 16, 2020 at 4:43 AM Cristian Ciocaltea <cristian.ciocaltea@gmail.com> wrote: > > On Wed, Jul 15, 2020 at 02:03:09PM -0600, Rob Herring wrote: > > On Thu, Jun 25, 2020 at 11:16:18PM +0300, Cristian Ciocaltea wrote: > > > Add pinctrl and gpio bindings for Actions Semi S500 SoC. > > > > > > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> > > > --- > > > .../pinctrl/actions,s500-pinctrl.yaml | 228 ++++++++++++++++++ > > > 1 file changed, 228 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml > > > new file mode 100644 > > > index 000000000000..856947c70844 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml > > > @@ -0,0 +1,228 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/pinctrl/actions,s500-pinctrl.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Actions Semi S500 SoC pinmux & GPIO controller > > > + > > > +maintainers: > > > + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > > + > > > +description: | > > > + Pinmux & GPIO controller manages pin multiplexing & configuration including > > > + GPIO function selection & GPIO attributes configuration. Please refer to > > > + pinctrl-bindings.txt in this directory for common binding part and usage. > > > + > > > +properties: > > > + compatible: > > > + const: actions,s500-pinctrl > > > + > > > + reg: > > > + minItems: 1 > > > + maxItems: 4 > > > > Need to enumerate what each register range is. > > Hi Rob, > > Thanks for the review! > > Would the update below suffice? > > reg: > description: | > Specifies the memory region(s) associated with the pin-controller. > To improve granularity, up to four register ranges can be provided: What does 'improve granularity' mean: > * GPIO Output + GPIO Input + GPIO Data > * Multiplexing Control > * PAD Pull Control + PAD Schmitt Trigger enable + PAD Control > * PAD Drive Capacity Select The h/w sometimes has these and sometimes doesn't? If they do stay, then you want: items: - description: GPIO Output + GPIO Input + GPIO Data - description: ... > > > > + > > > + clocks: > > > + maxItems: 1 > > > + > > > + gpio-controller: true > > > + > > > + gpio-ranges: > > > + maxItems: 1 > > > + > > > + '#gpio-cells': > > > + description: > > > + Specifies the pin number and flags, as defined in > > > + include/dt-bindings/gpio/gpio.h > > > + const: 2 > > > + > > > + interrupt-controller: true > > > + > > > + '#interrupt-cells': > > > + description: > > > + Specifies the pin number and flags, as defined in > > > + include/dt-bindings/interrupt-controller/irq.h > > > + const: 2 > > > + > > > + interrupts: > > > + description: > > > + One interrupt per each of the 5 GPIO ports supported by the controller, > > > + sorted by port number ascending order. > > > + minItems: 5 > > > + maxItems: 5 > > > + > > > +patternProperties: > > > + '^.*$': > > > + if: > > > + type: object > > > > For a new binding, can you do '-pins$' for the node names so we don't > > need this if/then hack. > > Right, the idea was to be consistent with the existing bindings for > S700 and S900, which allow free node names, although they are not yet > converted to yaml format. If we want consistency, those should have their node names updated. > > > > + then: > > > + patternProperties: > > > + 'pinmux$': > > > > Is this really a pattern? Can't tell from the example. > > pinmux and pinconf subnodes may appear multiple times, that's why I > decided to match their names based on the suffix. > > The example is not complex enough, I will change it to the following: > > mmc0_default: mmc0_default { > pinmux { > groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp", > "sd0_cmd_mfp", "sd0_clk_mfp"; > function = "sd0"; > }; > > drv_pinconf { drv-pinconf Make the pattern '-?pinconf' to enforce that. (that '-' may need escaping?) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-07-16 14:50 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-06-25 20:16 [PATCH 0/3] Add Actions Semi S500 pinctrl support Cristian Ciocaltea 2020-06-25 20:16 ` Cristian Ciocaltea 2020-06-25 20:16 ` [PATCH 1/3] dt-bindings: pinctrl: Add bindings for Actions S500 SoC Cristian Ciocaltea 2020-06-25 20:16 ` Cristian Ciocaltea 2020-06-26 7:20 ` Manivannan Sadhasivam 2020-06-26 7:20 ` Manivannan Sadhasivam 2020-06-26 13:06 ` Cristian Ciocaltea 2020-06-26 13:06 ` Cristian Ciocaltea 2020-08-01 14:46 ` Manivannan Sadhasivam 2020-08-01 14:46 ` Manivannan Sadhasivam 2020-08-02 9:35 ` Cristian Ciocaltea 2020-08-02 9:35 ` Cristian Ciocaltea 2020-07-15 20:03 ` Rob Herring 2020-07-15 20:03 ` Rob Herring 2020-07-16 10:43 ` Cristian Ciocaltea 2020-07-16 10:43 ` Cristian Ciocaltea 2020-07-16 14:50 ` Rob Herring [this message] 2020-07-16 14:50 ` Rob Herring 2020-07-16 21:26 ` Cristian Ciocaltea 2020-07-16 21:26 ` Cristian Ciocaltea 2020-06-25 20:16 ` [PATCH 2/3] pinctrl: actions: Add Actions S500 pinctrl driver Cristian Ciocaltea 2020-06-25 20:16 ` Cristian Ciocaltea 2020-06-26 14:29 ` Manivannan Sadhasivam 2020-06-26 14:29 ` Manivannan Sadhasivam 2020-06-26 17:11 ` Cristian Ciocaltea 2020-06-26 17:11 ` Cristian Ciocaltea 2020-08-02 15:18 ` Manivannan Sadhasivam 2020-08-02 15:18 ` Manivannan Sadhasivam 2020-08-03 14:32 ` Cristian Ciocaltea 2020-08-03 14:32 ` Cristian Ciocaltea 2020-06-25 20:16 ` [PATCH 3/3] MAINTAINERS: Add pinctrl binding entry for Actions Semi S500 Cristian Ciocaltea 2020-06-25 20:16 ` Cristian Ciocaltea 2020-06-26 7:27 ` Manivannan Sadhasivam 2020-06-26 7:27 ` Manivannan Sadhasivam 2020-06-26 16:25 ` Cristian Ciocaltea 2020-06-26 16:25 ` Cristian Ciocaltea
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to='CAL_Jsq+8bX5duv=116e=hve1L-h8a=5quqCHVtSAs4PjK6xc1w@mail.gmail.com' \ --to=robh@kernel.org \ --cc=afaerber@suse.de \ --cc=cristian.ciocaltea@gmail.com \ --cc=devicetree@vger.kernel.org \ --cc=linus.walleij@linaro.org \ --cc=linux-actions@lists.infradead.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-gpio@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=manivannan.sadhasivam@linaro.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.