All of lore.kernel.org
 help / color / mirror / Atom feed
From: Geetha Akula <geethasowjanya.akula-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	catalin.marinas-5wv7dgnIgG8@public.gmane.org,
	Linu Cherian
	<linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>,
	Geetha Sowjanya
	<geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>,
	jcm-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
	Geetha sowjanya
	<gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>,
	Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
	sudeep.holla-5wv7dgnIgG8@public.gmane.org,
	Sunil Goutham <sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>,
	Robert Richter
	<robert.richter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
Subject: Re: [PATCH v3 6/7] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126
Date: Mon, 8 May 2017 17:32:34 +0530	[thread overview]
Message-ID: <CANHdaiaw4sB+bMY8LcyQGXbnAfKNk5zX6_893M0gqKrVNmeFuQ@mail.gmail.com> (raw)
In-Reply-To: <a2618ab6-6609-7885-3b62-c1c1f170c318-5wv7dgnIgG8@public.gmane.org>

On Mon, May 8, 2017 at 4:51 PM, Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> wrote:
> On 05/05/17 13:08, Geetha sowjanya wrote:
>> From: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
>>
>> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq
>> lines for gerror, eventq and cmdq-sync.
>>
>> This patch addresses the issue by checking if any interrupt sources are
>> using same irq number, then they are registered as shared irqs.
>>
>> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
>> ---
>>  drivers/iommu/arm-smmu-v3.c | 32 ++++++++++++++++++++++++++++----
>>  1 file changed, 28 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
>> index 016b702..46428e7 100644
>> --- a/drivers/iommu/arm-smmu-v3.c
>> +++ b/drivers/iommu/arm-smmu-v3.c
>> @@ -2236,10 +2236,30 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu)
>>       devm_add_action(dev, arm_smmu_free_msis, dev);
>>  }
>>
>> +static int get_irq_flags(struct arm_smmu_device *smmu, int irq)
>> +{
>> +     int match_count = 0;
>> +
>> +     if (irq == smmu->evtq.q.irq)
>> +             match_count++;
>> +     if (irq == smmu->cmdq.q.irq)
>> +             match_count++;
>> +     if (irq == smmu->gerr_irq)
>> +             match_count++;
>> +     if (irq == smmu->priq.q.irq)
>> +             match_count++;
>> +
>> +     if (match_count > 1)
>> +             return IRQF_SHARED | IRQF_ONESHOT;
>> +
>> +     return 0;
>
> I'd say just have this return IRQF_ONESHOT in the non-shared case...
>
>> +}
>> +
>>  static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>  {
>>       int ret, irq;
>>       u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN;
>> +     u32 irqflags = 0;
>>
>>       /* Disable IRQs first */
>>       ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL,
>> @@ -2254,9 +2274,10 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>       /* Request interrupt lines */
>>       irq = smmu->evtq.q.irq;
>>       if (irq) {
>> +             irqflags = get_irq_flags(smmu, irq);
>>               ret = devm_request_threaded_irq(smmu->dev, irq, NULL,
>>                                               arm_smmu_evtq_thread,
>> -                                             IRQF_ONESHOT,
>> +                                             IRQF_ONESHOT | irqflags,
>
> ...and pass get_irq_flags(smmu, irq) directly as the argument here.
>
> The local variable and intermediate logic only seem to add unnecessary
> complexity, given that the two cases we actually end up with are:
>
> IRQF_ONESHOT | 0
>
> vs.
>
> IRQF_ONESHOT | IRQF_SHARED | IRQF_ONESHOT
>
> neither of which looks particularly sensible.
>
> Robin.
>
I will resubmit the patch with suggested changes.

Thank you,
Geetha.



>>                                               "arm-smmu-v3-evtq", smmu);
>>               if (ret < 0)
>>                       dev_warn(smmu->dev, "failed to enable evtq irq\n");
>> @@ -2264,8 +2285,9 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>
>>       irq = smmu->cmdq.q.irq;
>>       if (irq) {
>> +             irqflags = get_irq_flags(smmu, irq);
>>               ret = devm_request_irq(smmu->dev, irq,
>> -                                    arm_smmu_cmdq_sync_handler, 0,
>> +                                    arm_smmu_cmdq_sync_handler, irqflags,
>>                                      "arm-smmu-v3-cmdq-sync", smmu);
>>               if (ret < 0)
>>                       dev_warn(smmu->dev, "failed to enable cmdq-sync irq\n");
>> @@ -2273,8 +2295,9 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>
>>       irq = smmu->gerr_irq;
>>       if (irq) {
>> +             irqflags = get_irq_flags(smmu, irq);
>>               ret = devm_request_irq(smmu->dev, irq, arm_smmu_gerror_handler,
>> -                                    0, "arm-smmu-v3-gerror", smmu);
>> +                                    irqflags, "arm-smmu-v3-gerror", smmu);
>>               if (ret < 0)
>>                       dev_warn(smmu->dev, "failed to enable gerror irq\n");
>>       }
>> @@ -2282,9 +2305,10 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>       if (smmu->features & ARM_SMMU_FEAT_PRI) {
>>               irq = smmu->priq.q.irq;
>>               if (irq) {
>> +                     irqflags = get_irq_flags(smmu, irq);
>>                       ret = devm_request_threaded_irq(smmu->dev, irq, NULL,
>>                                                       arm_smmu_priq_thread,
>> -                                                     IRQF_ONESHOT,
>> +                                                     IRQF_ONESHOT | irqflags,
>>                                                       "arm-smmu-v3-priq",
>>                                                       smmu);
>>                       if (ret < 0)
>>
>

WARNING: multiple messages have this Message-ID (diff)
From: Geetha Akula <geethasowjanya.akula@gmail.com>
To: Robin Murphy <robin.murphy@arm.com>
Cc: Geetha sowjanya <gakula@caviumnetworks.com>,
	Will Deacon <will.deacon@arm.com>,
	lorenzo.pieralisi@arm.com, Hanjun Guo <hanjun.guo@linaro.org>,
	sudeep.holla@arm.com, iommu@lists.linux-foundation.org,
	jcm@redhat.com, linux-kernel@vger.kernel.org,
	Robert Richter <robert.richter@cavium.com>,
	catalin.marinas@arm.com, Sunil Goutham <sgoutham@cavium.com>,
	linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
	Linu Cherian <linu.cherian@cavium.com>,
	Geetha Sowjanya <geethasowjanya.akula@cavium.com>
Subject: Re: [PATCH v3 6/7] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126
Date: Mon, 8 May 2017 17:32:34 +0530	[thread overview]
Message-ID: <CANHdaiaw4sB+bMY8LcyQGXbnAfKNk5zX6_893M0gqKrVNmeFuQ@mail.gmail.com> (raw)
In-Reply-To: <a2618ab6-6609-7885-3b62-c1c1f170c318@arm.com>

On Mon, May 8, 2017 at 4:51 PM, Robin Murphy <robin.murphy@arm.com> wrote:
> On 05/05/17 13:08, Geetha sowjanya wrote:
>> From: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
>>
>> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq
>> lines for gerror, eventq and cmdq-sync.
>>
>> This patch addresses the issue by checking if any interrupt sources are
>> using same irq number, then they are registered as shared irqs.
>>
>> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
>> ---
>>  drivers/iommu/arm-smmu-v3.c | 32 ++++++++++++++++++++++++++++----
>>  1 file changed, 28 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
>> index 016b702..46428e7 100644
>> --- a/drivers/iommu/arm-smmu-v3.c
>> +++ b/drivers/iommu/arm-smmu-v3.c
>> @@ -2236,10 +2236,30 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu)
>>       devm_add_action(dev, arm_smmu_free_msis, dev);
>>  }
>>
>> +static int get_irq_flags(struct arm_smmu_device *smmu, int irq)
>> +{
>> +     int match_count = 0;
>> +
>> +     if (irq == smmu->evtq.q.irq)
>> +             match_count++;
>> +     if (irq == smmu->cmdq.q.irq)
>> +             match_count++;
>> +     if (irq == smmu->gerr_irq)
>> +             match_count++;
>> +     if (irq == smmu->priq.q.irq)
>> +             match_count++;
>> +
>> +     if (match_count > 1)
>> +             return IRQF_SHARED | IRQF_ONESHOT;
>> +
>> +     return 0;
>
> I'd say just have this return IRQF_ONESHOT in the non-shared case...
>
>> +}
>> +
>>  static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>  {
>>       int ret, irq;
>>       u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN;
>> +     u32 irqflags = 0;
>>
>>       /* Disable IRQs first */
>>       ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL,
>> @@ -2254,9 +2274,10 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>       /* Request interrupt lines */
>>       irq = smmu->evtq.q.irq;
>>       if (irq) {
>> +             irqflags = get_irq_flags(smmu, irq);
>>               ret = devm_request_threaded_irq(smmu->dev, irq, NULL,
>>                                               arm_smmu_evtq_thread,
>> -                                             IRQF_ONESHOT,
>> +                                             IRQF_ONESHOT | irqflags,
>
> ...and pass get_irq_flags(smmu, irq) directly as the argument here.
>
> The local variable and intermediate logic only seem to add unnecessary
> complexity, given that the two cases we actually end up with are:
>
> IRQF_ONESHOT | 0
>
> vs.
>
> IRQF_ONESHOT | IRQF_SHARED | IRQF_ONESHOT
>
> neither of which looks particularly sensible.
>
> Robin.
>
I will resubmit the patch with suggested changes.

Thank you,
Geetha.



>>                                               "arm-smmu-v3-evtq", smmu);
>>               if (ret < 0)
>>                       dev_warn(smmu->dev, "failed to enable evtq irq\n");
>> @@ -2264,8 +2285,9 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>
>>       irq = smmu->cmdq.q.irq;
>>       if (irq) {
>> +             irqflags = get_irq_flags(smmu, irq);
>>               ret = devm_request_irq(smmu->dev, irq,
>> -                                    arm_smmu_cmdq_sync_handler, 0,
>> +                                    arm_smmu_cmdq_sync_handler, irqflags,
>>                                      "arm-smmu-v3-cmdq-sync", smmu);
>>               if (ret < 0)
>>                       dev_warn(smmu->dev, "failed to enable cmdq-sync irq\n");
>> @@ -2273,8 +2295,9 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>
>>       irq = smmu->gerr_irq;
>>       if (irq) {
>> +             irqflags = get_irq_flags(smmu, irq);
>>               ret = devm_request_irq(smmu->dev, irq, arm_smmu_gerror_handler,
>> -                                    0, "arm-smmu-v3-gerror", smmu);
>> +                                    irqflags, "arm-smmu-v3-gerror", smmu);
>>               if (ret < 0)
>>                       dev_warn(smmu->dev, "failed to enable gerror irq\n");
>>       }
>> @@ -2282,9 +2305,10 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>       if (smmu->features & ARM_SMMU_FEAT_PRI) {
>>               irq = smmu->priq.q.irq;
>>               if (irq) {
>> +                     irqflags = get_irq_flags(smmu, irq);
>>                       ret = devm_request_threaded_irq(smmu->dev, irq, NULL,
>>                                                       arm_smmu_priq_thread,
>> -                                                     IRQF_ONESHOT,
>> +                                                     IRQF_ONESHOT | irqflags,
>>                                                       "arm-smmu-v3-priq",
>>                                                       smmu);
>>                       if (ret < 0)
>>
>

WARNING: multiple messages have this Message-ID (diff)
From: geethasowjanya.akula@gmail.com (Geetha Akula)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 6/7] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126
Date: Mon, 8 May 2017 17:32:34 +0530	[thread overview]
Message-ID: <CANHdaiaw4sB+bMY8LcyQGXbnAfKNk5zX6_893M0gqKrVNmeFuQ@mail.gmail.com> (raw)
In-Reply-To: <a2618ab6-6609-7885-3b62-c1c1f170c318@arm.com>

On Mon, May 8, 2017 at 4:51 PM, Robin Murphy <robin.murphy@arm.com> wrote:
> On 05/05/17 13:08, Geetha sowjanya wrote:
>> From: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
>>
>> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq
>> lines for gerror, eventq and cmdq-sync.
>>
>> This patch addresses the issue by checking if any interrupt sources are
>> using same irq number, then they are registered as shared irqs.
>>
>> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
>> ---
>>  drivers/iommu/arm-smmu-v3.c | 32 ++++++++++++++++++++++++++++----
>>  1 file changed, 28 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
>> index 016b702..46428e7 100644
>> --- a/drivers/iommu/arm-smmu-v3.c
>> +++ b/drivers/iommu/arm-smmu-v3.c
>> @@ -2236,10 +2236,30 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu)
>>       devm_add_action(dev, arm_smmu_free_msis, dev);
>>  }
>>
>> +static int get_irq_flags(struct arm_smmu_device *smmu, int irq)
>> +{
>> +     int match_count = 0;
>> +
>> +     if (irq == smmu->evtq.q.irq)
>> +             match_count++;
>> +     if (irq == smmu->cmdq.q.irq)
>> +             match_count++;
>> +     if (irq == smmu->gerr_irq)
>> +             match_count++;
>> +     if (irq == smmu->priq.q.irq)
>> +             match_count++;
>> +
>> +     if (match_count > 1)
>> +             return IRQF_SHARED | IRQF_ONESHOT;
>> +
>> +     return 0;
>
> I'd say just have this return IRQF_ONESHOT in the non-shared case...
>
>> +}
>> +
>>  static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>  {
>>       int ret, irq;
>>       u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN;
>> +     u32 irqflags = 0;
>>
>>       /* Disable IRQs first */
>>       ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL,
>> @@ -2254,9 +2274,10 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>       /* Request interrupt lines */
>>       irq = smmu->evtq.q.irq;
>>       if (irq) {
>> +             irqflags = get_irq_flags(smmu, irq);
>>               ret = devm_request_threaded_irq(smmu->dev, irq, NULL,
>>                                               arm_smmu_evtq_thread,
>> -                                             IRQF_ONESHOT,
>> +                                             IRQF_ONESHOT | irqflags,
>
> ...and pass get_irq_flags(smmu, irq) directly as the argument here.
>
> The local variable and intermediate logic only seem to add unnecessary
> complexity, given that the two cases we actually end up with are:
>
> IRQF_ONESHOT | 0
>
> vs.
>
> IRQF_ONESHOT | IRQF_SHARED | IRQF_ONESHOT
>
> neither of which looks particularly sensible.
>
> Robin.
>
I will resubmit the patch with suggested changes.

Thank you,
Geetha.



>>                                               "arm-smmu-v3-evtq", smmu);
>>               if (ret < 0)
>>                       dev_warn(smmu->dev, "failed to enable evtq irq\n");
>> @@ -2264,8 +2285,9 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>
>>       irq = smmu->cmdq.q.irq;
>>       if (irq) {
>> +             irqflags = get_irq_flags(smmu, irq);
>>               ret = devm_request_irq(smmu->dev, irq,
>> -                                    arm_smmu_cmdq_sync_handler, 0,
>> +                                    arm_smmu_cmdq_sync_handler, irqflags,
>>                                      "arm-smmu-v3-cmdq-sync", smmu);
>>               if (ret < 0)
>>                       dev_warn(smmu->dev, "failed to enable cmdq-sync irq\n");
>> @@ -2273,8 +2295,9 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>
>>       irq = smmu->gerr_irq;
>>       if (irq) {
>> +             irqflags = get_irq_flags(smmu, irq);
>>               ret = devm_request_irq(smmu->dev, irq, arm_smmu_gerror_handler,
>> -                                    0, "arm-smmu-v3-gerror", smmu);
>> +                                    irqflags, "arm-smmu-v3-gerror", smmu);
>>               if (ret < 0)
>>                       dev_warn(smmu->dev, "failed to enable gerror irq\n");
>>       }
>> @@ -2282,9 +2305,10 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
>>       if (smmu->features & ARM_SMMU_FEAT_PRI) {
>>               irq = smmu->priq.q.irq;
>>               if (irq) {
>> +                     irqflags = get_irq_flags(smmu, irq);
>>                       ret = devm_request_threaded_irq(smmu->dev, irq, NULL,
>>                                                       arm_smmu_priq_thread,
>> -                                                     IRQF_ONESHOT,
>> +                                                     IRQF_ONESHOT | irqflags,
>>                                                       "arm-smmu-v3-priq",
>>                                                       smmu);
>>                       if (ret < 0)
>>
>

  parent reply	other threads:[~2017-05-08 12:02 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-05 12:08 [PATCH v3 0/7] Cavium ThunderX2 SMMUv3 errata workarounds Geetha sowjanya
2017-05-05 12:08 ` Geetha sowjanya
2017-05-05 12:08 ` [PATCH v3 1/7] iommu/arm-smmu-v3: Introduce SMMU option PAGE0_REGS_ONLY for ThunderX2 errata #74 Geetha sowjanya
2017-05-05 12:08   ` Geetha sowjanya
2017-05-05 22:26   ` Robert Richter
2017-05-05 22:26     ` Robert Richter
2017-05-05 23:03   ` Robert Richter
2017-05-05 23:03     ` Robert Richter
2017-05-08  9:17     ` Linu Cherian
2017-05-08  9:17       ` Linu Cherian
2017-05-08  9:29       ` Robert Richter
2017-05-08  9:29         ` Robert Richter
2017-05-08  9:59       ` Robin Murphy
2017-05-08  9:59         ` Robin Murphy
     [not found]         ` <b4881237-aca6-63ca-467e-30e36b1f02df-5wv7dgnIgG8@public.gmane.org>
2017-05-08 10:04           ` Robert Richter
2017-05-08 10:04             ` Robert Richter
2017-05-08 10:04             ` Robert Richter
     [not found] ` <1493986091-30521-1-git-send-email-gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2017-05-05 12:08   ` [PATCH v3 2/7] iommu/arm-smmu-v3: Do resource size checks based on SMMU Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
2017-05-05 22:18     ` Robert Richter
2017-05-05 22:18       ` Robert Richter
     [not found]       ` <20170505221844.GW16981-vWBEXY7mpu582hYKe6nXyg@public.gmane.org>
2017-05-08  9:44         ` Linu Cherian
2017-05-08  9:44           ` Linu Cherian
2017-05-08  9:44           ` Linu Cherian
2017-05-08 10:09           ` Robert Richter
2017-05-08 10:09             ` Robert Richter
2017-05-08 10:50             ` Linu Cherian
2017-05-08 10:50               ` Linu Cherian
2017-05-08 12:21               ` Robert Richter
2017-05-08 12:21                 ` Robert Richter
2017-05-08 11:03             ` Geetha Akula
2017-05-08 11:03               ` Geetha Akula
2017-05-05 12:08   ` [PATCH v3 3/7] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model definition Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
     [not found]     ` <1493986091-30521-4-git-send-email-gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2017-05-05 13:53       ` Hanjun Guo
2017-05-05 13:53         ` Hanjun Guo
2017-05-05 13:53         ` Hanjun Guo
2017-05-05 14:56         ` David Daney
2017-05-05 14:56           ` David Daney
2017-05-05 14:58           ` Will Deacon
2017-05-05 14:58             ` Will Deacon
     [not found]             ` <20170505145800.GG14111-5wv7dgnIgG8@public.gmane.org>
2017-05-05 15:33               ` Jon Masters
2017-05-05 15:33                 ` Jon Masters
2017-05-05 15:33                 ` Jon Masters
2017-05-05 12:08   ` [PATCH v3 4/7] iommu/arm-smmu-v3: For ACPI based device probing, set PAGE0_REGS_ONLY option for ThunderX2 SMMUv3 implementation Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
2017-05-05 12:08   ` [PATCH v3 5/7] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
2017-05-05 22:19     ` Robert Richter
2017-05-05 22:19       ` Robert Richter
2017-05-05 12:08   ` [PATCH v3 6/7] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126 Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
     [not found]     ` <1493986091-30521-7-git-send-email-gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2017-05-08 11:21       ` Robin Murphy
2017-05-08 11:21         ` Robin Murphy
2017-05-08 11:21         ` Robin Murphy
     [not found]         ` <a2618ab6-6609-7885-3b62-c1c1f170c318-5wv7dgnIgG8@public.gmane.org>
2017-05-08 12:02           ` Geetha Akula [this message]
2017-05-08 12:02             ` Geetha Akula
2017-05-08 12:02             ` Geetha Akula
2017-05-05 12:08   ` [PATCH v3 7/7] arm64: Documentation: Add Cavium ThunderX2 SMMUv3 erratas Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
2017-05-05 12:08     ` Geetha sowjanya
2017-05-05 22:22 ` [PATCH v3 0/7] Cavium ThunderX2 SMMUv3 errata workarounds Robert Richter
2017-05-05 22:22   ` Robert Richter
2017-05-08 15:15   ` Linu Cherian
2017-05-08 15:15     ` Linu Cherian
2017-05-09 16:07     ` Robert Richter
2017-05-09 16:07       ` Robert Richter

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CANHdaiaw4sB+bMY8LcyQGXbnAfKNk5zX6_893M0gqKrVNmeFuQ@mail.gmail.com \
    --to=geethasowjanya.akula-re5jqeeqqe8avxtiumwx3w@public.gmane.org \
    --cc=catalin.marinas-5wv7dgnIgG8@public.gmane.org \
    --cc=gakula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org \
    --cc=geethasowjanya.akula-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org \
    --cc=iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org \
    --cc=jcm-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org \
    --cc=linu.cherian-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org \
    --cc=linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=robert.richter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org \
    --cc=robin.murphy-5wv7dgnIgG8@public.gmane.org \
    --cc=sgoutham-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org \
    --cc=sudeep.holla-5wv7dgnIgG8@public.gmane.org \
    --cc=will.deacon-5wv7dgnIgG8@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.