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From: Alexander Graf <agraf@suse.de>
To: Mihai Caraman <mihai.caraman@freescale.com>
Cc: <kvm-ppc@vger.kernel.org>, <kvm@vger.kernel.org>,
	<linuxppc-dev@lists.ozlabs.org>, <qemu-ppc@nongnu.org>
Subject: Re: [Qemu-ppc] [RFC PATCH 15/17] KVM: PPC64: bookehv: Add support for interrupt handling
Date: Wed, 4 Jul 2012 17:13:36 +0200	[thread overview]
Message-ID: <FB7DFF5C-5E14-4202-9180-7968294F6A56@suse.de> (raw)
In-Reply-To: <1340627195-11544-16-git-send-email-mihai.caraman@freescale.com>


On 25.06.2012, at 14:26, Mihai Caraman wrote:

> Add bookehv interrupt handling support for 64-bit hosts. Change common stack
> layout to refer PPC_LR_STKOFF kernel constant. Dispatch the 64-bit execution
> flow to the existing kvm_handler_common asm macro. Update input register
> values documentation.
> Only the bolted version of TLB miss exception handlers is supported now.
> 
> Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
> ---
> arch/powerpc/include/asm/kvm_booke_hv_asm.h |   12 +++-
> arch/powerpc/kvm/bookehv_interrupts.S       |  120 +++++++++++++++++++++++++--
> 2 files changed, 122 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/kvm_booke_hv_asm.h b/arch/powerpc/include/asm/kvm_booke_hv_asm.h
> index 30a600f..8be6f87 100644
> --- a/arch/powerpc/include/asm/kvm_booke_hv_asm.h
> +++ b/arch/powerpc/include/asm/kvm_booke_hv_asm.h
> @@ -1,5 +1,5 @@
> /*
> - * Copyright 2010-2011 Freescale Semiconductor, Inc.
> + * Copyright 2010-2012 Freescale Semiconductor, Inc.
>  *
>  * This program is free software; you can redistribute it and/or modify
>  * it under the terms of the GNU General Public License, version 2, as
> @@ -17,6 +17,7 @@
>  * there are no exceptions for which we fall through directly to
>  * the normal host handler.
>  *
> + * 32-bit host
>  * Expected inputs (normal exceptions):
>  *   SCRATCH0 = saved r10
>  *   r10 = thread struct
> @@ -33,6 +34,15 @@
>  *   *(r8 + GPR9) = saved r9
>  *   *(r8 + GPR10) = saved r10 (r10 not yet clobbered)
>  *   *(r8 + GPR11) = saved r11
> + *
> + * 64-bit host
> + * Expected inputs (exception types GEN/DBG/CRIT/MC):
> + *  r13 = PACA_POINTER
> + *  r10 = saved CR
> + *  SPRN_SPRG_##type##_SCRATCH = saved r13
> + *  *(r13 + PACA_EX##type + EX_R10) = saved r10
> + *  *(r13 + PACA_EX##type + EX_R11) = saved r11
> + * Only the bolted version of TLB miss exception handlers is supported now.
>  */
> .macro DO_KVM intno srr1
> #ifdef CONFIG_KVM_BOOKE_HV
> diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
> index dff8ed4..04097de 100644
> --- a/arch/powerpc/kvm/bookehv_interrupts.S
> +++ b/arch/powerpc/kvm/bookehv_interrupts.S
> @@ -12,10 +12,11 @@
>  * along with this program; if not, write to the Free Software
>  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
>  *
> - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
> + * Copyright (C) 2010-2012 Freescale Semiconductor, Inc.
>  *
>  * Author: Varun Sethi <varun.sethi@freescale.com>
>  * Author: Scott Wood <scotwood@freescale.com>
> + * Author: Mihai Caraman <mihai.caraman@freescale.com>
>  *
>  * This file is derived from arch/powerpc/kvm/booke_interrupts.S
>  */
> @@ -30,7 +31,11 @@
> #include <asm/bitsperlong.h>
> #include <asm/thread_info.h>
> 
> +#ifdef CONFIG_64BIT
> +#include <asm/exception-64e.h>
> +#else
> #include "../kernel/head_booke.h" /* for THREAD_NORMSAVE() */
> +#endif
> 
> #define LONGBYTES		(BITS_PER_LONG / 8)
> 
> @@ -38,20 +43,21 @@
> #define VCPU_GUEST_SPRG(n)	(VCPU_GUEST_SPRGS + (n * LONGBYTES))
> 
> /* The host stack layout: */
> -#define HOST_R1         (0 * LONGBYTES) /* Implied by stwu. */
> -#define HOST_CALLEE_LR  (1 * LONGBYTES)
> -#define HOST_RUN        (2 * LONGBYTES) /* struct kvm_run */
> +#define HOST_R1         0 /* Implied by stwu. */
> +#define HOST_CALLEE_LR  PPC_LR_STKOFF
> +#define HOST_RUN        (HOST_CALLEE_LR + LONGBYTES)
> /*
>  * r2 is special: it holds 'current', and it made nonvolatile in the
>  * kernel with the -ffixed-r2 gcc option.
>  */
> -#define HOST_R2         (3 * LONGBYTES)
> -#define HOST_CR         (4 * LONGBYTES)
> -#define HOST_NV_GPRS    (5 * LONGBYTES)
> +#define HOST_R2         (HOST_RUN + LONGBYTES)
> +#define HOST_CR         (HOST_R2 + LONGBYTES)
> +#define HOST_NV_GPRS    (HOST_CR + LONGBYTES)
> #define HOST_NV_GPR(n)  (HOST_NV_GPRS + ((n - 14) * LONGBYTES))
> #define HOST_MIN_STACK_SIZE (HOST_NV_GPR(31) + LONGBYTES)
> #define HOST_STACK_SIZE ((HOST_MIN_STACK_SIZE + 15) & ~15) /* Align. */
> -#define HOST_STACK_LR   (HOST_STACK_SIZE + LONGBYTES) /* In caller stack frame. */
> +/* LR in caller stack frame. */
> +#define HOST_STACK_LR	(HOST_STACK_SIZE + PPC_LR_STKOFF)
> 
> #define NEED_EMU		0x00000001 /* emulation -- save nv regs */
> #define NEED_DEAR		0x00000002 /* save faulting DEAR */
> @@ -202,6 +208,102 @@
> 	b	kvmppc_resume_host
> .endm
> 
> +#ifdef CONFIG_64BIT
> +/*
> + * For input register values, see arch/powerpc/include/asm/kvm_booke_hv_asm.h
> + */
> +.macro kvm_handler intno scratch, paca_ex, ex_r10, ex_r11, srr0, srr1, flags
> + _GLOBAL(kvmppc_handler_\intno\()_\srr1)

Is this code so vastly different from the 32bit variant that they can't be the same with a few simple ifdef's here and there?


Alex

WARNING: multiple messages have this Message-ID (diff)
From: Alexander Graf <agraf@suse.de>
To: Mihai Caraman <mihai.caraman@freescale.com>
Cc: qemu-ppc@nongnu.org, linuxppc-dev@lists.ozlabs.org,
	kvm@vger.kernel.org, kvm-ppc@vger.kernel.org
Subject: Re: [Qemu-ppc] [RFC PATCH 15/17] KVM: PPC64: bookehv: Add support for interrupt handling
Date: Wed, 4 Jul 2012 17:13:36 +0200	[thread overview]
Message-ID: <FB7DFF5C-5E14-4202-9180-7968294F6A56@suse.de> (raw)
In-Reply-To: <1340627195-11544-16-git-send-email-mihai.caraman@freescale.com>


On 25.06.2012, at 14:26, Mihai Caraman wrote:

> Add bookehv interrupt handling support for 64-bit hosts. Change common =
stack
> layout to refer PPC_LR_STKOFF kernel constant. Dispatch the 64-bit =
execution
> flow to the existing kvm_handler_common asm macro. Update input =
register
> values documentation.
> Only the bolted version of TLB miss exception handlers is supported =
now.
>=20
> Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
> ---
> arch/powerpc/include/asm/kvm_booke_hv_asm.h |   12 +++-
> arch/powerpc/kvm/bookehv_interrupts.S       |  120 =
+++++++++++++++++++++++++--
> 2 files changed, 122 insertions(+), 10 deletions(-)
>=20
> diff --git a/arch/powerpc/include/asm/kvm_booke_hv_asm.h =
b/arch/powerpc/include/asm/kvm_booke_hv_asm.h
> index 30a600f..8be6f87 100644
> --- a/arch/powerpc/include/asm/kvm_booke_hv_asm.h
> +++ b/arch/powerpc/include/asm/kvm_booke_hv_asm.h
> @@ -1,5 +1,5 @@
> /*
> - * Copyright 2010-2011 Freescale Semiconductor, Inc.
> + * Copyright 2010-2012 Freescale Semiconductor, Inc.
>  *
>  * This program is free software; you can redistribute it and/or =
modify
>  * it under the terms of the GNU General Public License, version 2, as
> @@ -17,6 +17,7 @@
>  * there are no exceptions for which we fall through directly to
>  * the normal host handler.
>  *
> + * 32-bit host
>  * Expected inputs (normal exceptions):
>  *   SCRATCH0 =3D saved r10
>  *   r10 =3D thread struct
> @@ -33,6 +34,15 @@
>  *   *(r8 + GPR9) =3D saved r9
>  *   *(r8 + GPR10) =3D saved r10 (r10 not yet clobbered)
>  *   *(r8 + GPR11) =3D saved r11
> + *
> + * 64-bit host
> + * Expected inputs (exception types GEN/DBG/CRIT/MC):
> + *  r13 =3D PACA_POINTER
> + *  r10 =3D saved CR
> + *  SPRN_SPRG_##type##_SCRATCH =3D saved r13
> + *  *(r13 + PACA_EX##type + EX_R10) =3D saved r10
> + *  *(r13 + PACA_EX##type + EX_R11) =3D saved r11
> + * Only the bolted version of TLB miss exception handlers is =
supported now.
>  */
> .macro DO_KVM intno srr1
> #ifdef CONFIG_KVM_BOOKE_HV
> diff --git a/arch/powerpc/kvm/bookehv_interrupts.S =
b/arch/powerpc/kvm/bookehv_interrupts.S
> index dff8ed4..04097de 100644
> --- a/arch/powerpc/kvm/bookehv_interrupts.S
> +++ b/arch/powerpc/kvm/bookehv_interrupts.S
> @@ -12,10 +12,11 @@
>  * along with this program; if not, write to the Free Software
>  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  =
02110-1301, USA.
>  *
> - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
> + * Copyright (C) 2010-2012 Freescale Semiconductor, Inc.
>  *
>  * Author: Varun Sethi <varun.sethi@freescale.com>
>  * Author: Scott Wood <scotwood@freescale.com>
> + * Author: Mihai Caraman <mihai.caraman@freescale.com>
>  *
>  * This file is derived from arch/powerpc/kvm/booke_interrupts.S
>  */
> @@ -30,7 +31,11 @@
> #include <asm/bitsperlong.h>
> #include <asm/thread_info.h>
>=20
> +#ifdef CONFIG_64BIT
> +#include <asm/exception-64e.h>
> +#else
> #include "../kernel/head_booke.h" /* for THREAD_NORMSAVE() */
> +#endif
>=20
> #define LONGBYTES		(BITS_PER_LONG / 8)
>=20
> @@ -38,20 +43,21 @@
> #define VCPU_GUEST_SPRG(n)	(VCPU_GUEST_SPRGS + (n * LONGBYTES))
>=20
> /* The host stack layout: */
> -#define HOST_R1         (0 * LONGBYTES) /* Implied by stwu. */
> -#define HOST_CALLEE_LR  (1 * LONGBYTES)
> -#define HOST_RUN        (2 * LONGBYTES) /* struct kvm_run */
> +#define HOST_R1         0 /* Implied by stwu. */
> +#define HOST_CALLEE_LR  PPC_LR_STKOFF
> +#define HOST_RUN        (HOST_CALLEE_LR + LONGBYTES)
> /*
>  * r2 is special: it holds 'current', and it made nonvolatile in the
>  * kernel with the -ffixed-r2 gcc option.
>  */
> -#define HOST_R2         (3 * LONGBYTES)
> -#define HOST_CR         (4 * LONGBYTES)
> -#define HOST_NV_GPRS    (5 * LONGBYTES)
> +#define HOST_R2         (HOST_RUN + LONGBYTES)
> +#define HOST_CR         (HOST_R2 + LONGBYTES)
> +#define HOST_NV_GPRS    (HOST_CR + LONGBYTES)
> #define HOST_NV_GPR(n)  (HOST_NV_GPRS + ((n - 14) * LONGBYTES))
> #define HOST_MIN_STACK_SIZE (HOST_NV_GPR(31) + LONGBYTES)
> #define HOST_STACK_SIZE ((HOST_MIN_STACK_SIZE + 15) & ~15) /* Align. =
*/
> -#define HOST_STACK_LR   (HOST_STACK_SIZE + LONGBYTES) /* In caller =
stack frame. */
> +/* LR in caller stack frame. */
> +#define HOST_STACK_LR	(HOST_STACK_SIZE + PPC_LR_STKOFF)
>=20
> #define NEED_EMU		0x00000001 /* emulation -- save nv regs =
*/
> #define NEED_DEAR		0x00000002 /* save faulting DEAR */
> @@ -202,6 +208,102 @@
> 	b	kvmppc_resume_host
> .endm
>=20
> +#ifdef CONFIG_64BIT
> +/*
> + * For input register values, see =
arch/powerpc/include/asm/kvm_booke_hv_asm.h
> + */
> +.macro kvm_handler intno scratch, paca_ex, ex_r10, ex_r11, srr0, =
srr1, flags
> + _GLOBAL(kvmppc_handler_\intno\()_\srr1)

Is this code so vastly different from the 32bit variant that they can't =
be the same with a few simple ifdef's here and there?


Alex

WARNING: multiple messages have this Message-ID (diff)
From: Alexander Graf <agraf@suse.de>
To: Mihai Caraman <mihai.caraman@freescale.com>
Cc: kvm-ppc@vger.kernel.org, kvm@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, qemu-ppc@nongnu.org
Subject: Re: [Qemu-ppc] [RFC PATCH 15/17] KVM: PPC64: bookehv: Add support for interrupt handling
Date: Wed, 04 Jul 2012 15:13:36 +0000	[thread overview]
Message-ID: <FB7DFF5C-5E14-4202-9180-7968294F6A56@suse.de> (raw)
In-Reply-To: <1340627195-11544-16-git-send-email-mihai.caraman@freescale.com>


On 25.06.2012, at 14:26, Mihai Caraman wrote:

> Add bookehv interrupt handling support for 64-bit hosts. Change common stack
> layout to refer PPC_LR_STKOFF kernel constant. Dispatch the 64-bit execution
> flow to the existing kvm_handler_common asm macro. Update input register
> values documentation.
> Only the bolted version of TLB miss exception handlers is supported now.
> 
> Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
> ---
> arch/powerpc/include/asm/kvm_booke_hv_asm.h |   12 +++-
> arch/powerpc/kvm/bookehv_interrupts.S       |  120 +++++++++++++++++++++++++--
> 2 files changed, 122 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/kvm_booke_hv_asm.h b/arch/powerpc/include/asm/kvm_booke_hv_asm.h
> index 30a600f..8be6f87 100644
> --- a/arch/powerpc/include/asm/kvm_booke_hv_asm.h
> +++ b/arch/powerpc/include/asm/kvm_booke_hv_asm.h
> @@ -1,5 +1,5 @@
> /*
> - * Copyright 2010-2011 Freescale Semiconductor, Inc.
> + * Copyright 2010-2012 Freescale Semiconductor, Inc.
>  *
>  * This program is free software; you can redistribute it and/or modify
>  * it under the terms of the GNU General Public License, version 2, as
> @@ -17,6 +17,7 @@
>  * there are no exceptions for which we fall through directly to
>  * the normal host handler.
>  *
> + * 32-bit host
>  * Expected inputs (normal exceptions):
>  *   SCRATCH0 = saved r10
>  *   r10 = thread struct
> @@ -33,6 +34,15 @@
>  *   *(r8 + GPR9) = saved r9
>  *   *(r8 + GPR10) = saved r10 (r10 not yet clobbered)
>  *   *(r8 + GPR11) = saved r11
> + *
> + * 64-bit host
> + * Expected inputs (exception types GEN/DBG/CRIT/MC):
> + *  r13 = PACA_POINTER
> + *  r10 = saved CR
> + *  SPRN_SPRG_##type##_SCRATCH = saved r13
> + *  *(r13 + PACA_EX##type + EX_R10) = saved r10
> + *  *(r13 + PACA_EX##type + EX_R11) = saved r11
> + * Only the bolted version of TLB miss exception handlers is supported now.
>  */
> .macro DO_KVM intno srr1
> #ifdef CONFIG_KVM_BOOKE_HV
> diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
> index dff8ed4..04097de 100644
> --- a/arch/powerpc/kvm/bookehv_interrupts.S
> +++ b/arch/powerpc/kvm/bookehv_interrupts.S
> @@ -12,10 +12,11 @@
>  * along with this program; if not, write to the Free Software
>  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
>  *
> - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
> + * Copyright (C) 2010-2012 Freescale Semiconductor, Inc.
>  *
>  * Author: Varun Sethi <varun.sethi@freescale.com>
>  * Author: Scott Wood <scotwood@freescale.com>
> + * Author: Mihai Caraman <mihai.caraman@freescale.com>
>  *
>  * This file is derived from arch/powerpc/kvm/booke_interrupts.S
>  */
> @@ -30,7 +31,11 @@
> #include <asm/bitsperlong.h>
> #include <asm/thread_info.h>
> 
> +#ifdef CONFIG_64BIT
> +#include <asm/exception-64e.h>
> +#else
> #include "../kernel/head_booke.h" /* for THREAD_NORMSAVE() */
> +#endif
> 
> #define LONGBYTES		(BITS_PER_LONG / 8)
> 
> @@ -38,20 +43,21 @@
> #define VCPU_GUEST_SPRG(n)	(VCPU_GUEST_SPRGS + (n * LONGBYTES))
> 
> /* The host stack layout: */
> -#define HOST_R1         (0 * LONGBYTES) /* Implied by stwu. */
> -#define HOST_CALLEE_LR  (1 * LONGBYTES)
> -#define HOST_RUN        (2 * LONGBYTES) /* struct kvm_run */
> +#define HOST_R1         0 /* Implied by stwu. */
> +#define HOST_CALLEE_LR  PPC_LR_STKOFF
> +#define HOST_RUN        (HOST_CALLEE_LR + LONGBYTES)
> /*
>  * r2 is special: it holds 'current', and it made nonvolatile in the
>  * kernel with the -ffixed-r2 gcc option.
>  */
> -#define HOST_R2         (3 * LONGBYTES)
> -#define HOST_CR         (4 * LONGBYTES)
> -#define HOST_NV_GPRS    (5 * LONGBYTES)
> +#define HOST_R2         (HOST_RUN + LONGBYTES)
> +#define HOST_CR         (HOST_R2 + LONGBYTES)
> +#define HOST_NV_GPRS    (HOST_CR + LONGBYTES)
> #define HOST_NV_GPR(n)  (HOST_NV_GPRS + ((n - 14) * LONGBYTES))
> #define HOST_MIN_STACK_SIZE (HOST_NV_GPR(31) + LONGBYTES)
> #define HOST_STACK_SIZE ((HOST_MIN_STACK_SIZE + 15) & ~15) /* Align. */
> -#define HOST_STACK_LR   (HOST_STACK_SIZE + LONGBYTES) /* In caller stack frame. */
> +/* LR in caller stack frame. */
> +#define HOST_STACK_LR	(HOST_STACK_SIZE + PPC_LR_STKOFF)
> 
> #define NEED_EMU		0x00000001 /* emulation -- save nv regs */
> #define NEED_DEAR		0x00000002 /* save faulting DEAR */
> @@ -202,6 +208,102 @@
> 	b	kvmppc_resume_host
> .endm
> 
> +#ifdef CONFIG_64BIT
> +/*
> + * For input register values, see arch/powerpc/include/asm/kvm_booke_hv_asm.h
> + */
> +.macro kvm_handler intno scratch, paca_ex, ex_r10, ex_r11, srr0, srr1, flags
> + _GLOBAL(kvmppc_handler_\intno\()_\srr1)

Is this code so vastly different from the 32bit variant that they can't be the same with a few simple ifdef's here and there?


Alex


  reply	other threads:[~2012-07-04 15:13 UTC|newest]

Thread overview: 203+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-25 12:26 [RFC PATCH 00/17] KVM: PPC: 64-bit Book3E support Mihai Caraman
2012-06-25 12:26 ` Mihai Caraman
2012-06-25 12:26 ` [RFC PATCH 01/17] KVM: PPC64: booke: Set interrupt computation mode for 64-bit host Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-07-04 13:22   ` Alexander Graf
2012-07-04 13:22     ` Alexander Graf
2012-07-04 13:22     ` Alexander Graf
2012-06-25 12:26 ` [RFC PATCH 02/17] KVM: PPC64: booke: Add EPCR support in mtspr/mfspr emulation Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-07-04 13:21   ` Alexander Graf
2012-07-04 13:21     ` Alexander Graf
2012-07-04 13:21     ` Alexander Graf
2012-07-04 14:14     ` Caraman Mihai Claudiu-B02008
2012-07-04 14:14       ` Caraman Mihai Claudiu-B02008
2012-07-04 14:14       ` Caraman Mihai Claudiu-B02008
2012-07-04 14:53       ` Alexander Graf
2012-07-04 14:53         ` Alexander Graf
2012-07-04 14:53         ` Alexander Graf
2012-06-25 12:26 ` [RFC PATCH 03/17] KVM: PPC64: booke: Add EPCR support in sregs Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-06-25 12:59   ` Avi Kivity
2012-06-25 12:59     ` Avi Kivity
2012-06-25 12:59     ` Avi Kivity
2012-06-25 13:24     ` Caraman Mihai Claudiu-B02008
2012-06-25 13:24       ` Caraman Mihai Claudiu-B02008
2012-06-25 13:36       ` Avi Kivity
2012-06-25 13:36         ` Avi Kivity
2012-06-25 13:36         ` Avi Kivity
2012-06-26 22:34   ` Scott Wood
2012-06-26 22:34     ` Scott Wood
2012-06-26 22:34     ` Scott Wood
2012-06-27 11:41     ` Caraman Mihai Claudiu-B02008
2012-06-27 11:41       ` Caraman Mihai Claudiu-B02008
2012-06-27 11:41       ` Caraman Mihai Claudiu-B02008
2012-06-27 15:23       ` Scott Wood
2012-06-27 15:23         ` Scott Wood
2012-07-04 13:33   ` [Qemu-ppc] " Alexander Graf
2012-07-04 13:33     ` Alexander Graf
2012-07-04 13:33     ` Alexander Graf
2012-07-05 11:49     ` Caraman Mihai Claudiu-B02008
2012-07-05 11:49       ` Caraman Mihai Claudiu-B02008
2012-07-05 11:49       ` Caraman Mihai Claudiu-B02008
2012-07-05 12:12       ` Alexander Graf
2012-07-05 12:12         ` Alexander Graf
2012-07-05 12:12         ` Alexander Graf
2012-07-05 12:54         ` Caraman Mihai Claudiu-B02008
2012-07-05 12:54           ` Caraman Mihai Claudiu-B02008
2012-07-05 12:54           ` Caraman Mihai Claudiu-B02008
2012-07-11 18:07           ` Alexander Graf
2012-07-11 18:07             ` Alexander Graf
2012-07-11 18:07             ` Alexander Graf
2012-06-25 12:26 ` [RFC PATCH 04/17] KVM: PPC64: booke: Add guest computation mode for irq delivery Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-07-04 13:40   ` [Qemu-ppc] " Alexander Graf
2012-07-04 13:40     ` Alexander Graf
2012-07-04 13:40     ` Alexander Graf
2012-07-05  9:28     ` Caraman Mihai Claudiu-B02008
2012-07-05  9:28       ` Caraman Mihai Claudiu-B02008
2012-07-05  9:28       ` Caraman Mihai Claudiu-B02008
2012-07-05 23:51     ` Scott Wood
2012-07-05 23:51       ` Scott Wood
2012-07-05 23:51       ` Scott Wood
2012-07-06  7:03       ` Alexander Graf
2012-07-06  7:03         ` Alexander Graf
2012-07-06  7:03         ` Alexander Graf
2012-06-25 12:26 ` [RFC PATCH 05/17] KVM: PPC: booke: Extend MAS2 EPN mask for 64-bit Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-07-04 13:49   ` [Qemu-ppc] " Alexander Graf
2012-07-04 13:49     ` Alexander Graf
2012-07-04 13:49     ` Alexander Graf
2012-07-05 11:14     ` Caraman Mihai Claudiu-B02008
2012-07-05 11:14       ` Caraman Mihai Claudiu-B02008
2012-07-05 11:14       ` Caraman Mihai Claudiu-B02008
2012-10-08 10:10       ` Alexander Graf
2012-10-08 10:10         ` Alexander Graf
2012-10-08 10:10         ` Alexander Graf
2012-10-08 13:06         ` Caraman Mihai Claudiu-B02008
2012-10-08 13:06           ` Caraman Mihai Claudiu-B02008
2012-10-08 13:06           ` Caraman Mihai Claudiu-B02008
2012-10-08 13:10           ` Alexander Graf
2012-10-08 13:10             ` Alexander Graf
2012-10-08 13:10             ` Alexander Graf
2012-06-25 12:26 ` [RFC PATCH 06/17] KVM: PPC: e500: Add emulation helper for getting instruction ea Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-07-04 13:56   ` Alexander Graf
2012-07-04 13:56     ` Alexander Graf
2012-07-04 13:56     ` Alexander Graf
2012-07-05 11:39     ` Caraman Mihai Claudiu-B02008
2012-07-05 11:39       ` Caraman Mihai Claudiu-B02008
2012-07-05 11:39       ` Caraman Mihai Claudiu-B02008
2012-07-11 17:53       ` Alexander Graf
2012-07-11 17:53         ` Alexander Graf
2012-07-11 17:53         ` Alexander Graf
2012-06-25 12:26 ` [RFC PATCH 07/17] KVM: PPC: e500: Mask ea's high 32-bits in 32/64 instr emulation Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-07-04 14:00   ` [Qemu-ppc] " Alexander Graf
2012-07-04 14:00     ` Alexander Graf
2012-07-04 14:00     ` Alexander Graf
2012-07-04 14:05     ` Alexander Graf
2012-07-04 14:05       ` Alexander Graf
2012-07-04 14:05       ` Alexander Graf
2012-06-25 12:26 ` [RFC PATCH 08/17] KVM: PPC: e500mc: Fix tlbilx emulation for 64-bit guests Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-07-06 14:54   ` Alexander Graf
2012-07-06 14:54     ` Alexander Graf
2012-07-06 14:54     ` Alexander Graf
2012-06-25 12:26 ` [RFC PATCH 09/17] KVM: PPC64: booke: Hard disable interrupts when entering guest Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-07-04 14:14   ` [Qemu-ppc] " Alexander Graf
2012-07-04 14:14     ` Alexander Graf
2012-07-04 14:14     ` Alexander Graf
2012-07-04 22:21     ` Benjamin Herrenschmidt
2012-07-04 22:21       ` Benjamin Herrenschmidt
2012-07-06 23:03       ` Caraman Mihai Claudiu-B02008
2012-07-06 23:03         ` Caraman Mihai Claudiu-B02008
2012-07-06 23:03         ` Caraman Mihai Claudiu-B02008
2012-06-25 12:26 ` [RFC PATCH 10/17] PowerPC: booke64: Refactor exception prolog for save/restore regs Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-06-26 22:12   ` Benjamin Herrenschmidt
2012-06-26 22:12     ` Benjamin Herrenschmidt
2012-06-26 22:12     ` Benjamin Herrenschmidt
2012-06-27 11:49     ` Caraman Mihai Claudiu-B02008
2012-06-27 11:49       ` Caraman Mihai Claudiu-B02008
2012-06-27 11:49       ` Caraman Mihai Claudiu-B02008
2012-06-25 12:26 ` [RFC PATCH 11/17] PowerPC: booke64: Fix machine check handler to use the right prolog Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-06-26 22:13   ` Benjamin Herrenschmidt
2012-06-26 22:13     ` Benjamin Herrenschmidt
2012-06-26 22:13     ` Benjamin Herrenschmidt
2012-06-25 12:26 ` [RFC PATCH 12/17] PowerPC: booke64: Add DO_KVM kernel hooks Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-07-04 14:29   ` [Qemu-ppc] " Alexander Graf
2012-07-04 14:29     ` Alexander Graf
2012-07-04 14:29     ` Alexander Graf
2012-07-04 15:27     ` Caraman Mihai Claudiu-B02008
2012-07-04 15:27       ` Caraman Mihai Claudiu-B02008
2012-07-04 15:27       ` Caraman Mihai Claudiu-B02008
2012-07-04 15:45       ` Alexander Graf
2012-07-04 15:45         ` Alexander Graf
2012-07-04 15:45         ` Alexander Graf
2012-07-04 18:15         ` Caraman Mihai Claudiu-B02008
2012-07-04 18:15           ` Caraman Mihai Claudiu-B02008
2012-07-04 18:15           ` Caraman Mihai Claudiu-B02008
2012-07-06  0:19           ` Scott Wood
2012-07-06  0:19             ` Scott Wood
2012-07-06  0:19             ` Scott Wood
2012-07-04 22:25     ` Benjamin Herrenschmidt
2012-07-04 22:25       ` Benjamin Herrenschmidt
2012-07-04 22:25       ` Benjamin Herrenschmidt
2012-07-06 22:33       ` Caraman Mihai Claudiu-B02008
2012-07-06 22:33         ` Caraman Mihai Claudiu-B02008
2012-07-06 22:33         ` Caraman Mihai Claudiu-B02008
2012-07-06 23:11         ` Alexander Graf
2012-07-06 23:11           ` Alexander Graf
2012-07-06 23:11           ` Alexander Graf
2012-07-07  8:39           ` Caraman Mihai Claudiu-B02008
2012-07-07  8:39             ` Caraman Mihai Claudiu-B02008
2012-07-07  8:39             ` Caraman Mihai Claudiu-B02008
2012-07-11 22:25             ` Alexander Graf
2012-07-11 22:25               ` Alexander Graf
2012-07-11 22:25               ` Alexander Graf
2012-07-11 22:28               ` Benjamin Herrenschmidt
2012-07-11 22:28                 ` Benjamin Herrenschmidt
2012-07-11 22:28                 ` Benjamin Herrenschmidt
2012-07-11 22:35                 ` Alexander Graf
2012-07-11 22:35                   ` Alexander Graf
2012-07-11 22:43                   ` Benjamin Herrenschmidt
2012-07-11 22:43                     ` Benjamin Herrenschmidt
2012-07-11 22:43                     ` Benjamin Herrenschmidt
2012-07-11 22:51                     ` Alexander Graf
2012-07-11 22:51                       ` Alexander Graf
2012-07-11 22:51                       ` Alexander Graf
2012-06-25 12:26 ` [RFC PATCH 13/17] PowerPC: booke64: Use SPRG0/3 scratch for bolted TLB miss & crit int Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-06-26 22:16   ` Benjamin Herrenschmidt
2012-06-26 22:16     ` Benjamin Herrenschmidt
2012-06-26 22:16     ` Benjamin Herrenschmidt
2012-07-05 15:51     ` Caraman Mihai Claudiu-B02008
2012-07-05 15:51       ` Caraman Mihai Claudiu-B02008
2012-07-05 15:51       ` Caraman Mihai Claudiu-B02008
2012-06-26 22:24   ` Scott Wood
2012-06-26 22:24     ` Scott Wood
2012-06-26 22:24     ` Scott Wood
2012-06-25 12:26 ` [RFC PATCH 14/17] KVM: PPC32: bookehv: Remove GET_VCPU macro from exception handler Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-06-25 12:26 ` [RFC PATCH 15/17] KVM: PPC64: bookehv: Add support for interrupt handling Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-07-04 15:13   ` Alexander Graf [this message]
2012-07-04 15:13     ` [Qemu-ppc] " Alexander Graf
2012-07-04 15:13     ` Alexander Graf
2012-07-04 15:37     ` Caraman Mihai Claudiu-B02008
2012-07-04 15:37       ` Caraman Mihai Claudiu-B02008
2012-07-04 15:37       ` Caraman Mihai Claudiu-B02008
2012-07-04 15:46       ` Alexander Graf
2012-07-04 15:46         ` Alexander Graf
2012-07-04 15:46         ` Alexander Graf
2012-07-04 18:21         ` Caraman Mihai Claudiu-B02008
2012-07-04 18:21           ` Caraman Mihai Claudiu-B02008
2012-07-04 18:21           ` Caraman Mihai Claudiu-B02008
2012-06-25 12:26 ` [RFC PATCH 16/17] KVM: PPC: e500: Silence bogus GCC warning in tlb code Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman
2012-06-25 12:26 ` [RFC PATCH 17/17] KVM: PPC: booke: Fix get_tb() compile error on 64-bit Mihai Caraman
2012-06-25 12:26   ` Mihai Caraman

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