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From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: Pierre Yves MORDRET <pierre-yves.mordret@st.com>,
	Vinod Koul <vinod.koul@intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Amelie DELAUNAY <amelie.delaunay@st.com>,
	Alexandre TORGUE <alexandre.torgue@st.com>,
	Russell King <linux@armlinux.org.uk>,
	Fabien DESSENNE <fabien.dessenne@st.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	"M'boumba Cedric Madianga" <cedric.madianga@gmail.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Fabrice GASNIER <fabrice.gasnier@st.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	Herbert Xu <herbert@gondor.apana.org.au>
Subject: Re: [PATCH v3 2/5] dmaengine: Add STM32 DMAMUX driver
Date: Mon, 28 Aug 2017 14:48:50 +0300	[thread overview]
Message-ID: <bbfbf048-9d4d-8714-d607-4d02088170d8@ti.com> (raw)
In-Reply-To: <ea66ba14-fe18-cb83-5989-8ae7b3ab50c6@st.com>


Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

On 2017-08-24 16:03, Pierre Yves MORDRET wrote:
> Please tell me whether I'm wrong but for am335x/am437x both DMA Channels and
> events are given by DT. I believe IP Spec provides the mapping for the channel
> (this is what you call fixed channel) and DMA router event is selected randomly
> within the DT.

In our eDMA the channel number and the DMA event number is locked
together. Event 17 can only be serviced by eDMA channel 17. The
am335x/am437x DMA crossbar is implemented on every DMA event lane and by
changing it you can select different event to be routed to the given
event number. The eDMA can handle up to 64 unique DMA events, however
for each of this 64 events we have a crossbar which allows to select
from up to 63 other sources. I can not allocate the eDMA channel in the
crossbar as I can not be sure that I will not step on some other
driver's toe and take a channel (event) which someone want to use with
it's default purpose. So the binding includes the channel number and the
crossbar mapped event ID.

Oh, and this eDMA limitation is the main source of my hassle with the
mem-to-mem channel: in DT we must tell what channels can be used for
memcpy - the ones that are not used on the board (usually we pick i2c
since we don't support DMA with that).

> As for dra7 events comes from DT but channel is selected though out local
> algorithm. IP Spec defines DMA event muxer mapping.

Here it is again a different story. The crossbar in dra7 can handle 256
incoming events and it can map any of these events to the 64 eDMA event
number (or channel) or if it is front of the sDMA we can select the sDMA
event number from the 128 it can handle.

Here we only use the event number in the crossbar node as we will pick
the eDMA event, which is going to be correspond to the eDMA channel.

> At my opinion my router is more closed to dra7. IP Spec defines event mapping.
> Nonetheless the DMA has a fixed allocated mapping. Using DMA alone DT has to
> provide channel number. In router mode this number doesn't matter since router
> makes the routing from fixed event to channel. However router needs to know
> which channel will be assign to event: any random channel is allowed.

In dra7 both eDMA and sDMA have pre-allocated channel mapping. Before my
DMA event router support we had no way to use non default mapped events
(we did had DMA support fro HSMMC and probably other stuff with direct
DMA node).
When I had the DMA router, first I added the node for it, then I have
converted all existing nodes to use the DMA event router node for the
DMA binding. After that I could add the nodes for the peripherals
needing non default mapped DMA requests.
We don't allow direct DMA binding for dra7 class of devices at all,
everything needs to go via the xbars.

I would not bother with mixed use case here, I would just make it
mandatory to go via the router.

Again, with the eDMA I needed to 'mask' out the events/channels which we
want to use for memcpy. Define the memcpy channels in the eDMA node and
mask the same events in the crossbar as well.

> I'm pretty sure I can mimic what has been for DRA7 related to DMA Channel
> allocation however it seems to be this is aside DMA engine. This kind of
> implementation forbid the use of DMA and DMA router at the same time : I
> remember you already raise the point. If a DMA channel is requested DMA router
> is not aware of this allocation. This is the idea of my custom API which relies
> on get_any_slave_channel().

I think you must not allow mixed use for the slave channels. The none
slave (memcpy) is still a pain, but you have managed it somehow in the past.

> Using DT to assign channel seems not a good idea either as I lost router's benefice.
> 
> BTW I need the channel ID within router.

Your use case is pretty close to the dra7 one we have.

> Looking at core or of_dma_router_xlate() I don't really know how to do it a
> generic manner.

You construct the dmaspec for the DMA, which will include the channel
number you have mapped the event to. If the DMA driver needs the channel
number _and_ the event number then both, but based on your description
your DMA engine itself is close to the eDMA of ours than the sDMA.

- Péter

WARNING: multiple messages have this Message-ID (diff)
From: Peter Ujfalusi <peter.ujfalusi-l0cyMroinI0@public.gmane.org>
To: Pierre Yves MORDRET
	<pierre-yves.mordret-qxv4g6HH51o@public.gmane.org>,
	Vinod Koul <vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Amelie DELAUNAY <amelie.delaunay-qxv4g6HH51o@public.gmane.org>,
	Alexandre TORGUE <alexandre.torgue-qxv4g6HH51o@public.gmane.org>,
	Russell King <linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>,
	Fabien DESSENNE <fabien.dessenne-qxv4g6HH51o@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Maxime Coquelin
	<mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	M'boumba Cedric Madianga
	<cedric.madianga-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Dan Williams
	<dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	Fabrice GASNIER <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	Herbert Xu
	<herbert-lOAM2aK0SrRLBo1qDEOMRrpzq4S04n8Q@public.gmane.org>
Subject: Re: [PATCH v3 2/5] dmaengine: Add STM32 DMAMUX driver
Date: Mon, 28 Aug 2017 14:48:50 +0300	[thread overview]
Message-ID: <bbfbf048-9d4d-8714-d607-4d02088170d8@ti.com> (raw)
In-Reply-To: <ea66ba14-fe18-cb83-5989-8ae7b3ab50c6-qxv4g6HH51o@public.gmane.org>


Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

On 2017-08-24 16:03, Pierre Yves MORDRET wrote:
> Please tell me whether I'm wrong but for am335x/am437x both DMA Channels and
> events are given by DT. I believe IP Spec provides the mapping for the channel
> (this is what you call fixed channel) and DMA router event is selected randomly
> within the DT.

In our eDMA the channel number and the DMA event number is locked
together. Event 17 can only be serviced by eDMA channel 17. The
am335x/am437x DMA crossbar is implemented on every DMA event lane and by
changing it you can select different event to be routed to the given
event number. The eDMA can handle up to 64 unique DMA events, however
for each of this 64 events we have a crossbar which allows to select
from up to 63 other sources. I can not allocate the eDMA channel in the
crossbar as I can not be sure that I will not step on some other
driver's toe and take a channel (event) which someone want to use with
it's default purpose. So the binding includes the channel number and the
crossbar mapped event ID.

Oh, and this eDMA limitation is the main source of my hassle with the
mem-to-mem channel: in DT we must tell what channels can be used for
memcpy - the ones that are not used on the board (usually we pick i2c
since we don't support DMA with that).

> As for dra7 events comes from DT but channel is selected though out local
> algorithm. IP Spec defines DMA event muxer mapping.

Here it is again a different story. The crossbar in dra7 can handle 256
incoming events and it can map any of these events to the 64 eDMA event
number (or channel) or if it is front of the sDMA we can select the sDMA
event number from the 128 it can handle.

Here we only use the event number in the crossbar node as we will pick
the eDMA event, which is going to be correspond to the eDMA channel.

> At my opinion my router is more closed to dra7. IP Spec defines event mapping.
> Nonetheless the DMA has a fixed allocated mapping. Using DMA alone DT has to
> provide channel number. In router mode this number doesn't matter since router
> makes the routing from fixed event to channel. However router needs to know
> which channel will be assign to event: any random channel is allowed.

In dra7 both eDMA and sDMA have pre-allocated channel mapping. Before my
DMA event router support we had no way to use non default mapped events
(we did had DMA support fro HSMMC and probably other stuff with direct
DMA node).
When I had the DMA router, first I added the node for it, then I have
converted all existing nodes to use the DMA event router node for the
DMA binding. After that I could add the nodes for the peripherals
needing non default mapped DMA requests.
We don't allow direct DMA binding for dra7 class of devices at all,
everything needs to go via the xbars.

I would not bother with mixed use case here, I would just make it
mandatory to go via the router.

Again, with the eDMA I needed to 'mask' out the events/channels which we
want to use for memcpy. Define the memcpy channels in the eDMA node and
mask the same events in the crossbar as well.

> I'm pretty sure I can mimic what has been for DRA7 related to DMA Channel
> allocation however it seems to be this is aside DMA engine. This kind of
> implementation forbid the use of DMA and DMA router at the same time : I
> remember you already raise the point. If a DMA channel is requested DMA router
> is not aware of this allocation. This is the idea of my custom API which relies
> on get_any_slave_channel().

I think you must not allow mixed use for the slave channels. The none
slave (memcpy) is still a pain, but you have managed it somehow in the past.

> Using DT to assign channel seems not a good idea either as I lost router's benefice.
> 
> BTW I need the channel ID within router.

Your use case is pretty close to the dra7 one we have.

> Looking at core or of_dma_router_xlate() I don't really know how to do it a
> generic manner.

You construct the dmaspec for the DMA, which will include the channel
number you have mapped the event to. If the DMA driver needs the channel
number _and_ the event number then both, but based on your description
your DMA engine itself is close to the eDMA of ours than the sDMA.

- Péter

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WARNING: multiple messages have this Message-ID (diff)
From: peter.ujfalusi@ti.com (Peter Ujfalusi)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 2/5] dmaengine: Add STM32 DMAMUX driver
Date: Mon, 28 Aug 2017 14:48:50 +0300	[thread overview]
Message-ID: <bbfbf048-9d4d-8714-d607-4d02088170d8@ti.com> (raw)
In-Reply-To: <ea66ba14-fe18-cb83-5989-8ae7b3ab50c6@st.com>

?
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

On 2017-08-24 16:03, Pierre Yves MORDRET wrote:
> Please tell me whether I'm wrong but for am335x/am437x both DMA Channels and
> events are given by DT. I believe IP Spec provides the mapping for the channel
> (this is what you call fixed channel) and DMA router event is selected randomly
> within the DT.

In our eDMA the channel number and the DMA event number is locked
together. Event 17 can only be serviced by eDMA channel 17. The
am335x/am437x DMA crossbar is implemented on every DMA event lane and by
changing it you can select different event to be routed to the given
event number. The eDMA can handle up to 64 unique DMA events, however
for each of this 64 events we have a crossbar which allows to select
from up to 63 other sources. I can not allocate the eDMA channel in the
crossbar as I can not be sure that I will not step on some other
driver's toe and take a channel (event) which someone want to use with
it's default purpose. So the binding includes the channel number and the
crossbar mapped event ID.

Oh, and this eDMA limitation is the main source of my hassle with the
mem-to-mem channel: in DT we must tell what channels can be used for
memcpy - the ones that are not used on the board (usually we pick i2c
since we don't support DMA with that).

> As for dra7 events comes from DT but channel is selected though out local
> algorithm. IP Spec defines DMA event muxer mapping.

Here it is again a different story. The crossbar in dra7 can handle 256
incoming events and it can map any of these events to the 64 eDMA event
number (or channel) or if it is front of the sDMA we can select the sDMA
event number from the 128 it can handle.

Here we only use the event number in the crossbar node as we will pick
the eDMA event, which is going to be correspond to the eDMA channel.

> At my opinion my router is more closed to dra7. IP Spec defines event mapping.
> Nonetheless the DMA has a fixed allocated mapping. Using DMA alone DT has to
> provide channel number. In router mode this number doesn't matter since router
> makes the routing from fixed event to channel. However router needs to know
> which channel will be assign to event: any random channel is allowed.

In dra7 both eDMA and sDMA have pre-allocated channel mapping. Before my
DMA event router support we had no way to use non default mapped events
(we did had DMA support fro HSMMC and probably other stuff with direct
DMA node).
When I had the DMA router, first I added the node for it, then I have
converted all existing nodes to use the DMA event router node for the
DMA binding. After that I could add the nodes for the peripherals
needing non default mapped DMA requests.
We don't allow direct DMA binding for dra7 class of devices at all,
everything needs to go via the xbars.

I would not bother with mixed use case here, I would just make it
mandatory to go via the router.

Again, with the eDMA I needed to 'mask' out the events/channels which we
want to use for memcpy. Define the memcpy channels in the eDMA node and
mask the same events in the crossbar as well.

> I'm pretty sure I can mimic what has been for DRA7 related to DMA Channel
> allocation however it seems to be this is aside DMA engine. This kind of
> implementation forbid the use of DMA and DMA router at the same time : I
> remember you already raise the point. If a DMA channel is requested DMA router
> is not aware of this allocation. This is the idea of my custom API which relies
> on get_any_slave_channel().

I think you must not allow mixed use for the slave channels. The none
slave (memcpy) is still a pain, but you have managed it somehow in the past.

> Using DT to assign channel seems not a good idea either as I lost router's benefice.
> 
> BTW I need the channel ID within router.

Your use case is pretty close to the dra7 one we have.

> Looking at core or of_dma_router_xlate() I don't really know how to do it a
> generic manner.

You construct the dmaspec for the DMA, which will include the channel
number you have mapped the event to. If the DMA driver needs the channel
number _and_ the event number then both, but based on your description
your DMA engine itself is close to the eDMA of ours than the sDMA.

- P?ter

  reply	other threads:[~2017-08-28 11:49 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-06 12:20 [PATCH v3 0/5] Add STM32 DMAMUX support Pierre-Yves MORDRET
2017-07-06 12:20 ` Pierre-Yves MORDRET
2017-07-06 12:20 ` Pierre-Yves MORDRET
2017-07-06 12:20 ` [PATCH v3 1/5] dt-bindings: Document the STM32 DMAMUX bindings Pierre-Yves MORDRET
2017-07-06 12:20   ` Pierre-Yves MORDRET
2017-07-06 12:20   ` Pierre-Yves MORDRET
2017-07-10  3:56   ` Rob Herring
2017-07-10  3:56     ` Rob Herring
2017-07-10  3:56     ` Rob Herring
2017-07-06 12:20 ` [PATCH v3 2/5] dmaengine: Add STM32 DMAMUX driver Pierre-Yves MORDRET
2017-07-06 12:20   ` Pierre-Yves MORDRET
2017-07-06 12:20   ` Pierre-Yves MORDRET
2017-07-22  6:51   ` Vinod Koul
2017-07-22  6:51     ` Vinod Koul
2017-07-22  6:51     ` Vinod Koul
2017-07-24 13:55     ` Pierre Yves MORDRET
2017-07-24 13:55       ` Pierre Yves MORDRET
2017-07-24 13:55       ` Pierre Yves MORDRET
2017-07-26  5:29       ` Vinod Koul
2017-07-26  5:29         ` Vinod Koul
2017-07-26  5:29         ` Vinod Koul
2017-07-26  7:38         ` Pierre Yves MORDRET
2017-07-26  7:38           ` Pierre Yves MORDRET
2017-07-26  7:38           ` Pierre Yves MORDRET
2017-07-31 12:31           ` Vinod Koul
2017-07-31 12:31             ` Vinod Koul
2017-07-31 12:31             ` Vinod Koul
2017-08-01  9:32             ` Pierre Yves MORDRET
2017-08-01  9:32               ` Pierre Yves MORDRET
2017-08-01  9:32               ` Pierre Yves MORDRET
2017-08-02  4:55               ` Vinod Koul
2017-08-02  4:55                 ` Vinod Koul
2017-08-02  4:55                 ` Vinod Koul
2017-08-02  9:19                 ` Peter Ujfalusi
2017-08-02  9:19                   ` Peter Ujfalusi
2017-08-02  9:19                   ` Peter Ujfalusi
2017-08-02 13:11                   ` Pierre Yves MORDRET
2017-08-02 13:11                     ` Pierre Yves MORDRET
2017-08-02 13:11                     ` Pierre Yves MORDRET
2017-08-02 14:09                     ` Peter Ujfalusi
2017-08-02 14:09                       ` Peter Ujfalusi
2017-08-02 14:09                       ` Peter Ujfalusi
2017-08-02 14:28                       ` Pierre Yves MORDRET
2017-08-02 14:28                         ` Pierre Yves MORDRET
2017-08-02 14:28                         ` Pierre Yves MORDRET
2017-08-03  6:42                         ` Peter Ujfalusi
2017-08-03  6:42                           ` Peter Ujfalusi
2017-08-03  6:42                           ` Peter Ujfalusi
2017-08-03  9:00                           ` Pierre Yves MORDRET
2017-08-03  9:00                             ` Pierre Yves MORDRET
2017-08-03  9:00                             ` Pierre Yves MORDRET
2017-08-03  9:48                             ` Peter Ujfalusi
2017-08-03  9:48                               ` Peter Ujfalusi
2017-08-03  9:48                               ` Peter Ujfalusi
2017-08-04 12:50                               ` Pierre Yves MORDRET
2017-08-04 12:50                                 ` Pierre Yves MORDRET
2017-08-04 12:50                                 ` Pierre Yves MORDRET
2017-08-04 14:21                                 ` Peter Ujfalusi
2017-08-04 14:21                                   ` Peter Ujfalusi
2017-08-04 14:21                                   ` Peter Ujfalusi
2017-08-21  9:34                                   ` Pierre Yves MORDRET
2017-08-21  9:34                                     ` Pierre Yves MORDRET
2017-08-21  9:34                                     ` Pierre Yves MORDRET
2017-08-24  5:47                                     ` Peter Ujfalusi
2017-08-24  5:47                                       ` Peter Ujfalusi
2017-08-24  5:47                                       ` Peter Ujfalusi
2017-08-24 13:03                                       ` Pierre Yves MORDRET
2017-08-24 13:03                                         ` Pierre Yves MORDRET
2017-08-24 13:03                                         ` Pierre Yves MORDRET
2017-08-28 11:48                                         ` Peter Ujfalusi [this message]
2017-08-28 11:48                                           ` Peter Ujfalusi
2017-08-28 11:48                                           ` Peter Ujfalusi
2017-08-30  8:02                                           ` Pierre Yves MORDRET
2017-08-30  8:02                                             ` Pierre Yves MORDRET
2017-08-30  8:02                                             ` Pierre Yves MORDRET
2017-07-06 12:20 ` [PATCH v3 3/5] dt-bindings: stm32-dma: Add property to handle STM32 DMAMUX Pierre-Yves MORDRET
2017-07-06 12:20   ` Pierre-Yves MORDRET
2017-07-06 12:20   ` Pierre-Yves MORDRET
2017-07-10  3:57   ` Rob Herring
2017-07-10  3:57     ` Rob Herring
2017-07-06 12:20 ` [PATCH v3 4/5] dmaengine: stm32-dma: Add support for " Pierre-Yves MORDRET
2017-07-06 12:20   ` Pierre-Yves MORDRET
2017-07-06 12:20   ` Pierre-Yves MORDRET
2017-07-06 12:20 ` [PATCH v3 5/5] ARM: configs: stm32: Add DMAMUX support in STM32 defconfig Pierre-Yves MORDRET
2017-07-06 12:20   ` Pierre-Yves MORDRET
2017-07-06 12:20   ` Pierre-Yves MORDRET
2017-07-20  9:42 ` [PATCH v3 0/5] Add STM32 DMAMUX support Pierre Yves MORDRET
2017-07-20  9:42   ` Pierre Yves MORDRET
2017-07-20  9:42   ` Pierre Yves MORDRET

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