From: Vinod Koul <vkoul@kernel.org>
To: "Sia, Jee Heng" <jee.heng.sia@intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
"Eugeniy.Paltsev@synopsys.com" <Eugeniy.Paltsev@synopsys.com>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA
Date: Tue, 13 Oct 2020 12:31:18 +0530 [thread overview]
Message-ID: <20201013070118.GN2968@vkoul-mobl> (raw)
In-Reply-To: <BL0PR11MB3362A202A1D3BDC8C1CA41DBDA040@BL0PR11MB3362.namprd11.prod.outlook.com>
On 13-10-20, 05:49, Sia, Jee Heng wrote:
> > >
> > > This patch set is to replace the patch series submitted at:
> > > https://lore.kernel.org/dmaengine/1599213094-30144-1-git-send-email-je
> > > e.heng.sia@intel.com/
> >
> > And it means effectively the bumped version, besides the fact that you double
> > sent this one...
> >
> >
> > Please fix and resend. Note, now is merge window is open. Depends on
> > maintainer's flow it may be good or bad time to resend with properly formed
> > changelog and version of the series.
yeah sorry I wont look at it till merge window closes
> [>>] Thanks. Will resend the patch set with v1 in the header.
Should this be v1, v1 was the first post, this would be v2!
Please use git format-patch -v2 to autogenerate version headers in
patches..
I thought Intel folks had internal review list to take care of these
things, is it no longer used..?
--
~Vinod
next prev parent reply other threads:[~2020-10-13 7:01 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-12 4:21 [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA Sia Jee Heng
2020-10-12 4:21 ` [PATCH 01/15] dt-bindings: dma: Add YAML schemas for dw-axi-dmac Sia Jee Heng
2020-10-12 4:21 ` [PATCH 02/15] dmaengine: dw-axi-dmac: simplify descriptor management Sia Jee Heng
2020-10-12 4:21 ` [PATCH 03/15] dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources() Sia Jee Heng
2020-10-12 4:21 ` [PATCH 04/15] dmaengine: dw-axi-dmac: Add device_synchronize() callback Sia Jee Heng
2020-10-12 4:21 ` [PATCH 05/15] dmaengine: dw-axi-dmac: Add device_config operation Sia Jee Heng
2020-10-12 4:21 ` [PATCH 06/15] dmaengine: dw-axi-dmac: Support device_prep_slave_sg Sia Jee Heng
2020-10-12 4:21 ` [PATCH 07/15] dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic() Sia Jee Heng
2020-10-12 4:21 ` [PATCH 08/15] dmaengine: dw-axi-dmac: Support of_dma_controller_register() Sia Jee Heng
2020-10-12 4:21 ` [PATCH 09/15] dmaengine: dw-axi-dmac: Support burst residue granularity Sia Jee Heng
2020-10-12 4:21 ` [PATCH 10/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support Sia Jee Heng
2020-10-12 4:21 ` [PATCH 11/15] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA Sia Jee Heng
2020-10-12 4:21 ` [PATCH 12/15] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields Sia Jee Heng
2020-10-12 4:21 ` [PATCH 13/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake Sia Jee Heng
2020-10-12 4:21 ` [PATCH 14/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers Sia Jee Heng
2020-10-12 4:22 ` [PATCH 15/15] dmaengine: dw-axi-dmac: Set constraint to the Max segment size Sia Jee Heng
2020-10-12 13:59 ` [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA Andy Shevchenko
2020-10-13 5:49 ` Sia, Jee Heng
2020-10-13 7:01 ` Vinod Koul [this message]
2020-10-13 7:12 ` Sia, Jee Heng
2020-10-13 7:16 ` Vinod Koul
2020-10-16 14:51 ` Eugeniy Paltsev
2020-10-19 1:22 ` Sia, Jee Heng
2020-10-19 11:39 ` andriy.shevchenko
2020-10-21 1:54 ` Sia, Jee Heng
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