From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
To: Sia Jee Heng <jee.heng.sia@intel.com>
Cc: "andriy.shevchenko@linux.intel.com"
<andriy.shevchenko@linux.intel.com>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"vkoul@kernel.org" <vkoul@kernel.org>,
Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Subject: Re: [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA
Date: Fri, 16 Oct 2020 14:51:28 +0000 [thread overview]
Message-ID: <MWHPR12MB18065E87CEE3FD28868EBB9BDE030@MWHPR12MB1806.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20201012042200.29787-1-jee.heng.sia@intel.com>
Hi Sia,
Is this patch series available in some public git repo?
I want to test it on our HW with DW AXI DMAC.
Thanks.
---
Eugeniy Paltsev
________________________________________
From: Sia Jee Heng <jee.heng.sia@intel.com>
Sent: Monday, October 12, 2020 07:21
To: vkoul@kernel.org; Eugeniy Paltsev
Cc: andriy.shevchenko@linux.intel.com; dmaengine@vger.kernel.org; linux-kernel@vger.kernel.org
Subject: [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA
The below patch series are to support AxiDMA running on Intel KeemBay SoC.
The base driver is dw-axi-dmac but code refactoring is needed, for example:
- Support YAML Schemas DT binding.
- Replacing Linked List with virtual descriptor management.
- Remove unrelated hw desc stuff from dma memory pool.
- Manage dma memory pool alloc/destroy based on channel activity.
- Support dmaengine device_sync() callback.
- Support dmaengine device_config().
- Support dmaegnine device_prep_slave_sg().
- Support dmaengine device_prep_dma_cyclic().
- Support of_dma_controller_register().
- Support burst residue granularity.
- Support Intel KeemBay AxiDMA registers.
- Support Intel KeemBay AxiDMA device handshake.
- Support Intel KeemBay AxiDMA BYTE and HALFWORD device operation.
- Add constraint to Max segment size.
This patch set is to replace the patch series submitted at:
https://urldefense.com/v3/__https://lore.kernel.org/dmaengine/1599213094-30144-1-git-send-email-jee.heng.sia@intel.com/__;!!A4F2R9G_pg!Nemc1rSHID2X4d8pr0LNF0nD9Odrn425GRV8MSTPDvPwE6a3iWPeylAJSaxwqXjfPapMO4U$
This patch series are tested on Intel KeemBay platform.
Sia Jee Heng (15):
dt-bindings: dma: Add YAML schemas for dw-axi-dmac
dmaengine: dw-axi-dmac: simplify descriptor management
dmaengine: dw-axi-dmac: move dma_pool_create() to
alloc_chan_resources()
dmaengine: dw-axi-dmac: Add device_synchronize() callback
dmaengine: dw-axi-dmac: Add device_config operation
dmaengine: dw-axi-dmac: Support device_prep_slave_sg
dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic()
dmaengine: dw-axi-dmac: Support of_dma_controller_register()
dmaengine: dw-axi-dmac: Support burst residue granularity
dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support
dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA
dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields
dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake
dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD
registers
dmaengine: dw-axi-dmac: Set constraint to the Max segment size
.../bindings/dma/snps,dw-axi-dmac.txt | 39 -
.../bindings/dma/snps,dw-axi-dmac.yaml | 149 ++++
.../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 696 +++++++++++++++---
drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 33 +-
4 files changed, 783 insertions(+), 134 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
create mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
--
2.18.0
next prev parent reply other threads:[~2020-10-16 14:51 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-12 4:21 [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA Sia Jee Heng
2020-10-12 4:21 ` [PATCH 01/15] dt-bindings: dma: Add YAML schemas for dw-axi-dmac Sia Jee Heng
2020-10-12 4:21 ` [PATCH 02/15] dmaengine: dw-axi-dmac: simplify descriptor management Sia Jee Heng
2020-10-12 4:21 ` [PATCH 03/15] dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources() Sia Jee Heng
2020-10-12 4:21 ` [PATCH 04/15] dmaengine: dw-axi-dmac: Add device_synchronize() callback Sia Jee Heng
2020-10-12 4:21 ` [PATCH 05/15] dmaengine: dw-axi-dmac: Add device_config operation Sia Jee Heng
2020-10-12 4:21 ` [PATCH 06/15] dmaengine: dw-axi-dmac: Support device_prep_slave_sg Sia Jee Heng
2020-10-12 4:21 ` [PATCH 07/15] dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic() Sia Jee Heng
2020-10-12 4:21 ` [PATCH 08/15] dmaengine: dw-axi-dmac: Support of_dma_controller_register() Sia Jee Heng
2020-10-12 4:21 ` [PATCH 09/15] dmaengine: dw-axi-dmac: Support burst residue granularity Sia Jee Heng
2020-10-12 4:21 ` [PATCH 10/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support Sia Jee Heng
2020-10-12 4:21 ` [PATCH 11/15] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA Sia Jee Heng
2020-10-12 4:21 ` [PATCH 12/15] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields Sia Jee Heng
2020-10-12 4:21 ` [PATCH 13/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake Sia Jee Heng
2020-10-12 4:21 ` [PATCH 14/15] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers Sia Jee Heng
2020-10-12 4:22 ` [PATCH 15/15] dmaengine: dw-axi-dmac: Set constraint to the Max segment size Sia Jee Heng
2020-10-12 13:59 ` [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA Andy Shevchenko
2020-10-13 5:49 ` Sia, Jee Heng
2020-10-13 7:01 ` Vinod Koul
2020-10-13 7:12 ` Sia, Jee Heng
2020-10-13 7:16 ` Vinod Koul
2020-10-16 14:51 ` Eugeniy Paltsev [this message]
2020-10-19 1:22 ` Sia, Jee Heng
2020-10-19 11:39 ` andriy.shevchenko
2020-10-21 1:54 ` Sia, Jee Heng
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