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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: "Souza, Jose" <jose.souza@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Auld, Matthew" <matthew.auld@intel.com>,
	"fernando.pacheco@intel.com" <fernando.pacheco@intel.com>
Subject: Re: [Intel-gfx] [PATCH 08/37] drm/i915: make intel_{uncore, de}_rmw() more useful
Date: Thu, 21 May 2020 10:30:58 -0700	[thread overview]
Message-ID: <20200521173058.lsncnnkw343bsofw@ldmartin-desk1> (raw)
In-Reply-To: <7a5b61a80cd1839cf4cbf0891805d620b9bbdc96.camel@intel.com>

On Thu, May 21, 2020 at 10:24:49AM -0700, Jose Souza wrote:
>On Wed, 2020-05-20 at 17:37 -0700, Lucas De Marchi wrote:
>> Return the old value read so some places of the code can still do the
>> rmw but add warnings/errors about the value it read.
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_de.h |  4 ++--
>>  drivers/gpu/drm/i915/intel_uncore.h     | 10 +++++++---
>>  2 files changed, 9 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
>> index 00da10bf35f5..d5441b1ba2fe 100644
>> --- a/drivers/gpu/drm/i915/display/intel_de.h
>> +++ b/drivers/gpu/drm/i915/display/intel_de.h
>> @@ -42,10 +42,10 @@ intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
>>  	intel_uncore_write_fw(&i915->uncore, reg, val);
>>  }
>>
>
>Maybe add function documentation with this new information about the return?

yeah... just not sure about the usefulness since the only place I
intended to use it I ended up doing something different. So I'm still
not sure. Maybe wait a user to appear.

thanks

Lucas De Marchi

>
>With that:
>
>Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
>>
>> -static inline void
>> +static inline u32
>>  intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
>>  {
>> -	intel_uncore_rmw(&i915->uncore, reg, clear, set);
>> +	return intel_uncore_rmw(&i915->uncore, reg, clear, set);
>>  }
>>
>>  static inline int
>> diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
>> index 8d3aa8b9acf9..5da43b56fa11 100644
>> --- a/drivers/gpu/drm/i915/intel_uncore.h
>> +++ b/drivers/gpu/drm/i915/intel_uncore.h
>> @@ -379,8 +379,8 @@ intel_uncore_read64_2x32(struct intel_uncore *uncore,
>>  #define intel_uncore_write64_fw(...) __raw_uncore_write64(__VA_ARGS__)
>>  #define intel_uncore_posting_read_fw(...) ((void)intel_uncore_read_fw(__VA_ARGS__))
>>
>> -static inline void intel_uncore_rmw(struct intel_uncore *uncore,
>> -				    i915_reg_t reg, u32 clear, u32 set)
>> +static inline u32 intel_uncore_rmw(struct intel_uncore *uncore,
>> +				   i915_reg_t reg, u32 clear, u32 set)
>>  {
>>  	u32 old, val;
>>
>> @@ -388,9 +388,11 @@ static inline void intel_uncore_rmw(struct intel_uncore *uncore,
>>  	val = (old & ~clear) | set;
>>  	if (val != old)
>>  		intel_uncore_write(uncore, reg, val);
>> +
>> +	return old;
>>  }
>>
>> -static inline void intel_uncore_rmw_fw(struct intel_uncore *uncore,
>> +static inline u32 intel_uncore_rmw_fw(struct intel_uncore *uncore,
>>  				       i915_reg_t reg, u32 clear, u32 set)
>>  {
>>  	u32 old, val;
>> @@ -399,6 +401,8 @@ static inline void intel_uncore_rmw_fw(struct intel_uncore *uncore,
>>  	val = (old & ~clear) | set;
>>  	if (val != old)
>>  		intel_uncore_write_fw(uncore, reg, val);
>> +
>> +	return old;
>>  }
>>
>>  static inline int intel_uncore_write_and_verify(struct intel_uncore *uncore,
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  reply	other threads:[~2020-05-21 17:31 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-21  0:37 [Intel-gfx] [PATCH 00/37] Introduce DG1 Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 01/37] drm/i915/rkl: Add DPLL4 support Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 02/37] drm/i915/rkl: Add DDC pin mapping Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 03/37] drm/i915/rkl: Setup ports/phys Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 04/37] drm/i915/rkl: provide port/phy mapping for vbt Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 05/37] drm/i915/rkl: Handle HTI Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 06/37] drm/i915/rkl: Handle comp master/slave relationships for PHYs Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 07/37] drm/i915/rkl: Add initial workarounds Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 08/37] drm/i915: make intel_{uncore, de}_rmw() more useful Lucas De Marchi
2020-05-21 17:24   ` Souza, Jose
2020-05-21 17:30     ` Lucas De Marchi [this message]
2020-05-21  0:37 ` [Intel-gfx] [PATCH 09/37] drm/i915: Add has_master_unit_irq flag Lucas De Marchi
2020-05-26 18:10   ` Souza, Jose
2020-05-21  0:37 ` [Intel-gfx] [PATCH 10/37] drm/i915: add pcie snoop flag Lucas De Marchi
2020-05-21  8:15   ` Chris Wilson
2020-05-21  0:37 ` [Intel-gfx] [PATCH 11/37] drm/i915/dg1: add initial DG-1 definitions Lucas De Marchi
2020-05-26 17:34   ` Souza, Jose
2020-05-26 17:51     ` Lucas De Marchi
2020-05-26 18:02       ` Souza, Jose
2020-05-26 17:51   ` Souza, Jose
2020-05-21  0:37 ` [Intel-gfx] [PATCH 12/37] drm/i915/dg1: Add DG1 PCI IDs Lucas De Marchi
2020-05-26 17:35   ` Souza, Jose
2020-05-21  0:37 ` [Intel-gfx] [PATCH 13/37] drm/i915/dg1: Add fake PCH Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 14/37] drm/i915/dg1: Initialize RAWCLK properly Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 15/37] drm/i915/dg1: Define MOCS table for DG1 Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 16/37] drm/i915/dg1: Add DG1 power wells Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 17/37] drm/i915/dg1: Increase mmio size to 4MB Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 18/37] drm/i915/dg1: add support for the master unit interrupt Lucas De Marchi
2020-05-26 18:02   ` Souza, Jose
2020-05-21  0:37 ` [Intel-gfx] [PATCH 19/37] drm/i915/dg1: Wait for pcode/uncore handshake at startup Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 20/37] drm/i915/dg1: Add DPLL macros for DG1 Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 21/37] drm/i915/dg1: Add and setup DPLLs " Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 22/37] drm/i915/dg1: Enable DPLL " Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 23/37] drm/i915/dg1: add hpd interrupt handling Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 24/37] drm/i915/dg1: invert HPD pins Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 25/37] drm/i915/dg1: gmbus pin mapping Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 26/37] drm/i915/dg1: Handle GRF/IC ECC error irq Lucas De Marchi
2020-05-21  8:19   ` Chris Wilson
2020-05-21  0:37 ` [Intel-gfx] [PATCH 27/37] drm/i915/dg1: Log counter on SLM ECC error Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 28/37] drm/i915/dg1: Enable first 2 ports for DG1 Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 29/37] drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 30/37] drm/i915/dg1: Update comp master/slave relationships for PHYs Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 31/37] drm/i915/dg1: Update voltage swing tables for DP Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 32/37] drm/i915/dg1: provide port/phy mapping for vbt Lucas De Marchi
2020-05-21  0:37 ` [Intel-gfx] [PATCH 33/37] drm/i915/dg1: map/unmap pll clocks Lucas De Marchi
2020-05-21  0:38 ` [Intel-gfx] [PATCH 34/37] drm/i915/dg1: enable PORT C/D aka D/E Lucas De Marchi
2020-05-21  0:38 ` [Intel-gfx] [PATCH 35/37] drm/i915/dg1: Load DMC Lucas De Marchi
2020-05-26 17:42   ` Souza, Jose
2020-05-26 17:49     ` Lucas De Marchi
2020-05-21  0:38 ` [Intel-gfx] [PATCH 36/37] drm/i915/dg1: Add initial DG1 workarounds Lucas De Marchi
2020-05-21  0:38 ` [Intel-gfx] [PATCH 37/37] drm/i915/dg1: Remove SHPD_FILTER_CNT register programming Lucas De Marchi
2020-05-26 17:44   ` Souza, Jose
2020-05-21  1:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce DG1 Patchwork
2020-05-21  1:06 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-05-21  1:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-05-21 18:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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