intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [CI v5 04/18] drm/i915: Extract intel_mode_vblank_start()
Date: Fri, 22 Jan 2021 15:26:33 -0800	[thread overview]
Message-ID: <20210122232647.22688-4-manasi.d.navare@intel.com> (raw)
In-Reply-To: <20210122232647.22688-1-manasi.d.navare@intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We want to calculate the vblank_start for vblank evasion
differently for vrr. To make that nicer lets first extract
the current non-vrr case to a helper.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/i915/display/intel_sprite.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 811cf22898d2..40c48b893b3e 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -62,6 +62,16 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
 			    1000 * adjusted_mode->crtc_htotal);
 }
 
+static int intel_mode_vblank_start(const struct drm_display_mode *mode)
+{
+	int vblank_start = mode->crtc_vblank_start;
+
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+		vblank_start = DIV_ROUND_UP(vblank_start, 2);
+
+	return vblank_start;
+}
+
 /**
  * intel_pipe_update_start() - start update of a set of display registers
  * @new_crtc_state: the new crtc state
@@ -90,9 +100,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
 	if (new_crtc_state->uapi.async_flip)
 		return;
 
-	vblank_start = adjusted_mode->crtc_vblank_start;
-	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
-		vblank_start = DIV_ROUND_UP(vblank_start, 2);
+	vblank_start = intel_mode_vblank_start(adjusted_mode);
 
 	/* FIXME needs to be calibrated sensibly */
 	min = vblank_start - intel_usecs_to_scanlines(adjusted_mode,
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2021-01-22 23:22 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-22 23:26 [Intel-gfx] [CI v5 01/18] drm/i915/display/vrr: Create VRR file and add VRR capability check Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 02/18] drm/i915/display/dp: Attach and set drm connector VRR property Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 03/18] drm/i915: Store framestart_delay in dev_priv Manasi Navare
2021-01-22 23:26 ` Manasi Navare [this message]
2021-01-22 23:26 ` [Intel-gfx] [CI v5 05/18] drm/i915: Extract intel_crtc_scanlines_since_frame_timestamp() Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 06/18] drm/i915/display/dp: Compute VRR state in atomic_check Manasi Navare
2021-01-25 11:41   ` Ville Syrjälä
2021-01-22 23:26 ` [Intel-gfx] [CI v5 07/18] drm/i915/display/dp: Do not enable PSR if VRR is enabled Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 08/18] drm/i915/display: VRR + DRRS cannot be enabled together Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 09/18] drm/i915: Rename VRR_CTL reg fields Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 10/18] drm/i915/display/vrr: Configure and enable VRR in modeset enable Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 11/18] drm/i915/display/vrr: Send VRR push to flip the frame Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 12/18] drm/i915/display/vrr: Disable VRR in modeset disable path Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 13/18] drm/i915/display/vrr: Set IGNORE_MSA_PAR state in DP Sink Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 14/18] drm/i915/display: Add HW state readout for VRR Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 15/18] drm/i915/display: Helpers for VRR vblank min and max start Manasi Navare
2021-01-25 11:42   ` Ville Syrjälä
2021-01-22 23:26 ` [Intel-gfx] [CI v5 16/18] drm/i915: Add vrr state dump Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 17/18] drm/i915: Fix vblank timestamps with VRR Manasi Navare
2021-01-22 23:26 ` [Intel-gfx] [CI v5 18/18] drm/i915: Fix vblank evasion with vrr Manasi Navare
2021-01-23  2:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,v5,01/18] drm/i915/display/vrr: Create VRR file and add VRR capability check Patchwork
2021-01-23  2:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-23  3:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-23 13:56 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-25 20:08 ` [Intel-gfx] [CI v6] " Manasi Navare
2021-01-25 20:36 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,v6] drm/i915/display/vrr: Create VRR file and add VRR capability check (rev2) Patchwork
2021-01-25 20:37 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-25 21:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-26  2:09 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210122232647.22688-4-manasi.d.navare@intel.com \
    --to=manasi.d.navare@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).