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From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Jagan Teki <jagan@openedev.com>
Cc: Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	linux-sunxi <linux-sunxi@googlegroups.com>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Chen-Yu Tsai <wens@csie.org>,
	Jagan Teki <jagan@amarulasolutions.com>,
	Michael Trimarchi <michael@amarulasolutions.com>,
	linux-amarula@amarulasolutions.com, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [linux-sunxi] Re: [PATCH v5 15/17] clk: sunxi-ng: a64: Add minimum rate for PLL_MIPI
Date: Tue, 11 Dec 2018 17:50:41 +0100	[thread overview]
Message-ID: <20181211165041.u75t6li6ympzq3mk@flea> (raw)
In-Reply-To: <14061728-2ca3-3342-2cf3-b8588b112f5f@openedev.com>


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On Tue, Dec 11, 2018 at 10:05:43PM +0530, Jagan Teki wrote:
> 
> 
> On 11/12/18 10:02 PM, Maxime Ripard wrote:
> > On Mon, Dec 10, 2018 at 09:47:27PM +0530, Jagan Teki wrote:
> > > Minimum PLL used for MIPI is 500MHz, as per manual, but
> > > lowering the min rate by 300MHz can result proper working
> > > nkms divider with the help of desired dclock rate from
> > > panel driver.
> > > 
> > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > > Acked-by: Stephen Boyd <sboyd@kernel.org>
> > > ---
> > >   drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 1 +
> > >   1 file changed, 1 insertion(+)
> > > 
> > > diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
> > > index 181b599dc163..b623c8150b4f 100644
> > > --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
> > > +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
> > > @@ -183,6 +183,7 @@ static struct ccu_nkm pll_mipi_clk = {
> > >   	.n		= _SUNXI_CCU_MULT(8, 4),
> > >   	.k		= _SUNXI_CCU_MULT_MIN(4, 2, 2),
> > >   	.m		= _SUNXI_CCU_DIV(0, 4),
> > > +	.min_rate	= 300000000,		/* Actual rate is 500MHz */
> > 
> > That comment still doesn't make any sense. Is it running at 500MHz or 300?
> 
> It running in 300MHz, actual rate is 500MHz.

If it's running at 300MHz, its actual rate should be 300MHz...

> > Also, IIRC you had a patch adding support for maximum boundaries in
> > your previous patch, where did it go?
> 
> Since I don't have any usecase to test I droped it. the same mentioned on
> the previous version.

Ok.

Maxime

-- 
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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  reply	other threads:[~2018-12-11 16:51 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-10 16:17 [PATCH v5 00/17] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
2018-12-10 16:17 ` [PATCH v5 01/17] clk: sunxi-ng: Add check for minimal rate to NKM PLLs Jagan Teki
2018-12-10 16:17 ` [PATCH v5 02/17] drm/sun4i: sun6i_mipi_dsi: Add has_mod_clk quirk Jagan Teki
2018-12-10 16:17 ` [PATCH v5 03/17] drm/sun4i: sun6i_mipi_dsi: Add Allwinner A64 MIPI DSI support Jagan Teki
2018-12-10 16:17 ` [PATCH v5 04/17] dt-bindings: sun6i-dsi: Add compatible for A64 MIPI DSI Jagan Teki
2018-12-10 16:17 ` [PATCH v5 05/17] drm/sun4i: sun6i_mipi_dsi: Add DSI Generic short write 2 param transfer Jagan Teki
2018-12-10 16:17 ` [PATCH v5 06/17] drm/sun4i: sun6i_mipi_dsi: Fix TCON DRQ set bits Jagan Teki
2018-12-10 16:17 ` [PATCH v5 07/17] drm/sun4i: sun6i_mipi_dsi: Refactor vertical video start delay Jagan Teki
2018-12-11 16:49   ` Maxime Ripard
2018-12-11 17:00     ` Jagan Teki
2018-12-12 19:43       ` Jagan Teki
2018-12-19 15:50       ` Maxime Ripard
2018-12-20 20:56     ` Jagan Teki
2019-01-06 16:29       ` Jagan Teki
2019-01-07 14:11       ` Maxime Ripard
2019-01-07 15:18         ` Jagan Teki
2019-01-08  8:58           ` Maxime Ripard
     [not found]             ` <CAMty3ZC9OQtwT-iH=S1LhHsBPc_jFKGAnCYYeR9nuKuDWSKLQw@mail.gmail.com>
2019-01-12 16:43               ` Maxime Ripard
2019-01-12 19:37                 ` Jagan Teki
2019-01-16 19:17                   ` Maxime Ripard
2019-01-17  4:32                     ` Jagan Teki
2019-01-18 15:44                       ` Jagan Teki
2019-01-22 11:11                         ` Maxime Ripard
2019-01-22 11:51                           ` Jagan Teki
2019-01-25 21:21                             ` Maxime Ripard
2019-01-22 11:14                       ` Maxime Ripard
2018-12-10 16:17 ` [PATCH v5 08/17] drm/sun4i: sun6i_mipi_dsi: Fix DSI hbp timing value Jagan Teki
2018-12-10 16:17 ` [PATCH v5 09/17] drm/sun4i: sun6i_mipi_dsi: Fix DSI hblk timing calculation Jagan Teki
2018-12-10 16:17 ` [PATCH v5 10/17] drm/sun4i: sun6i_mipi_dsi: Add DSI hblk packet overhead Jagan Teki
2018-12-10 16:17 ` [PATCH v5 11/17] drm/sun4i: sun6i_mipi_dsi: Fix DSI hfp timing value Jagan Teki
2018-12-10 16:17 ` [PATCH v5 12/17] drm/sun4i: sun6i_mipi_dsi: Set proper vblk timing calculation Jagan Teki
2018-12-10 16:17 ` [PATCH v5 13/17] drm/sun4i: sun6i_mipi_dsi: Add support for VCC-DSI voltage regulator Jagan Teki
2018-12-10 16:17 ` [PATCH v5 14/17] dt-bindings: sun6i-dsi: Add VCC-DSI supply property Jagan Teki
2018-12-10 16:17 ` [PATCH v5 15/17] clk: sunxi-ng: a64: Add minimum rate for PLL_MIPI Jagan Teki
2018-12-11 16:32   ` Maxime Ripard
2018-12-11 16:35     ` [linux-sunxi] " Jagan Teki
2018-12-11 16:50       ` Maxime Ripard [this message]
2018-12-10 16:17 ` [PATCH v5 16/17] dt-bindings: sun6i-dsi: Add A64 DPHY compatible (w/ A31 fallback) Jagan Teki
2018-12-10 16:17 ` [PATCH v5 17/17] arm64: dts: allwinner: a64: Add DSI pipeline Jagan Teki
2018-12-11 16:34   ` Maxime Ripard

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